lib/libc/gdtoa/gdtoaimp.h

604

extern double ratio ANSI((Bigint*, Bigint*));

lib/libc/gdtoa/smisc.c

83

ratio

lib/libc/gdtoa/strtod.c

740

dval(&adj) = ratio(delta, bs);

lib/libc/gdtoa/strtod.c

917

if ((aadj = ratio(delta, bs)) <= 2.) {

lib/libc/gdtoa/strtodg.c

933

if ((dval(&adj) = ratio(delta, bs)) <= 2.) {

sys/arch/armv7/exynos/exclock.c

483

uint32_t aclk_66, aclk_66_pre, div, ratio;

sys/arch/armv7/exynos/exclock.c

486

ratio = (div >> 24) & 0x7;

sys/arch/armv7/exynos/exclock.c

487

aclk_66_pre = exclock_get_pll_clk(sc, MPLL) / (ratio + 1);

sys/arch/armv7/exynos/exclock.c

489

ratio = (div >> 0) & 0x7;

sys/arch/armv7/exynos/exclock.c

490

aclk_66 = aclk_66_pre / (ratio + 1);

sys/dev/i2c/adt7460.c

269

sc->chip->ratio[worklist[i].index - 32768] == 0)

sys/dev/i2c/adt7460.c

285

int i, ratio;

sys/dev/i2c/adt7460.c

292

ratio = sc->chip->ratio[worklist[i].index - 32768];

sys/dev/i2c/adt7460.c

293

if (ratio == 0) /* do not read a dead register */

sys/dev/i2c/adt7460.c

307

ratio = sc->chip->vcc;

sys/dev/i2c/adt7460.c

315

sc->sc_sensor[i].value = ratio * 1000 * (u_int)data / 192;

sys/dev/i2c/adt7460.c

74

short ratio[7];

sys/dev/i2c/tsl2560.c

205

u_int32_t ratio, ratio1;

sys/dev/i2c/tsl2560.c

212

ratio = (ratio1 + 1) >> 1;

sys/dev/i2c/tsl2560.c

215

if (ratio <= TSL2560_K1T)

sys/dev/i2c/tsl2560.c

217

else if (ratio <= TSL2560_K2T)

sys/dev/i2c/tsl2560.c

219

else if (ratio <= TSL2560_K3T)

sys/dev/i2c/tsl2560.c

221

else if (ratio <= TSL2560_K4T)

sys/dev/i2c/tsl2560.c

223

else if (ratio <= TSL2560_K5T)

sys/dev/i2c/tsl2560.c

225

else if (ratio <= TSL2560_K6T)

sys/dev/i2c/tsl2560.c

227

else if (ratio <= TSL2560_K7T)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1199

struct fixed31_32 ratio,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1217

temp = dc_fixpt_mul_int(ratio, recout_offset_within_recout_full);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1221

dc_fixpt_add_int(ratio, taps + 1), 2), temp), 19);

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1240

temp = dc_fixpt_add(*init, dc_fixpt_mul_int(ratio, recout_size - 1));

sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c

51

const struct ratio *spl_ratios)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1341

const uint16_t *get_filter_3tap_16p(struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1343

if (ratio.value < dc_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1345

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1347

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1353

const uint16_t *get_filter_3tap_64p(struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1355

if (ratio.value < dc_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1357

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1359

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1365

const uint16_t *get_filter_4tap_16p(struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1367

if (ratio.value < dc_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1369

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1371

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1377

const uint16_t *get_filter_4tap_64p(struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1379

if (ratio.value < dc_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1381

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1383

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1389

const uint16_t *get_filter_5tap_64p(struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1391

if (ratio.value < dc_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1393

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1395

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1401

const uint16_t *get_filter_6tap_64p(struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1403

if (ratio.value < dc_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1405

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1407

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1413

const uint16_t *get_filter_7tap_64p(struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1415

if (ratio.value < dc_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1417

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1419

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1425

const uint16_t *get_filter_8tap_64p(struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1427

if (ratio.value < dc_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1429

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/dce/dce_scl_filters.c

1431

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c

1146

static uint32_t decide_taps(struct fixed31_32 ratio, uint32_t in_taps, bool chroma)

sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c

1150

if (IDENTITY_RATIO(ratio)) {

sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c

394

static const uint16_t *get_filter_coeffs_16p(int taps, struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c

397

return get_filter_4tap_16p(ratio);

sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c

399

return get_filter_3tap_16p(ratio);

sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c

44

#define IDENTITY_RATIO(ratio) (dc_fixpt_u2d19(ratio) == (1 << 19))

sys/dev/pci/drm/amd/display/dc/dce110/dce110_transform_v.c

488

static const uint16_t *get_filter_coeffs_64p(int taps, struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dce110/dce110_transform_v.c

491

return get_filter_4tap_64p(ratio);

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

530

static const uint16_t *wbscl_get_filter_3tap_16p(struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

532

if (ratio.value < dc_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

534

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

536

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

542

static const uint16_t *wbscl_get_filter_4tap_16p(struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

544

if (ratio.value < dc_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

546

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

548

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

554

static const uint16_t *wbscl_get_filter_5tap_16p(struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

556

if (ratio.value < dc_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

558

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

560

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

566

static const uint16_t *wbscl_get_filter_6tap_16p(struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

568

if (ratio.value < dc_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

570

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

572

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

578

static const uint16_t *wbscl_get_filter_7tap_16p(struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

580

if (ratio.value < dc_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

582

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

584

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

590

static const uint16_t *wbscl_get_filter_8tap_16p(struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

592

if (ratio.value < dc_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

594

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

596

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

602

static const uint16_t *wbscl_get_filter_9tap_16p(struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

604

if (ratio.value < dc_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

606

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

608

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

613

static const uint16_t *wbscl_get_filter_10tap_16p(struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

615

if (ratio.value < dc_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

617

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

619

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

625

static const uint16_t *wbscl_get_filter_11tap_16p(struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

627

if (ratio.value < dc_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

629

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

631

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

637

static const uint16_t *wbscl_get_filter_12tap_16p(struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

639

if (ratio.value < dc_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

641

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

643

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

649

static const uint16_t *wbscl_get_filter_coeffs_16p(int taps, struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

652

return wbscl_get_filter_12tap_16p(ratio);

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

654

return wbscl_get_filter_11tap_16p(ratio);

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

656

return wbscl_get_filter_10tap_16p(ratio);

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

658

return wbscl_get_filter_9tap_16p(ratio);

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

660

return wbscl_get_filter_8tap_16p(ratio);

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

662

return wbscl_get_filter_7tap_16p(ratio);

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

664

return wbscl_get_filter_6tap_16p(ratio);

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

666

return wbscl_get_filter_5tap_16p(ratio);

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

668

return wbscl_get_filter_4tap_16p(ratio);

sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

670

return wbscl_get_filter_3tap_16p(ratio);

sys/dev/pci/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

122

#define IDENTITY_RATIO(ratio) (dc_fixpt_u2d19(ratio) == (1 << 19))

sys/dev/pci/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

215

static const uint16_t *dpp1_dscl_get_filter_coeffs_64p(int taps, struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

218

return get_filter_8tap_64p(ratio);

sys/dev/pci/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

220

return get_filter_7tap_64p(ratio);

sys/dev/pci/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

222

return get_filter_6tap_64p(ratio);

sys/dev/pci/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

224

return get_filter_5tap_64p(ratio);

sys/dev/pci/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

226

return get_filter_4tap_64p(ratio);

sys/dev/pci/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

228

return get_filter_3tap_64p(ratio);

sys/dev/pci/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.c

188

#define IDENTITY_RATIO(ratio) (dc_fixpt_u3d19(ratio) == (1 << 19))

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

382

#define IDENTITY_RATIO(ratio) (dc_fixpt_u3d19(ratio) == (1 << 19))

sys/dev/pci/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

207

static const uint16_t *dpp401_dscl_get_filter_coeffs_64p(int taps, struct fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

210

return get_filter_8tap_64p(ratio);

sys/dev/pci/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

212

return get_filter_7tap_64p(ratio);

sys/dev/pci/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

214

return get_filter_6tap_64p(ratio);

sys/dev/pci/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

216

return get_filter_5tap_64p(ratio);

sys/dev/pci/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

218

return get_filter_4tap_64p(ratio);

sys/dev/pci/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

220

return get_filter_3tap_64p(ratio);

sys/dev/pci/drm/amd/display/dc/inc/hw/transform.h

252

const uint16_t *get_filter_3tap_16p(struct fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/inc/hw/transform.h

253

const uint16_t *get_filter_3tap_64p(struct fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/inc/hw/transform.h

254

const uint16_t *get_filter_4tap_16p(struct fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/inc/hw/transform.h

255

const uint16_t *get_filter_4tap_64p(struct fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/inc/hw/transform.h

256

const uint16_t *get_filter_5tap_64p(struct fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/inc/hw/transform.h

257

const uint16_t *get_filter_6tap_64p(struct fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/inc/hw/transform.h

258

const uint16_t *get_filter_7tap_64p(struct fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/inc/hw/transform.h

259

const uint16_t *get_filter_8tap_64p(struct fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl.c

10

#define IDENTITY_RATIO(ratio) (spl_fixpt_u3d19(ratio) == (1 << 19))

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl.c

1668

const struct spl_scaler_data *data, struct spl_fixed31_32 ratio,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl.c

1677

spl_build_isharp_1dlut_from_reference_curve(ratio, setup, adp_sharpness,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl.c

544

struct spl_fixed31_32 ratio,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl.c

563

temp = spl_fixpt_mul_int(ratio, recout_offset_within_recout_full);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl.c

566

*init = spl_fixpt_add(spl_fixpt_div_int(spl_fixpt_add_int(ratio, taps + 1), 2), temp);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl.c

588

temp = spl_fixpt_add(*init, spl_fixpt_mul_int(ratio, recout_size - 1));

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_isharp_filters.c

344

static unsigned int spl_calculate_sharpness_level_adj(struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_isharp_filters.c

372

if (ratio.value >= ratio_level.value) {

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_isharp_filters.c

382

static unsigned int spl_calculate_sharpness_level(struct spl_fixed31_32 ratio,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_isharp_filters.c

409

sharpness_level_down_adj = spl_calculate_sharpness_level_adj(ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_isharp_filters.c

418

sharpness_level_down_adj = spl_calculate_sharpness_level_adj(ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_isharp_filters.c

426

sharpness_level_down_adj = spl_calculate_sharpness_level_adj(ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_isharp_filters.c

450

void spl_build_isharp_1dlut_from_reference_curve(struct spl_fixed31_32 ratio, enum system_setup setup,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_isharp_filters.c

461

unsigned int sharpnessX1000 = spl_calculate_sharpness_level(ratio,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_isharp_filters.h

34

void spl_build_isharp_1dlut_from_reference_curve(struct spl_fixed31_32 ratio, enum system_setup setup,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2195

static const uint16_t *spl_get_easf_filter_3tap_64p(struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2197

if (ratio.value < spl_fixpt_from_fraction(3, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2199

else if (ratio.value < spl_fixpt_from_fraction(4, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2201

else if (ratio.value < spl_fixpt_from_fraction(5, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2203

else if (ratio.value < spl_fixpt_from_fraction(6, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2205

else if (ratio.value < spl_fixpt_from_fraction(7, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2207

else if (ratio.value < spl_fixpt_from_fraction(8, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2209

else if (ratio.value < spl_fixpt_from_fraction(9, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2215

static const uint16_t *spl_get_easf_filter_4tap_64p(struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2217

if (ratio.value < spl_fixpt_from_fraction(3, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2219

else if (ratio.value < spl_fixpt_from_fraction(4, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2221

else if (ratio.value < spl_fixpt_from_fraction(5, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2223

else if (ratio.value < spl_fixpt_from_fraction(6, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2225

else if (ratio.value < spl_fixpt_from_fraction(7, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2227

else if (ratio.value < spl_fixpt_from_fraction(8, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2229

else if (ratio.value < spl_fixpt_from_fraction(9, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2235

static const uint16_t *spl_get_easf_filter_6tap_64p(struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2237

if (ratio.value < spl_fixpt_from_fraction(3, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2239

else if (ratio.value < spl_fixpt_from_fraction(4, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2241

else if (ratio.value < spl_fixpt_from_fraction(5, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2243

else if (ratio.value < spl_fixpt_from_fraction(6, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2245

else if (ratio.value < spl_fixpt_from_fraction(7, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2247

else if (ratio.value < spl_fixpt_from_fraction(8, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2249

else if (ratio.value < spl_fixpt_from_fraction(9, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2255

const uint16_t *spl_dscl_get_easf_filter_coeffs_64p(int taps, struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2258

return spl_get_easf_filter_6tap_64p(ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2260

return spl_get_easf_filter_4tap_64p(ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2262

return spl_get_easf_filter_3tap_64p(ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2270

static const uint16_t *spl_get_easf_filter_3tap_64p_s1_10(struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2272

if (ratio.value < spl_fixpt_from_fraction(3, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2274

else if (ratio.value < spl_fixpt_from_fraction(4, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2276

else if (ratio.value < spl_fixpt_from_fraction(5, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2278

else if (ratio.value < spl_fixpt_from_fraction(6, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2280

else if (ratio.value < spl_fixpt_from_fraction(7, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2282

else if (ratio.value < spl_fixpt_from_fraction(8, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2284

else if (ratio.value < spl_fixpt_from_fraction(9, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2290

static const uint16_t *spl_get_easf_filter_4tap_64p_s1_10(struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2292

if (ratio.value < spl_fixpt_from_fraction(3, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2294

else if (ratio.value < spl_fixpt_from_fraction(4, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2296

else if (ratio.value < spl_fixpt_from_fraction(5, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2298

else if (ratio.value < spl_fixpt_from_fraction(6, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2300

else if (ratio.value < spl_fixpt_from_fraction(7, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2302

else if (ratio.value < spl_fixpt_from_fraction(8, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2304

else if (ratio.value < spl_fixpt_from_fraction(9, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2310

static const uint16_t *spl_get_easf_filter_6tap_64p_s1_10(struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2312

if (ratio.value < spl_fixpt_from_fraction(3, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2314

else if (ratio.value < spl_fixpt_from_fraction(4, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2316

else if (ratio.value < spl_fixpt_from_fraction(5, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2318

else if (ratio.value < spl_fixpt_from_fraction(6, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2320

else if (ratio.value < spl_fixpt_from_fraction(7, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2322

else if (ratio.value < spl_fixpt_from_fraction(8, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2324

else if (ratio.value < spl_fixpt_from_fraction(9, 10).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2330

const uint16_t *spl_dscl_get_easf_filter_coeffs_64p_s1_10(int taps, struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2333

return spl_get_easf_filter_6tap_64p_s1_10(ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2335

return spl_get_easf_filter_4tap_64p_s1_10(ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2337

return spl_get_easf_filter_3tap_64p_s1_10(ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2381

static uint32_t spl_easf_get_scale_ratio_to_reg_value(struct spl_fixed31_32 ratio,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2398

if (ratio.value < spl_fixpt_from_fraction(

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2409

uint32_t spl_get_v_bf3_mode(struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2414

value = spl_easf_get_scale_ratio_to_reg_value(ratio,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2418

uint32_t spl_get_h_bf3_mode(struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2423

value = spl_easf_get_scale_ratio_to_reg_value(ratio,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2427

uint32_t spl_get_reducer_gain6(int taps, struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2435

value = spl_easf_get_scale_ratio_to_reg_value(ratio,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2440

value = spl_easf_get_scale_ratio_to_reg_value(ratio,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2446

uint32_t spl_get_reducer_gain4(int taps, struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2454

value = spl_easf_get_scale_ratio_to_reg_value(ratio,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2459

value = spl_easf_get_scale_ratio_to_reg_value(ratio,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2465

uint32_t spl_get_gainRing6(int taps, struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2473

value = spl_easf_get_scale_ratio_to_reg_value(ratio,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2478

value = spl_easf_get_scale_ratio_to_reg_value(ratio,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2484

uint32_t spl_get_gainRing4(int taps, struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2492

value = spl_easf_get_scale_ratio_to_reg_value(ratio,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2497

value = spl_easf_get_scale_ratio_to_reg_value(ratio,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2503

uint32_t spl_get_3tap_dntilt_uptilt_offset(int taps, struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2511

value = spl_easf_get_scale_ratio_to_reg_value(ratio,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2517

uint32_t spl_get_3tap_uptilt_maxval(int taps, struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2525

value = spl_easf_get_scale_ratio_to_reg_value(ratio,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2531

uint32_t spl_get_3tap_dntilt_slope(int taps, struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2539

value = spl_easf_get_scale_ratio_to_reg_value(ratio,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2545

uint32_t spl_get_3tap_uptilt1_slope(int taps, struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2553

value = spl_easf_get_scale_ratio_to_reg_value(ratio,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2559

uint32_t spl_get_3tap_uptilt2_slope(int taps, struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2567

value = spl_easf_get_scale_ratio_to_reg_value(ratio,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2573

uint32_t spl_get_3tap_uptilt2_offset(int taps, struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.c

2581

value = spl_easf_get_scale_ratio_to_reg_value(ratio,

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.h

20

uint32_t spl_get_v_bf3_mode(struct spl_fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.h

21

uint32_t spl_get_h_bf3_mode(struct spl_fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.h

22

uint32_t spl_get_reducer_gain6(int taps, struct spl_fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.h

23

uint32_t spl_get_reducer_gain4(int taps, struct spl_fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.h

24

uint32_t spl_get_gainRing6(int taps, struct spl_fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.h

25

uint32_t spl_get_gainRing4(int taps, struct spl_fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.h

26

uint32_t spl_get_3tap_dntilt_uptilt_offset(int taps, struct spl_fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.h

27

uint32_t spl_get_3tap_uptilt_maxval(int taps, struct spl_fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.h

28

uint32_t spl_get_3tap_dntilt_slope(int taps, struct spl_fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.h

29

uint32_t spl_get_3tap_uptilt1_slope(int taps, struct spl_fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.h

30

uint32_t spl_get_3tap_uptilt2_slope(int taps, struct spl_fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.h

31

uint32_t spl_get_3tap_uptilt2_offset(int taps, struct spl_fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.h

34

const uint16_t *spl_dscl_get_easf_filter_coeffs_64p(int taps, struct spl_fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_easf_filters.h

35

const uint16_t *spl_dscl_get_easf_filter_coeffs_64p_s1_10(int taps, struct spl_fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1133

static const uint16_t *spl_get_filter_3tap_64p(struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1135

if (ratio.value < spl_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1137

else if (ratio.value < spl_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1139

else if (ratio.value < spl_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1145

static const uint16_t *spl_get_filter_4tap_64p(struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1147

if (ratio.value < spl_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1149

else if (ratio.value < spl_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1151

else if (ratio.value < spl_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1157

static const uint16_t *spl_get_filter_5tap_64p(struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1159

if (ratio.value < spl_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1161

else if (ratio.value < spl_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1163

else if (ratio.value < spl_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1169

static const uint16_t *spl_get_filter_6tap_64p(struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1171

if (ratio.value < spl_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1173

else if (ratio.value < spl_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1175

else if (ratio.value < spl_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1181

static const uint16_t *spl_get_filter_7tap_64p(struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1183

if (ratio.value < spl_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1185

else if (ratio.value < spl_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1187

else if (ratio.value < spl_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1193

static const uint16_t *spl_get_filter_8tap_64p(struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1195

if (ratio.value < spl_fixpt_one.value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1197

else if (ratio.value < spl_fixpt_from_fraction(4, 3).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1199

else if (ratio.value < spl_fixpt_from_fraction(5, 3).value)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1210

const uint16_t *spl_dscl_get_filter_coeffs_64p(int taps, struct spl_fixed31_32 ratio)

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1213

return spl_get_filter_8tap_64p(ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1215

return spl_get_filter_7tap_64p(ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1217

return spl_get_filter_6tap_64p(ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1219

return spl_get_filter_5tap_64p(ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1221

return spl_get_filter_4tap_64p(ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.c

1223

return spl_get_filter_3tap_64p(ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_scl_filters.h

11

const uint16_t *spl_dscl_get_filter_coeffs_64p(int taps, struct spl_fixed31_32 ratio);

sys/dev/pci/drm/amd/display/dc/sspl/dc_spl_types.h

261

struct ratio ratios;

sys/dev/pci/drm/i915/display/intel_cdclk.c

1323

u8 ratio;

sys/dev/pci/drm/i915/display/intel_cdclk.c

1327

{ .refclk = 19200, .cdclk = 144000, .ratio = 60 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1328

{ .refclk = 19200, .cdclk = 288000, .ratio = 60 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1329

{ .refclk = 19200, .cdclk = 384000, .ratio = 60 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1330

{ .refclk = 19200, .cdclk = 576000, .ratio = 60 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1331

{ .refclk = 19200, .cdclk = 624000, .ratio = 65 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1336

{ .refclk = 19200, .cdclk = 79200, .ratio = 33 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1337

{ .refclk = 19200, .cdclk = 158400, .ratio = 33 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1338

{ .refclk = 19200, .cdclk = 316800, .ratio = 33 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1343

{ .refclk = 19200, .cdclk = 172800, .ratio = 18 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1344

{ .refclk = 19200, .cdclk = 192000, .ratio = 20 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1345

{ .refclk = 19200, .cdclk = 307200, .ratio = 32 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1346

{ .refclk = 19200, .cdclk = 326400, .ratio = 68 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1347

{ .refclk = 19200, .cdclk = 556800, .ratio = 58 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1348

{ .refclk = 19200, .cdclk = 652800, .ratio = 68 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1350

{ .refclk = 24000, .cdclk = 180000, .ratio = 15 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1351

{ .refclk = 24000, .cdclk = 192000, .ratio = 16 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1352

{ .refclk = 24000, .cdclk = 312000, .ratio = 26 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1353

{ .refclk = 24000, .cdclk = 324000, .ratio = 54 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1354

{ .refclk = 24000, .cdclk = 552000, .ratio = 46 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1355

{ .refclk = 24000, .cdclk = 648000, .ratio = 54 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1357

{ .refclk = 38400, .cdclk = 172800, .ratio = 9 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1358

{ .refclk = 38400, .cdclk = 192000, .ratio = 10 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1359

{ .refclk = 38400, .cdclk = 307200, .ratio = 16 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1360

{ .refclk = 38400, .cdclk = 326400, .ratio = 34 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1361

{ .refclk = 38400, .cdclk = 556800, .ratio = 29 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1362

{ .refclk = 38400, .cdclk = 652800, .ratio = 34 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1367

{ .refclk = 19200, .cdclk = 172800, .ratio = 36 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1368

{ .refclk = 19200, .cdclk = 192000, .ratio = 40 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1369

{ .refclk = 19200, .cdclk = 307200, .ratio = 64 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1370

{ .refclk = 19200, .cdclk = 326400, .ratio = 136 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1371

{ .refclk = 19200, .cdclk = 556800, .ratio = 116 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1372

{ .refclk = 19200, .cdclk = 652800, .ratio = 136 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1374

{ .refclk = 24000, .cdclk = 180000, .ratio = 30 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1375

{ .refclk = 24000, .cdclk = 192000, .ratio = 32 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1376

{ .refclk = 24000, .cdclk = 312000, .ratio = 52 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1377

{ .refclk = 24000, .cdclk = 324000, .ratio = 108 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1378

{ .refclk = 24000, .cdclk = 552000, .ratio = 92 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1379

{ .refclk = 24000, .cdclk = 648000, .ratio = 108 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1381

{ .refclk = 38400, .cdclk = 172800, .ratio = 18 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1382

{ .refclk = 38400, .cdclk = 192000, .ratio = 20 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1383

{ .refclk = 38400, .cdclk = 307200, .ratio = 32 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1384

{ .refclk = 38400, .cdclk = 326400, .ratio = 68 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1385

{ .refclk = 38400, .cdclk = 556800, .ratio = 58 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1386

{ .refclk = 38400, .cdclk = 652800, .ratio = 68 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1391

{ .refclk = 19200, .cdclk = 307200, .ratio = 32 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1392

{ .refclk = 19200, .cdclk = 556800, .ratio = 58 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1393

{ .refclk = 19200, .cdclk = 652800, .ratio = 68 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1395

{ .refclk = 24000, .cdclk = 312000, .ratio = 26 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1396

{ .refclk = 24000, .cdclk = 552000, .ratio = 46 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1397

{ .refclk = 24400, .cdclk = 648000, .ratio = 54 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1399

{ .refclk = 38400, .cdclk = 307200, .ratio = 16 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1400

{ .refclk = 38400, .cdclk = 556800, .ratio = 29 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1401

{ .refclk = 38400, .cdclk = 652800, .ratio = 34 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1406

{ .refclk = 19200, .cdclk = 172800, .ratio = 27 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1407

{ .refclk = 19200, .cdclk = 192000, .ratio = 20 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1408

{ .refclk = 19200, .cdclk = 307200, .ratio = 32 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1409

{ .refclk = 19200, .cdclk = 556800, .ratio = 58 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1410

{ .refclk = 19200, .cdclk = 652800, .ratio = 68 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1412

{ .refclk = 24000, .cdclk = 176000, .ratio = 22 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1413

{ .refclk = 24000, .cdclk = 192000, .ratio = 16 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1414

{ .refclk = 24000, .cdclk = 312000, .ratio = 26 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1415

{ .refclk = 24000, .cdclk = 552000, .ratio = 46 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1416

{ .refclk = 24000, .cdclk = 648000, .ratio = 54 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1418

{ .refclk = 38400, .cdclk = 179200, .ratio = 14 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1419

{ .refclk = 38400, .cdclk = 192000, .ratio = 10 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1420

{ .refclk = 38400, .cdclk = 307200, .ratio = 16 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1421

{ .refclk = 38400, .cdclk = 556800, .ratio = 29 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1422

{ .refclk = 38400, .cdclk = 652800, .ratio = 34 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1427

{ .refclk = 19200, .cdclk = 172800, .ratio = 27 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1428

{ .refclk = 19200, .cdclk = 192000, .ratio = 20 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1429

{ .refclk = 19200, .cdclk = 307200, .ratio = 32 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1430

{ .refclk = 19200, .cdclk = 480000, .ratio = 50 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1431

{ .refclk = 19200, .cdclk = 556800, .ratio = 58 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1432

{ .refclk = 19200, .cdclk = 652800, .ratio = 68 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1434

{ .refclk = 24000, .cdclk = 176000, .ratio = 22 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1435

{ .refclk = 24000, .cdclk = 192000, .ratio = 16 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1436

{ .refclk = 24000, .cdclk = 312000, .ratio = 26 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1437

{ .refclk = 24000, .cdclk = 480000, .ratio = 40 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1438

{ .refclk = 24000, .cdclk = 552000, .ratio = 46 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1439

{ .refclk = 24000, .cdclk = 648000, .ratio = 54 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1441

{ .refclk = 38400, .cdclk = 179200, .ratio = 14 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1442

{ .refclk = 38400, .cdclk = 192000, .ratio = 10 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1443

{ .refclk = 38400, .cdclk = 307200, .ratio = 16 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1444

{ .refclk = 38400, .cdclk = 480000, .ratio = 25 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1445

{ .refclk = 38400, .cdclk = 556800, .ratio = 29 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1446

{ .refclk = 38400, .cdclk = 652800, .ratio = 34 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1451

{ .refclk = 38400, .cdclk = 163200, .ratio = 34, .waveform = 0x8888 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1452

{ .refclk = 38400, .cdclk = 204000, .ratio = 34, .waveform = 0x9248 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1453

{ .refclk = 38400, .cdclk = 244800, .ratio = 34, .waveform = 0xa4a4 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1454

{ .refclk = 38400, .cdclk = 285600, .ratio = 34, .waveform = 0xa54a },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1455

{ .refclk = 38400, .cdclk = 326400, .ratio = 34, .waveform = 0xaaaa },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1456

{ .refclk = 38400, .cdclk = 367200, .ratio = 34, .waveform = 0xad5a },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1457

{ .refclk = 38400, .cdclk = 408000, .ratio = 34, .waveform = 0xb6b6 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1458

{ .refclk = 38400, .cdclk = 448800, .ratio = 34, .waveform = 0xdbb6 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1459

{ .refclk = 38400, .cdclk = 489600, .ratio = 34, .waveform = 0xeeee },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1460

{ .refclk = 38400, .cdclk = 530400, .ratio = 34, .waveform = 0xf7de },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1461

{ .refclk = 38400, .cdclk = 571200, .ratio = 34, .waveform = 0xfefe },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1462

{ .refclk = 38400, .cdclk = 612000, .ratio = 34, .waveform = 0xfffe },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1463

{ .refclk = 38400, .cdclk = 652800, .ratio = 34, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1468

{ .refclk = 38400, .cdclk = 172800, .ratio = 16, .waveform = 0xad5a },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1469

{ .refclk = 38400, .cdclk = 192000, .ratio = 16, .waveform = 0xb6b6 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1470

{ .refclk = 38400, .cdclk = 307200, .ratio = 16, .waveform = 0x0000 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1471

{ .refclk = 38400, .cdclk = 480000, .ratio = 25, .waveform = 0x0000 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1472

{ .refclk = 38400, .cdclk = 556800, .ratio = 29, .waveform = 0x0000 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1473

{ .refclk = 38400, .cdclk = 652800, .ratio = 34, .waveform = 0x0000 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1478

{ .refclk = 38400, .cdclk = 153600, .ratio = 16, .waveform = 0xaaaa },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1479

{ .refclk = 38400, .cdclk = 172800, .ratio = 16, .waveform = 0xad5a },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1480

{ .refclk = 38400, .cdclk = 192000, .ratio = 16, .waveform = 0xb6b6 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1481

{ .refclk = 38400, .cdclk = 211200, .ratio = 16, .waveform = 0xdbb6 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1482

{ .refclk = 38400, .cdclk = 230400, .ratio = 16, .waveform = 0xeeee },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1483

{ .refclk = 38400, .cdclk = 249600, .ratio = 16, .waveform = 0xf7de },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1484

{ .refclk = 38400, .cdclk = 268800, .ratio = 16, .waveform = 0xfefe },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1485

{ .refclk = 38400, .cdclk = 288000, .ratio = 16, .waveform = 0xfffe },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1486

{ .refclk = 38400, .cdclk = 307200, .ratio = 16, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1487

{ .refclk = 38400, .cdclk = 330000, .ratio = 25, .waveform = 0xdbb6 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1488

{ .refclk = 38400, .cdclk = 360000, .ratio = 25, .waveform = 0xeeee },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1489

{ .refclk = 38400, .cdclk = 390000, .ratio = 25, .waveform = 0xf7de },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1490

{ .refclk = 38400, .cdclk = 420000, .ratio = 25, .waveform = 0xfefe },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1491

{ .refclk = 38400, .cdclk = 450000, .ratio = 25, .waveform = 0xfffe },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1492

{ .refclk = 38400, .cdclk = 480000, .ratio = 25, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1493

{ .refclk = 38400, .cdclk = 487200, .ratio = 29, .waveform = 0xfefe },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1494

{ .refclk = 38400, .cdclk = 522000, .ratio = 29, .waveform = 0xfffe },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1495

{ .refclk = 38400, .cdclk = 556800, .ratio = 29, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1496

{ .refclk = 38400, .cdclk = 571200, .ratio = 34, .waveform = 0xfefe },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1497

{ .refclk = 38400, .cdclk = 612000, .ratio = 34, .waveform = 0xfffe },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1498

{ .refclk = 38400, .cdclk = 652800, .ratio = 34, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1506

{ .refclk = 38400, .cdclk = 652800, .ratio = 34, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1511

{ .refclk = 38400, .cdclk = 153600, .ratio = 16, .waveform = 0xaaaa },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1512

{ .refclk = 38400, .cdclk = 172800, .ratio = 16, .waveform = 0xad5a },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1513

{ .refclk = 38400, .cdclk = 192000, .ratio = 16, .waveform = 0xb6b6 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1514

{ .refclk = 38400, .cdclk = 211200, .ratio = 16, .waveform = 0xdbb6 },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1515

{ .refclk = 38400, .cdclk = 230400, .ratio = 16, .waveform = 0xeeee },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1516

{ .refclk = 38400, .cdclk = 249600, .ratio = 16, .waveform = 0xf7de },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1517

{ .refclk = 38400, .cdclk = 268800, .ratio = 16, .waveform = 0xfefe },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1518

{ .refclk = 38400, .cdclk = 288000, .ratio = 16, .waveform = 0xfffe },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1519

{ .refclk = 38400, .cdclk = 307200, .ratio = 16, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1520

{ .refclk = 38400, .cdclk = 326400, .ratio = 17, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1521

{ .refclk = 38400, .cdclk = 345600, .ratio = 18, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1522

{ .refclk = 38400, .cdclk = 364800, .ratio = 19, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1523

{ .refclk = 38400, .cdclk = 384000, .ratio = 20, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1524

{ .refclk = 38400, .cdclk = 403200, .ratio = 21, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1525

{ .refclk = 38400, .cdclk = 422400, .ratio = 22, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1526

{ .refclk = 38400, .cdclk = 441600, .ratio = 23, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1527

{ .refclk = 38400, .cdclk = 460800, .ratio = 24, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1528

{ .refclk = 38400, .cdclk = 480000, .ratio = 25, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1529

{ .refclk = 38400, .cdclk = 499200, .ratio = 26, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1530

{ .refclk = 38400, .cdclk = 518400, .ratio = 27, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1531

{ .refclk = 38400, .cdclk = 537600, .ratio = 28, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1532

{ .refclk = 38400, .cdclk = 556800, .ratio = 29, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1533

{ .refclk = 38400, .cdclk = 576000, .ratio = 30, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1534

{ .refclk = 38400, .cdclk = 595200, .ratio = 31, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1535

{ .refclk = 38400, .cdclk = 614400, .ratio = 32, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1536

{ .refclk = 38400, .cdclk = 633600, .ratio = 33, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1537

{ .refclk = 38400, .cdclk = 652800, .ratio = 34, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1538

{ .refclk = 38400, .cdclk = 672000, .ratio = 35, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1539

{ .refclk = 38400, .cdclk = 691200, .ratio = 36, .waveform = 0xffff },

sys/dev/pci/drm/i915/display/intel_cdclk.c

1584

return display->cdclk.hw.ref * table[i].ratio;

sys/dev/pci/drm/i915/display/intel_cdclk.c

1703

u32 val, ratio;

sys/dev/pci/drm/i915/display/intel_cdclk.c

1728

ratio = val & ICL_CDCLK_PLL_RATIO_MASK;

sys/dev/pci/drm/i915/display/intel_cdclk.c

1730

ratio = intel_de_read(display, BXT_DE_PLL_CTL) & BXT_DE_PLL_RATIO_MASK;

sys/dev/pci/drm/i915/display/intel_cdclk.c

1732

cdclk_config->vco = ratio * cdclk_config->ref;

sys/dev/pci/drm/i915/display/intel_cdclk.c

1817

int ratio = DIV_ROUND_CLOSEST(vco, display->cdclk.hw.ref);

sys/dev/pci/drm/i915/display/intel_cdclk.c

1820

BXT_DE_PLL_RATIO_MASK, BXT_DE_PLL_RATIO(ratio));

sys/dev/pci/drm/i915/display/intel_cdclk.c

1846

int ratio = DIV_ROUND_CLOSEST(vco, display->cdclk.hw.ref);

sys/dev/pci/drm/i915/display/intel_cdclk.c

1849

val = ICL_CDCLK_PLL_RATIO(ratio);

sys/dev/pci/drm/i915/display/intel_cdclk.c

1864

int ratio = DIV_ROUND_CLOSEST(vco, display->cdclk.hw.ref);

sys/dev/pci/drm/i915/display/intel_cdclk.c

1868

val = ICL_CDCLK_PLL_RATIO(ratio) | BXT_DE_PLL_PLL_ENABLE;

sys/dev/pci/drm/i915/display/intel_cdclk.c

3358

int ratio = intel_mdclk_cdclk_ratio(display, &new_cdclk_state->actual);

sys/dev/pci/drm/i915/display/intel_cdclk.c

3360

ret = intel_dbuf_state_set_mdclk_cdclk_ratio(state, ratio);

sys/dev/pci/drm/i915/display/intel_overlay.c

949

u32 ratio;

sys/dev/pci/drm/i915/display/intel_overlay.c

958

ratio = REG_FIELD_GET(PFIT_VERT_SCALE_MASK_965, tmp);

sys/dev/pci/drm/i915/display/intel_overlay.c

967

ratio = REG_FIELD_GET(PFIT_VERT_SCALE_MASK, tmp);

sys/dev/pci/drm/i915/display/intel_overlay.c

970

overlay->pfit_vscale_ratio = ratio;

sys/dev/pci/drm/i915/display/intel_pfit.c

338

u32 ratio = source * FACTOR / target;

sys/dev/pci/drm/i915/display/intel_pfit.c

339

return (FACTOR * ratio + FACTOR/2) / FACTOR;

sys/dev/pci/drm/i915/display/skl_watermark.c

3438

int ratio)

sys/dev/pci/drm/i915/display/skl_watermark.c

3446

dbuf_state->mdclk_cdclk_ratio = ratio;

sys/dev/pci/drm/i915/display/skl_watermark.c

3452

int ratio, bool joined_mbus)

sys/dev/pci/drm/i915/display/skl_watermark.c

3461

MBUS_TRANSLATION_THROTTLE_MIN(ratio - 1));

sys/dev/pci/drm/i915/display/skl_watermark.c

3464

ratio *= 2;

sys/dev/pci/drm/i915/display/skl_watermark.c

3467

ratio, str_yes_no(joined_mbus));

sys/dev/pci/drm/i915/display/skl_watermark.c

3472

DBUF_MIN_TRACKER_STATE_SERVICE(ratio - 1));

sys/dev/pci/drm/i915/display/skl_watermark.h

70

int ratio);

sys/dev/pci/drm/i915/display/skl_watermark.h

75

int ratio, bool joined_mbus);

sys/dev/wscons/wsmouse.c

1660

input->filter.ratio = 1 << 12;

sys/dev/wscons/wsmouse.c

1662

input->filter.ratio *= input->hw.h_res;

sys/dev/wscons/wsmouse.c

1663

input->filter.ratio /= input->hw.v_res;

sys/dev/wscons/wsmouseinput.h

146

int ratio; /* X/Y ratio */

sys/dev/wscons/wstpad.c

1508

tp->ratio = input->filter.ratio;

sys/dev/wscons/wstpad.c

1564

input->filter.v.mag_scale = (input->filter.ratio ?

sys/dev/wscons/wstpad.c

1565

n * input->filter.ratio : n << 12) / dclr;

sys/dev/wscons/wstpad.c

176

int ratio;

sys/dev/wscons/wstpad.c

284

direction(int dx, int dy, int ratio)

sys/dev/wscons/wstpad.c

289

rdy = abs(dy) * ratio;

sys/dev/wscons/wstpad.c

335

dir = direction(dx, dy, tp->ratio);

sys/dev/wscons/wstpad.c

652

dy = abs(t->y - tp->t->y) * tp->ratio;

sys/dev/wscons/wstpad.c

712

dy = abs(t->y - t->orig.y) * tp->ratio;

sys/net/bsd-comp.c

197

db->ratio = 0;

sys/net/bsd-comp.c

244

if (new_ratio < db->ratio || new_ratio < 1 * RATIO_SCALE) {

sys/net/bsd-comp.c

248

db->ratio = new_ratio;

sys/net/bsd-comp.c

269

stats->ratio = db->in_count;

sys/net/bsd-comp.c

271

if (stats->ratio <= 0x7fffff)

sys/net/bsd-comp.c

272

stats->ratio <<= 8;

sys/net/bsd-comp.c

276

stats->ratio /= out;

sys/net/bsd-comp.c

92

u_int ratio; /* recent compression ratio */

sys/net/ppp-deflate.c

352

stats->ratio = stats->unc_bytes;

sys/net/ppp-deflate.c

354

if (stats->ratio <= 0x7ffffff)

sys/net/ppp-deflate.c

355

stats->ratio <<= 8;

sys/net/ppp-deflate.c

359

stats->ratio /= out;

sys/net/ppp_defs.h

153

u_int ratio; /* recent compression ratio << 8 */

usr.bin/ftp/util.c

764

int ratio, barlength, i, remaining, overhead = 30;

usr.bin/ftp/util.c

778

ratio = cursize * 100 / filesize;

usr.bin/ftp/util.c

780

ratio = 100;

usr.bin/ftp/util.c

781

ratio = MAXIMUM(ratio, 0);

usr.bin/ftp/util.c

782

ratio = MINIMUM(ratio, 100);

usr.bin/ftp/util.c

823

dotdot, ratio);

usr.bin/ftp/util.c

826

snprintf(buf, sizeof(buf), "\r%3d%% ", ratio);

usr.bin/ftp/util.c

830

i = barlength * ratio / 100;

usr.bin/mg/util.c

50

int ratio;

usr.bin/mg/util.c

96

ratio = nchar ? (100L * cchar) / nchar : 100;

usr.bin/mg/util.c

99

cbyte, cbyte, cchar, ratio, cline, row, getcolpos(curwp),

usr.sbin/pppd/pppstats/pppstats.c

216

ccs.d.ratio * 256.0);

usr.sbin/pppd/pppstats/pppstats.c

221

ccs.c.ratio * 256.0);

usr.sbin/pppd/pppstats/pppstats.c

226

ccs.d.ratio * 256.0);

usr.sbin/pppd/pppstats/pppstats.c

231

ccs.c.ratio * 256.0);