Symbol: pp_clock_type
sys/dev/pci/drm/amd/include/kgd_pp_interface.h
425
int (*force_clock_level)(void *handle, enum pp_clock_type type, uint32_t mask);
sys/dev/pci/drm/amd/include/kgd_pp_interface.h
426
int (*print_clock_levels)(void *handle, enum pp_clock_type type, char *buf);
sys/dev/pci/drm/amd/include/kgd_pp_interface.h
427
int (*emit_clock_levels)(void *handle, enum pp_clock_type type, char *buf, int *offset);
sys/dev/pci/drm/amd/pm/amdgpu_dpm.c
1245
enum pp_clock_type type,
sys/dev/pci/drm/amd/pm/amdgpu_dpm.c
1264
enum pp_clock_type type,
sys/dev/pci/drm/amd/pm/amdgpu_dpm.c
1318
enum pp_clock_type type,
sys/dev/pci/drm/amd/pm/amdgpu_dpm.c
822
enum pp_clock_type type,
sys/dev/pci/drm/amd/pm/amdgpu_dpm.c
845
enum pp_clock_type type,
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
1051
enum pp_clock_type type,
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
3854
enum pp_clock_type od_type,
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
849
enum pp_clock_type od_clocks[6] = {
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
991
enum pp_clock_type type,
sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h
458
enum pp_clock_type type,
sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h
462
enum pp_clock_type type,
sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h
500
enum pp_clock_type type,
sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h
503
enum pp_clock_type type,
sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h
510
enum pp_clock_type type,
sys/dev/pci/drm/amd/pm/powerplay/amd_powerplay.c
691
enum pp_clock_type type, uint32_t mask)
sys/dev/pci/drm/amd/pm/powerplay/amd_powerplay.c
712
enum pp_clock_type type,
sys/dev/pci/drm/amd/pm/powerplay/amd_powerplay.c
728
enum pp_clock_type type, char *buf)
sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
1028
enum pp_clock_type type, char *buf)
sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
973
enum pp_clock_type type, uint32_t mask)
sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
174
enum pp_clock_type type, uint32_t mask);
sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
5023
enum pp_clock_type type, uint32_t mask)
sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
5069
enum pp_clock_type type, char *buf)
sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
1547
enum pp_clock_type type, uint32_t mask)
sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
1568
enum pp_clock_type type, char *buf)
sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
4275
enum pp_clock_type type, uint32_t mask)
sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
4683
enum pp_clock_type type, char *buf, int *offset)
sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
4829
enum pp_clock_type type, char *buf)
sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c
2026
enum pp_clock_type type, uint32_t mask)
sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c
2275
enum pp_clock_type type, char *buf)
sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c
58
enum pp_clock_type type, uint32_t mask);
sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c
2567
enum pp_clock_type type, uint32_t mask)
sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c
3366
enum pp_clock_type type, char *buf)
sys/dev/pci/drm/amd/pm/powerplay/inc/hwmgr.h
313
int (*force_clock_level)(struct pp_hwmgr *hwmgr, enum pp_clock_type type, uint32_t mask);
sys/dev/pci/drm/amd/pm/powerplay/inc/hwmgr.h
315
enum pp_clock_type type, char *buf, int *offset);
sys/dev/pci/drm/amd/pm/powerplay/inc/hwmgr.h
316
int (*print_clock_levels)(struct pp_hwmgr *hwmgr, enum pp_clock_type type, char *buf);
sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c
141
enum pp_clock_type type,
sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c
2648
enum pp_clock_type type,
sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c
3034
static enum smu_clk_type smu_convert_to_smuclk(enum pp_clock_type type)
sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c
3099
enum pp_clock_type type,
sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c
3112
static int smu_emit_ppclk_levels(void *handle, enum pp_clock_type type, char *buf, int *offset)
sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c
79
static enum smu_clk_type smu_convert_to_smuclk(enum pp_clock_type type);
sys/dev/pci/drm/amd/pm/swsmu/inc/amdgpu_smu.h
1751
int smu_set_soft_freq_range(struct smu_context *smu, enum pp_clock_type clk_type,