sys/dev/pci/drm/amd/display/dc/dce/dce_clock_source.c

1069

struct pixel_clk_params *pix_clk_params,

sys/dev/pci/drm/amd/display/dc/dce/dce_clock_source.c

1283

struct pixel_clk_params *pix_clk_params,

sys/dev/pci/drm/amd/display/dc/dce/dce_clock_source.c

1329

struct pixel_clk_params *pix_clk_params,

sys/dev/pci/drm/amd/display/dc/dce/dce_clock_source.c

1367

struct pixel_clk_params *pix_clk_params,

sys/dev/pci/drm/amd/display/dc/dce/dce_clock_source.c

398

struct pixel_clk_params *pix_clk_params,

sys/dev/pci/drm/amd/display/dc/dce/dce_clock_source.c

478

struct pixel_clk_params *pix_clk_params)

sys/dev/pci/drm/amd/display/dc/dce/dce_clock_source.c

540

struct pixel_clk_params *pix_clk_params)

sys/dev/pci/drm/amd/display/dc/dce/dce_clock_source.c

570

struct pixel_clk_params *pix_clk_params,

sys/dev/pci/drm/amd/display/dc/dce/dce_clock_source.c

603

struct pixel_clk_params *pix_clk_params,

sys/dev/pci/drm/amd/display/dc/dce/dce_clock_source.c

846

struct pixel_clk_params *pix_clk_params,

sys/dev/pci/drm/amd/display/dc/dce/dce_clock_source.c

920

struct pixel_clk_params *pix_clk_params,

sys/dev/pci/drm/amd/display/dc/dce/dce_clock_source.c

967

struct pixel_clk_params *pix_clk_params,

sys/dev/pci/drm/amd/display/dc/inc/clock_source.h

166

struct pixel_clk_params *,

sys/dev/pci/drm/amd/display/dc/inc/clock_source.h

171

struct pixel_clk_params *,

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

354

struct pixel_clk_params pix_clk_params;

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

885

struct pixel_clk_params *pixel_clk_params)

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

893

pixel_clk_params->requested_pix_clk_100hz = stream->timing.pix_clk_100hz;

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

894

pixel_clk_params->encoder_object_id = stream->link->link_enc->id;

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

895

pixel_clk_params->signal_type = pipe_ctx->stream->signal;

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

896

pixel_clk_params->controller_id = pipe_ctx->stream_res.tg->inst + 1;

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

898

pixel_clk_params->requested_sym_clk = LINK_RATE_LOW *

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

900

pixel_clk_params->flags.ENABLE_SS = 0;

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

901

pixel_clk_params->color_depth =

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

903

pixel_clk_params->flags.DISPLAY_BLANKED = 1;

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

904

pixel_clk_params->flags.SUPPORT_YCBCR420 = (stream->timing.pixel_encoding ==

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

906

pixel_clk_params->pixel_encoding = stream->timing.pixel_encoding;

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

908

pixel_clk_params->color_depth = COLOR_DEPTH_888;

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

911

pixel_clk_params->requested_pix_clk_100hz = pixel_clk_params->requested_pix_clk_100hz / 2;

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

914

pixel_clk_params->requested_pix_clk_100hz *= 2;

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1000

pixel_clk_params->encoder_object_id = stream->link->link_enc->id;

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1001

pixel_clk_params->signal_type = pipe_ctx->stream->signal;

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1002

pixel_clk_params->controller_id = pipe_ctx->stream_res.tg->inst + 1;

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1004

pixel_clk_params->requested_sym_clk = LINK_RATE_LOW *

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1006

pixel_clk_params->flags.ENABLE_SS = 0;

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1007

pixel_clk_params->color_depth =

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1009

pixel_clk_params->flags.DISPLAY_BLANKED = 1;

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1010

pixel_clk_params->pixel_encoding = stream->timing.pixel_encoding;

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1013

pixel_clk_params->color_depth = COLOR_DEPTH_888;

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1016

pixel_clk_params->requested_pix_clk_100hz /= 2;

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1018

pixel_clk_params->requested_pix_clk_100hz *= 2;

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

996

struct pixel_clk_params *pixel_clk_params)

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

999

pixel_clk_params->requested_pix_clk_100hz = stream->timing.pix_clk_100hz;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1217

struct pixel_clk_params *pixel_clk_params)

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1230

pixel_clk_params->requested_pix_clk_100hz = stream->timing.pix_clk_100hz;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1235

pixel_clk_params->encoder_object_id = link_enc->id;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1237

pixel_clk_params->signal_type = pipe_ctx->stream->signal;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1238

pixel_clk_params->controller_id = pipe_ctx->stream_res.tg->inst + 1;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1241

pixel_clk_params->requested_sym_clk = LINK_RATE_LOW *

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1243

pixel_clk_params->flags.ENABLE_SS = 0;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1244

pixel_clk_params->color_depth =

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1246

pixel_clk_params->flags.DISPLAY_BLANKED = 1;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1247

pixel_clk_params->pixel_encoding = stream->timing.pixel_encoding;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1250

pixel_clk_params->color_depth = COLOR_DEPTH_888;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1253

pixel_clk_params->requested_pix_clk_100hz /= 4;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1255

pixel_clk_params->requested_pix_clk_100hz /= 2;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1258

pixel_clk_params->requested_pix_clk_100hz /= 2;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1262

pixel_clk_params->requested_pix_clk_100hz *= 2;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1269

pixel_clk_params->dio_se_pix_per_cycle = 2;

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1271

pixel_clk_params->dio_se_pix_per_cycle = 1;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1698

struct pixel_clk_params *pixel_clk_params = &pipe_ctx->stream_res.pix_clk_params;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1700

pixel_clk_params->requested_pix_clk_100hz = stream->timing.pix_clk_100hz;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1703

pixel_clk_params->requested_pix_clk_100hz = pipe_ctx->dsc_padding_params.dsc_pix_clk_100hz;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1708

pixel_clk_params->encoder_object_id = link_enc->id;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1710

pixel_clk_params->signal_type = pipe_ctx->stream->signal;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1711

pixel_clk_params->controller_id = pipe_ctx->stream_res.tg->inst + 1;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1716

pixel_clk_params->requested_sym_clk = LINK_RATE_LOW *

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1718

pixel_clk_params->flags.ENABLE_SS = 0;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1719

pixel_clk_params->color_depth =

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1721

pixel_clk_params->flags.DISPLAY_BLANKED = 1;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1722

pixel_clk_params->pixel_encoding = stream->timing.pixel_encoding;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1725

pixel_clk_params->color_depth = COLOR_DEPTH_888;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1728

pixel_clk_params->requested_pix_clk_100hz *= 2;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1731

pixel_clk_params->requested_pix_clk_100hz /= 2;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1738

pixel_clk_params->dio_se_pix_per_cycle = 1;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1741

pixel_clk_params->dio_se_pix_per_cycle = 2;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1744

if (pixel_clk_params->requested_pix_clk_100hz > 4 * stream->ctx->dc->clk_mgr->dprefclk_khz * 10) {

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1745

pixel_clk_params->dio_se_pix_per_cycle = 8;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1746

} else if (pixel_clk_params->requested_pix_clk_100hz > 2 * stream->ctx->dc->clk_mgr->dprefclk_khz * 10) {

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1747

pixel_clk_params->dio_se_pix_per_cycle = 4;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1748

} else if (pixel_clk_params->requested_pix_clk_100hz > stream->ctx->dc->clk_mgr->dprefclk_khz * 10) {

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1749

pixel_clk_params->dio_se_pix_per_cycle = 2;

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1751

pixel_clk_params->dio_se_pix_per_cycle = 1;