sys/arch/sparc64/dev/ce4231.c

305

CS_WRITE(sc, AD1848_IADDR, r);

sys/arch/sparc64/dev/ce4231.c

306

CS_WRITE(sc, AD1848_IDATA, v);

sys/arch/sparc64/dev/ce4231.c

315

CS_WRITE(sc, AD1848_IADDR, r);

sys/arch/sparc64/dev/ce4231.c

517

CS_WRITE(sc, AD1848_IADDR, MODE_CHANGE_ENABLE);

sys/arch/sparc64/dev/ce4231.c

518

CS_WRITE(sc, AD1848_IADDR, MODE_CHANGE_ENABLE | SP_INTERFACE_CONFIG);

sys/arch/sparc64/dev/ce4231.c

519

CS_WRITE(sc, AD1848_IDATA, r);

sys/arch/sparc64/dev/ce4231.c

521

CS_WRITE(sc, AD1848_IADDR, MODE_CHANGE_ENABLE | SP_CLOCK_DATA_FORMAT);

sys/arch/sparc64/dev/ce4231.c

522

CS_WRITE(sc, AD1848_IDATA, fs);

sys/arch/sparc64/dev/ce4231.c

532

CS_WRITE(sc, AD1848_IADDR, MODE_CHANGE_ENABLE | CS_REC_FORMAT);

sys/arch/sparc64/dev/ce4231.c

533

CS_WRITE(sc, AD1848_IDATA, fs);

sys/arch/sparc64/dev/ce4231.c

542

CS_WRITE(sc, AD1848_IADDR, 0);

sys/arch/sparc64/dev/ce4231.c

549

CS_WRITE(sc, AD1848_IADDR, SP_TEST_AND_INIT);

sys/dev/sbus/cs4231.c

1219

CS_WRITE(sc, AD1848_STATUS, 0);

sys/dev/sbus/cs4231.c

254

CS_WRITE(sc, AD1848_IADDR, r);

sys/dev/sbus/cs4231.c

255

CS_WRITE(sc, AD1848_IDATA, v);

sys/dev/sbus/cs4231.c

264

CS_WRITE(sc, AD1848_IADDR, r);

sys/dev/sbus/cs4231.c

547

CS_WRITE(sc, AD1848_IADDR, MODE_CHANGE_ENABLE);

sys/dev/sbus/cs4231.c

548

CS_WRITE(sc, AD1848_IADDR, MODE_CHANGE_ENABLE | SP_INTERFACE_CONFIG);

sys/dev/sbus/cs4231.c

549

CS_WRITE(sc, AD1848_IDATA, r);

sys/dev/sbus/cs4231.c

551

CS_WRITE(sc, AD1848_IADDR, MODE_CHANGE_ENABLE | SP_CLOCK_DATA_FORMAT);

sys/dev/sbus/cs4231.c

552

CS_WRITE(sc, AD1848_IDATA, fs);

sys/dev/sbus/cs4231.c

562

CS_WRITE(sc, AD1848_IADDR, MODE_CHANGE_ENABLE | CS_REC_FORMAT);

sys/dev/sbus/cs4231.c

563

CS_WRITE(sc, AD1848_IDATA, fs);

sys/dev/sbus/cs4231.c

572

CS_WRITE(sc, AD1848_IADDR, 0);

sys/dev/sbus/cs4231.c

579

CS_WRITE(sc, AD1848_IADDR, SP_TEST_AND_INIT);