sys/dev/ic/acx.c
1457
CSR_WRITE_4(sc, ACXREG_EEPROM_CONF, 0);
sys/dev/ic/acx.c
1458
CSR_WRITE_4(sc, ACXREG_EEPROM_ADDR, offset);
sys/dev/ic/acx.c
1459
CSR_WRITE_4(sc, ACXREG_EEPROM_CTRL, ACXRV_EEPROM_READ);
sys/dev/ic/acx.c
1485
CSR_WRITE_4(sc, ACXREG_PHY_ADDR, reg);
sys/dev/ic/acx.c
1486
CSR_WRITE_4(sc, ACXREG_PHY_CTRL, ACXRV_PHY_READ);
sys/dev/ic/acx.c
1509
CSR_WRITE_4(sc, ACXREG_PHY_DATA, val);
sys/dev/ic/acx.c
1510
CSR_WRITE_4(sc, ACXREG_PHY_ADDR, reg);
sys/dev/ic/acx.c
1511
CSR_WRITE_4(sc, ACXREG_PHY_CTRL, ACXRV_PHY_WRITE);
sys/dev/ic/acx.c
1663
CSR_WRITE_4(sc, ACXREG_FWMEM_START, ACXRV_FWMEM_START_OP);
sys/dev/ic/acx.c
1665
CSR_WRITE_4(sc, ACXREG_FWMEM_CTRL, 0);
sys/dev/ic/acx.c
1667
CSR_WRITE_4(sc, ACXREG_FWMEM_CTRL, ACXRV_FWMEM_ADDR_AUTOINC);
sys/dev/ic/acx.c
1668
CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset);
sys/dev/ic/acx.c
1673
CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset + (i * 4));
sys/dev/ic/acx.c
1675
CSR_WRITE_4(sc, ACXREG_FWMEM_DATA, betoh32(fw[i]));
sys/dev/ic/acx.c
1679
CSR_WRITE_4(sc, ACXREG_FWMEM_START, ACXRV_FWMEM_START_OP);
sys/dev/ic/acx.c
1681
CSR_WRITE_4(sc, ACXREG_FWMEM_CTRL, 0);
sys/dev/ic/acx.c
1683
CSR_WRITE_4(sc, ACXREG_FWMEM_CTRL, ACXRV_FWMEM_ADDR_AUTOINC);
sys/dev/ic/acx.c
1684
CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset);
sys/dev/ic/acx.c
1691
CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset + (i * 4));
sys/dev/ic/bwi.c
1016
CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
sys/dev/ic/bwi.c
1029
CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
sys/dev/ic/bwi.c
1031
CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
sys/dev/ic/bwi.c
1035
CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
sys/dev/ic/bwi.c
1036
CSR_WRITE_4(sc, BWI_MOBJ_DATA, v);
sys/dev/ic/bwi.c
1119
CSR_WRITE_4(sc, BWI_MAC_STATUS,
sys/dev/ic/bwi.c
1174
CSR_WRITE_4(sc, 0x188, 0x80000000);
sys/dev/ic/bwi.c
1175
CSR_WRITE_4(sc, 0x18c, 0x2000000);
sys/dev/ic/bwi.c
1181
CSR_WRITE_4(sc, BWI_MAC_INTR_STATUS, BWI_INTR_TIMER1);
sys/dev/ic/bwi.c
1189
CSR_WRITE_4(sc, BWI_TXRX_INTR_MASK(i), intrs);
sys/dev/ic/bwi.c
1270
CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
sys/dev/ic/bwi.c
1276
CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
sys/dev/ic/bwi.c
1289
CSR_WRITE_4(sc, BWI_MAC_STATUS, status);
sys/dev/ic/bwi.c
1852
CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
sys/dev/ic/bwi.c
1855
CSR_WRITE_4(sc, BWI_MOBJ_DATA, betoh32(fw[i]));
sys/dev/ic/bwi.c
1865
CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
sys/dev/ic/bwi.c
1867
CSR_WRITE_4(sc, BWI_MOBJ_DATA, 0x4000);
sys/dev/ic/bwi.c
1869
CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
sys/dev/ic/bwi.c
1872
CSR_WRITE_4(sc, BWI_MOBJ_DATA, betoh32(fw[i]));
sys/dev/ic/bwi.c
1876
CSR_WRITE_4(sc, BWI_MAC_INTR_STATUS, BWI_ALL_INTRS);
sys/dev/ic/bwi.c
1877
CSR_WRITE_4(sc, BWI_MAC_STATUS,
sys/dev/ic/bwi.c
1964
CSR_WRITE_4(sc, BWI_GPIO_CTRL, 0);
sys/dev/ic/bwi.c
2021
CSR_WRITE_4(sc, ofs, val32);
sys/dev/ic/bwi.c
2129
CSR_WRITE_4(sc, BWI_MAC_STATUS, mac_status);
sys/dev/ic/bwi.c
2283
CSR_WRITE_4(sc, BWI_MAC_INTR_STATUS, BWI_INTR_READY);
sys/dev/ic/bwi.c
2332
CSR_WRITE_4(sc, BWI_MAC_STATUS, status);
sys/dev/ic/bwi.c
2421
CSR_WRITE_4(sc, txrx_reg, BWI_TXRX32_CTRL_ADDRHI_MASK);
sys/dev/ic/bwi.c
5876
CSR_WRITE_4(sc, 0x100, 0x1000000);
sys/dev/ic/bwi.c
5878
CSR_WRITE_4(sc, 0x10c, 0x1000000);
sys/dev/ic/bwi.c
623
CSR_WRITE_4(sc, BWI_MAC_INTR_STATUS, intr_status);
sys/dev/ic/bwi.c
626
CSR_WRITE_4(sc, BWI_TXRX_INTR_STATUS(i), txrx_intr_status[i]);
sys/dev/ic/bwi.c
6792
CSR_WRITE_4(sc, BWI_BUS_ADDR, BWI_BUS_ADDR_MAGIC);
sys/dev/ic/bwi.c
6794
CSR_WRITE_4(sc, BWI_BUS_DATA, 0);
sys/dev/ic/bwi.c
6957
CSR_WRITE_4(sc, BWI_CLOCK_CTRL, clk_ctrl);
sys/dev/ic/bwi.c
6981
CSR_WRITE_4(sc, BWI_CONTROL, BWI_CONTROL_MAGIC0);
sys/dev/ic/bwi.c
6983
CSR_WRITE_4(sc, BWI_CONTROL, BWI_CONTROL_MAGIC1);
sys/dev/ic/bwi.c
6993
CSR_WRITE_4(sc, BWI_PLL_ON_DELAY,
sys/dev/ic/bwi.c
6995
CSR_WRITE_4(sc, BWI_FREQ_SEL_DELAY,
sys/dev/ic/bwi.c
8072
CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_RINGINFO, val);
sys/dev/ic/bwi.c
8076
CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_CTRL, val);
sys/dev/ic/bwi.c
8093
CSR_WRITE_4(sc, ctrl_base + BWI_RX32_RINGINFO, val);
sys/dev/ic/bwi.c
8098
CSR_WRITE_4(sc, ctrl_base + BWI_RX32_CTRL, val);
sys/dev/ic/bwi.c
8100
CSR_WRITE_4(sc, ctrl_base + BWI_RX32_INDEX,
sys/dev/ic/bwi.c
8494
CSR_WRITE_4(sc, rx_ctrl + BWI_RX32_INDEX,
sys/dev/ic/bwi.c
8505
CSR_WRITE_4(sc, rx_ctrl + BWI_RX32_CTRL, 0);
sys/dev/ic/bwi.c
8522
CSR_WRITE_4(sc, rx_ctrl + BWI_RX32_RINGINFO, 0);
sys/dev/ic/bwi.c
8580
CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_CTRL, 0);
sys/dev/ic/bwi.c
8596
CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_RINGINFO, 0);
sys/dev/ic/bwi.c
9036
CSR_WRITE_4(sc, tx_ctrl + BWI_TX32_INDEX,
sys/dev/ic/bwi.c
9055
CSR_WRITE_4(sc, ctrl_base + BWI_RX32_INDEX,
sys/dev/ic/bwi.c
9208
CSR_WRITE_4(sc, BWI_INTRVEC, 0);
sys/dev/ic/bwi.c
925
CSR_WRITE_4(sc, BWI_MAC_TMPLT_CTRL, ofs);
sys/dev/ic/bwi.c
926
CSR_WRITE_4(sc, BWI_MAC_TMPLT_DATA, val);
sys/dev/ic/bwi.c
9292
CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
sys/dev/ic/bwi.c
9329
CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
sys/dev/ic/bwi.c
9338
CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
sys/dev/ic/bwi.c
9357
CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
sys/dev/ic/bwi.c
9365
CSR_WRITE_4(sc, BWI_STATE_HI, 0);
sys/dev/ic/bwi.c
9370
CSR_WRITE_4(sc, BWI_IMSTATE, imstate);
sys/dev/ic/bwi.c
9377
CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
sys/dev/ic/bwi.c
9386
CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
sys/dev/ic/bwi.c
973
CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
sys/dev/ic/bwi.c
987
CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
sys/dev/ic/bwi.c
991
CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
sys/dev/ic/bwi.c
997
CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
sys/dev/ic/bwivar.h
85
CSR_WRITE_4((sc), (reg), CSR_READ_4((sc), (reg)) | (bits))
sys/dev/ic/bwivar.h
90
CSR_WRITE_4((sc), (reg), (CSR_READ_4((sc), (reg)) & (filt)) | (bits))
sys/dev/ic/bwivar.h
95
CSR_WRITE_4((sc), (reg), CSR_READ_4((sc), (reg)) & ~(bits))
sys/dev/ic/dc.c
1010
CSR_WRITE_4(sc, DC_AL_PAR0, ac->ac_enaddr[3] << 24 |
sys/dev/ic/dc.c
1012
CSR_WRITE_4(sc, DC_AL_PAR1, ac->ac_enaddr[5] << 8 | ac->ac_enaddr[4]);
sys/dev/ic/dc.c
1014
CSR_WRITE_4(sc, DC_AL_MAR0, hashes[0]);
sys/dev/ic/dc.c
1015
CSR_WRITE_4(sc, DC_AL_MAR1, hashes[1]);
sys/dev/ic/dc.c
1060
CSR_WRITE_4(sc, DC_AX_FILTIDX, DC_AX_FILTIDX_PAR0);
sys/dev/ic/dc.c
1061
CSR_WRITE_4(sc, DC_AX_FILTDATA,
sys/dev/ic/dc.c
1063
CSR_WRITE_4(sc, DC_AX_FILTIDX, DC_AX_FILTIDX_PAR1);
sys/dev/ic/dc.c
1064
CSR_WRITE_4(sc, DC_AX_FILTDATA,
sys/dev/ic/dc.c
1067
CSR_WRITE_4(sc, DC_AX_FILTIDX, DC_AX_FILTIDX_MAR0);
sys/dev/ic/dc.c
1068
CSR_WRITE_4(sc, DC_AX_FILTDATA, hashes[0]);
sys/dev/ic/dc.c
1069
CSR_WRITE_4(sc, DC_AX_FILTIDX, DC_AX_FILTIDX_MAR1);
sys/dev/ic/dc.c
1070
CSR_WRITE_4(sc, DC_AX_FILTDATA, hashes[1]);
sys/dev/ic/dc.c
1137
CSR_WRITE_4(sc, DC_TXSTART, 0xFFFFFFFF);
sys/dev/ic/dc.c
1214
CSR_WRITE_4(sc, DC_WATCHDOG, watchdogreg);
sys/dev/ic/dc.c
1255
CSR_WRITE_4(sc, DC_WATCHDOG, watchdogreg);
sys/dev/ic/dc.c
1349
CSR_WRITE_4(sc, DC_IMR, 0x00000000);
sys/dev/ic/dc.c
1350
CSR_WRITE_4(sc, DC_BUSCTL, 0x00000000);
sys/dev/ic/dc.c
1351
CSR_WRITE_4(sc, DC_NETCFG, 0x00000000);
sys/dev/ic/dc.c
1361
CSR_WRITE_4(sc, DC_10BTCTRL, 0);
sys/dev/ic/dc.c
1362
CSR_WRITE_4(sc, DC_WATCHDOG, 0);
sys/dev/ic/dc.c
1390
CSR_WRITE_4(sc, DC_WATCHDOG, reg);
sys/dev/ic/dc.c
1395
CSR_WRITE_4(sc, DC_WATCHDOG, reg);
sys/dev/ic/dc.c
1722
CSR_WRITE_4(sc, DC_SIAGP, DC_SIAGP_WRITE_EN | DC_SIAGP_INT1_EN |
sys/dev/ic/dc.c
1725
CSR_WRITE_4(sc, DC_SIAGP, DC_SIAGP_INT1_EN |
sys/dev/ic/dc.c
196
CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) | (x))
sys/dev/ic/dc.c
199
CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) & ~(x))
sys/dev/ic/dc.c
222
CSR_WRITE_4(sc, DC_SIO, DC_SIO_EESEL);
sys/dev/ic/dc.c
2444
CSR_WRITE_4(sc, DC_IMR, 0x00000000);
sys/dev/ic/dc.c
2451
CSR_WRITE_4(sc, DC_ISR, status);
sys/dev/ic/dc.c
2467
CSR_WRITE_4(sc, DC_TXSTART, 0xFFFFFFFF);
sys/dev/ic/dc.c
2487
CSR_WRITE_4(sc, DC_IMR, DC_INTRS);
sys/dev/ic/dc.c
264
CSR_WRITE_4(sc, DC_SIO, DC_SIO_EESEL);
sys/dev/ic/dc.c
2654
CSR_WRITE_4(sc, DC_TXSTART, 0xFFFFFFFF);
sys/dev/ic/dc.c
2684
CSR_WRITE_4(sc, DC_BUSCTL, 0);
sys/dev/ic/dc.c
2686
CSR_WRITE_4(sc, DC_BUSCTL, DC_BUSCTL_MRME|DC_BUSCTL_MRLE);
sys/dev/ic/dc.c
2746
CSR_WRITE_4(sc, DC_SIAGP, DC_SIAGP_WRITE_EN | DC_SIAGP_INT1_EN |
sys/dev/ic/dc.c
2749
CSR_WRITE_4(sc, DC_SIAGP, DC_SIAGP_INT1_EN |
sys/dev/ic/dc.c
2781
CSR_WRITE_4(sc, DC_RXADDR, sc->sc_listmap->dm_segs[0].ds_addr +
sys/dev/ic/dc.c
2783
CSR_WRITE_4(sc, DC_TXADDR, sc->sc_listmap->dm_segs[0].ds_addr +
sys/dev/ic/dc.c
2789
CSR_WRITE_4(sc, DC_IMR, DC_INTRS);
sys/dev/ic/dc.c
2790
CSR_WRITE_4(sc, DC_ISR, 0xFFFFFFFF);
sys/dev/ic/dc.c
2801
CSR_WRITE_4(sc, DC_WATCHDOG,
sys/dev/ic/dc.c
2803
CSR_WRITE_4(sc, DC_WATCHDOG, 0);
sys/dev/ic/dc.c
2816
CSR_WRITE_4(sc, DC_RXSTART, 0xFFFFFFFF);
sys/dev/ic/dc.c
282
CSR_WRITE_4(sc, DC_SIO, DC_SIO_EESEL);
sys/dev/ic/dc.c
3007
CSR_WRITE_4(sc, DC_IMR, 0x00000000);
sys/dev/ic/dc.c
3008
CSR_WRITE_4(sc, DC_TXADDR, 0x00000000);
sys/dev/ic/dc.c
3009
CSR_WRITE_4(sc, DC_RXADDR, 0x00000000);
sys/dev/ic/dc.c
302
CSR_WRITE_4(sc, DC_SIO, 0x00000000);
sys/dev/ic/dc.c
355
CSR_WRITE_4(sc, DC_PN_SIOCTL, DC_PN_EEOPCODE_READ|addr);
sys/dev/ic/dc.c
378
CSR_WRITE_4(sc, DC_ROM, addr | 0x160);
sys/dev/ic/dc.c
381
CSR_WRITE_4(sc, DC_ROM, addr | 0x160);
sys/dev/ic/dc.c
400
CSR_WRITE_4(sc, DC_SIO, DC_SIO_EESEL);
sys/dev/ic/dc.c
469
CSR_WRITE_4(sc, DC_SIO,
sys/dev/ic/dc.c
472
CSR_WRITE_4(sc, DC_SIO, DC_SIO_ROMCTL_WRITE);
sys/dev/ic/dc.c
484
CSR_WRITE_4(sc, DC_SIO, DC_SIO_ROMCTL_READ|DC_SIO_MII_DIR);
sys/dev/ic/dc.c
501
CSR_WRITE_4(sc, DC_SIO, DC_SIO_ROMCTL_WRITE);
sys/dev/ic/dc.c
682
CSR_WRITE_4(sc, DC_PN_MII, DC_PN_MIIOPCODE_READ |
sys/dev/ic/dc.c
738
CSR_WRITE_4(sc, DC_NETCFG, phy_reg & ~DC_NETCFG_PORTSEL);
sys/dev/ic/dc.c
742
CSR_WRITE_4(sc, DC_NETCFG, phy_reg);
sys/dev/ic/dc.c
762
CSR_WRITE_4(sc, DC_PN_MII, DC_PN_MIIOPCODE_WRITE |
sys/dev/ic/dc.c
800
CSR_WRITE_4(sc, phy_reg, data);
sys/dev/ic/dc.c
810
CSR_WRITE_4(sc, DC_NETCFG, phy_reg & ~DC_NETCFG_PORTSEL);
sys/dev/ic/dc.c
814
CSR_WRITE_4(sc, DC_NETCFG, phy_reg);
sys/dev/ic/dc.c
958
CSR_WRITE_4(sc, DC_TXSTART, 0xFFFFFFFF);
sys/dev/ic/fxp.c
1066
CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET);
sys/dev/ic/fxp.c
1162
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0);
sys/dev/ic/fxp.c
1166
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0);
sys/dev/ic/fxp.c
1193
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL,
sys/dev/ic/fxp.c
1293
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->tx_cb_map->dm_segs->ds_addr +
sys/dev/ic/fxp.c
1324
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->tx_cb_map->dm_segs->ds_addr +
sys/dev/ic/fxp.c
1368
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->tx_cb_map->dm_segs->ds_addr +
sys/dev/ic/fxp.c
1576
CSR_WRITE_4(sc, FXP_CSR_MDICONTROL,
sys/dev/ic/fxp.c
1601
CSR_WRITE_4(sc, FXP_CSR_MDICONTROL,
sys/dev/ic/fxp.c
1733
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->tx_cb_map->dm_segs->ds_addr +
sys/dev/ic/fxp.c
1868
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->tx_cb_map->dm_segs->ds_addr
sys/dev/ic/fxp.c
333
CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SOFTWARE_RESET);
sys/dev/ic/fxp.c
906
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL,
sys/dev/ic/mtd8xx.c
1057
CSR_WRITE_4(MTD_TXPDR, 0xffffffff);
sys/dev/ic/mtd8xx.c
224
CSR_WRITE_4(MTD_MIIMGT, miir);
sys/dev/ic/mtd8xx.c
226
CSR_WRITE_4(MTD_MIIMGT, miir);
sys/dev/ic/mtd8xx.c
235
CSR_WRITE_4(MTD_MIIMGT, miir);
sys/dev/ic/mtd8xx.c
237
CSR_WRITE_4(MTD_MIIMGT, miir);
sys/dev/ic/mtd8xx.c
261
CSR_WRITE_4(MTD_MIIMGT, miir);
sys/dev/ic/mtd8xx.c
266
CSR_WRITE_4(MTD_MIIMGT, miir);
sys/dev/ic/mtd8xx.c
270
CSR_WRITE_4(MTD_MIIMGT, miir);
sys/dev/ic/mtd8xx.c
293
CSR_WRITE_4(MTD_MIIMGT, miir);
sys/dev/ic/mtd8xx.c
295
CSR_WRITE_4(MTD_MIIMGT, miir);
sys/dev/ic/mtd8xx.c
299
CSR_WRITE_4(MTD_MIIMGT, miir);
sys/dev/ic/mtd8xx.c
327
CSR_WRITE_4(MTD_TCRRCR, rxfilt);
sys/dev/ic/mtd8xx.c
328
CSR_WRITE_4(MTD_MAR0, 0xffffffff);
sys/dev/ic/mtd8xx.c
329
CSR_WRITE_4(MTD_MAR4, 0xffffffff);
sys/dev/ic/mtd8xx.c
334
CSR_WRITE_4(MTD_MAR0, 0);
sys/dev/ic/mtd8xx.c
335
CSR_WRITE_4(MTD_MAR4, 0);
sys/dev/ic/mtd8xx.c
348
CSR_WRITE_4(MTD_MAR0, hash[0]);
sys/dev/ic/mtd8xx.c
349
CSR_WRITE_4(MTD_MAR4, hash[1]);
sys/dev/ic/mtd8xx.c
350
CSR_WRITE_4(MTD_TCRRCR, rxfilt);
sys/dev/ic/mtd8xx.c
548
CSR_WRITE_4(MTD_BCR, BCR_SWR);
sys/dev/ic/mtd8xx.c
635
CSR_WRITE_4(MTD_BCR, BCR_PBL8);
sys/dev/ic/mtd8xx.c
636
CSR_WRITE_4(MTD_TCRRCR, TCR_TFTSF | RCR_RBLEN | RCR_RPBL512);
sys/dev/ic/mtd8xx.c
662
CSR_WRITE_4(MTD_RXLBA, sc->sc_listmap->dm_segs[0].ds_addr +
sys/dev/ic/mtd8xx.c
664
CSR_WRITE_4(MTD_TXLBA, sc->sc_listmap->dm_segs[0].ds_addr +
sys/dev/ic/mtd8xx.c
670
CSR_WRITE_4(MTD_IMR, IMR_INTRS);
sys/dev/ic/mtd8xx.c
671
CSR_WRITE_4(MTD_ISR, 0xffffffff);
sys/dev/ic/mtd8xx.c
675
CSR_WRITE_4(MTD_RXPDR, 0xffffffff);
sys/dev/ic/mtd8xx.c
727
CSR_WRITE_4(MTD_TXPDR, 0xffffffff);
sys/dev/ic/mtd8xx.c
747
CSR_WRITE_4(MTD_IMR, 0);
sys/dev/ic/mtd8xx.c
748
CSR_WRITE_4(MTD_TXLBA, 0);
sys/dev/ic/mtd8xx.c
749
CSR_WRITE_4(MTD_RXLBA, 0);
sys/dev/ic/mtd8xx.c
822
CSR_WRITE_4(MTD_IMR, 0);
sys/dev/ic/mtd8xx.c
827
CSR_WRITE_4(MTD_ISR, status);
sys/dev/ic/mtd8xx.c
852
CSR_WRITE_4(MTD_IMR, IMR_INTRS);
sys/dev/ic/mtd8xxreg.h
212
#define CSR_SETBIT(reg, val) CSR_WRITE_4(reg, CSR_READ_4(reg) | (val))
sys/dev/ic/mtd8xxreg.h
213
#define CSR_CLRBIT(reg, val) CSR_WRITE_4(reg, CSR_READ_4(reg) & ~(val))
sys/dev/ic/re.c
1597
CSR_WRITE_4(sc, RL_TIMERCNT, 1); /* reload */
sys/dev/ic/re.c
1924
CSR_WRITE_4(sc, RL_IDR4,
sys/dev/ic/re.c
1926
CSR_WRITE_4(sc, RL_IDR0,
sys/dev/ic/re.c
1957
CSR_WRITE_4(sc, RL_RXLIST_ADDR_HI,
sys/dev/ic/re.c
1959
CSR_WRITE_4(sc, RL_RXLIST_ADDR_LO,
sys/dev/ic/re.c
1962
CSR_WRITE_4(sc, RL_TXLIST_ADDR_HI,
sys/dev/ic/re.c
1964
CSR_WRITE_4(sc, RL_TXLIST_ADDR_LO,
sys/dev/ic/re.c
1968
CSR_WRITE_4(sc, RL_MISC, CSR_READ_4(sc, RL_MISC) &
sys/dev/ic/re.c
1974
CSR_WRITE_4(sc, RL_TXCFG, RL_TXCFG_CONFIG);
sys/dev/ic/re.c
1983
CSR_WRITE_4(sc, RL_RXCFG, rxcfg);
sys/dev/ic/re.c
2000
CSR_WRITE_4(sc, RL_MISSEDPKT, 0);
sys/dev/ic/re.c
2146
CSR_WRITE_4(sc, RL_RXCFG, CSR_READ_4(sc, RL_RXCFG) &
sys/dev/ic/re.c
2259
CSR_WRITE_4(sc, RL_TIMERINT, 0x400); /* XXX */
sys/dev/ic/re.c
2269
CSR_WRITE_4(sc, RL_TIMERINT_8169, nticks);
sys/dev/ic/re.c
2271
CSR_WRITE_4(sc, RL_TIMERCNT, 1); /* reload */
sys/dev/ic/re.c
2279
CSR_WRITE_4(sc, RL_TIMERINT, 0);
sys/dev/ic/re.c
2281
CSR_WRITE_4(sc, RL_TIMERINT_8169, 0);
sys/dev/ic/re.c
2500
CSR_WRITE_4(sc, RE_DTCCR_HI, RL_ADDR_HI(addr));
sys/dev/ic/re.c
2504
CSR_WRITE_4(sc, RE_DTCCR_LO, RL_ADDR_LO(addr));
sys/dev/ic/re.c
2507
CSR_WRITE_4(sc, RE_DTCCR_LO, RL_ADDR_LO(addr) | RE_DTCCR_CMD);
sys/dev/ic/re.c
379
CSR_WRITE_4(sc, RL_PHYAR, reg << 16);
sys/dev/ic/re.c
405
CSR_WRITE_4(sc, RL_PHYAR, (reg << 16) |
sys/dev/ic/re.c
627
CSR_WRITE_4(sc, RL_MAR0, swap32(hashes[1]));
sys/dev/ic/re.c
628
CSR_WRITE_4(sc, RL_MAR4, swap32(hashes[0]));
sys/dev/ic/re.c
630
CSR_WRITE_4(sc, RL_MAR0, hashes[0]);
sys/dev/ic/re.c
631
CSR_WRITE_4(sc, RL_MAR4, hashes[1]);
sys/dev/ic/re.c
634
CSR_WRITE_4(sc, RL_RXCFG, rxfilt);
sys/dev/ic/rtl81x9.c
1094
CSR_WRITE_4(sc, RL_TXADDR0 + (i * sizeof(u_int32_t)),
sys/dev/ic/rtl81x9.c
485
CSR_WRITE_4(sc, RL_MAR0, hashes[0]);
sys/dev/ic/rtl81x9.c
486
CSR_WRITE_4(sc, RL_MAR4, hashes[1]);
sys/dev/ic/rtl81x9.c
487
CSR_WRITE_4(sc, RL_RXCFG, rxfilt);
sys/dev/ic/rtl81x9.c
518
CSR_WRITE_4(sc,
sys/dev/ic/rtl81x9.c
727
CSR_WRITE_4(sc, RL_TXCFG, RL_TXCFG_CONFIG);
sys/dev/ic/rtl81x9.c
874
CSR_WRITE_4(sc, RL_CUR_TXADDR(sc),
sys/dev/ic/rtl81x9.c
876
CSR_WRITE_4(sc, RL_CUR_TXSTAT(sc),
sys/dev/ic/rtl81x9.c
930
CSR_WRITE_4(sc, RL_RXADDR, sc->rl_cdata.rl_rx_buf_pa);
sys/dev/ic/rtl81x9.c
943
CSR_WRITE_4(sc, RL_TXCFG, RL_TXCFG_CONFIG);
sys/dev/ic/rtl81x9.c
944
CSR_WRITE_4(sc, RL_RXCFG, RL_RXCFG_CONFIG);
sys/dev/ic/rtl81x9.c
960
CSR_WRITE_4(sc, RL_MISSEDPKT, 0);
sys/dev/ic/rtl81x9reg.h
987
CSR_WRITE_4(sc, offset, CSR_READ_4(sc, offset) | (val))
sys/dev/ic/rtl81x9reg.h
990
CSR_WRITE_4(sc, offset, CSR_READ_4(sc, offset) & ~(val))
sys/dev/ic/ti.c
1022
CSR_WRITE_4(sc, TI_MB_HOSTINTR, intrs);
sys/dev/ic/ti.c
1036
CSR_WRITE_4(sc, 0x600, 0);
sys/dev/ic/ti.c
1037
CSR_WRITE_4(sc, 0x604, 0);
sys/dev/ic/ti.c
1038
CSR_WRITE_4(sc, 0x600, 0x5555AAAA);
sys/dev/ic/ti.c
1066
CSR_WRITE_4(sc, TI_MISC_HOST_CTL,
sys/dev/ic/ti.c
1108
CSR_WRITE_4(sc, TI_GCR_DMA_WRITECFG, TI_DMA_STATE_THRESH_8W);
sys/dev/ic/ti.c
1109
CSR_WRITE_4(sc, TI_GCR_DMA_READCFG, TI_DMA_STATE_THRESH_8W);
sys/dev/ic/ti.c
1127
CSR_WRITE_4(sc, TI_PCI_STATE, TI_PCI_READ_CMD | TI_PCI_WRITE_CMD);
sys/dev/ic/ti.c
1155
CSR_WRITE_4(sc, TI_PCI_CMDSTAT, CSR_READ_4(sc,
sys/dev/ic/ti.c
1178
CSR_WRITE_4(sc, TI_GCR_OPMODE, TI_DMA_SWAP_OPTIONS |
sys/dev/ic/ti.c
1187
CSR_WRITE_4(sc, TI_PCI_STATE, TI_PCI_READ_CMD | TI_PCI_WRITE_CMD |
sys/dev/ic/ti.c
1193
CSR_WRITE_4(sc, TI_GCR_OPMODE, TI_OPMODE_WORDSWAP_BD |
sys/dev/ic/ti.c
1213
CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1);
sys/dev/ic/ti.c
1221
CSR_WRITE_4(sc, TI_GCR_GENINFO_HI, 0);
sys/dev/ic/ti.c
1222
CSR_WRITE_4(sc, TI_GCR_GENINFO_LO,
sys/dev/ic/ti.c
1238
CSR_WRITE_4(sc, TI_GCR_EVENTCONS_IDX, 0);
sys/dev/ic/ti.c
1248
CSR_WRITE_4(sc, TI_GCR_CMDRING + (i * 4), 0);
sys/dev/ic/ti.c
1250
CSR_WRITE_4(sc, TI_GCR_CMDCONS_IDX, 0);
sys/dev/ic/ti.c
1251
CSR_WRITE_4(sc, TI_MB_CMDPROD_IDX, 0);
sys/dev/ic/ti.c
1322
CSR_WRITE_4(sc, TI_WINBASE, TI_TX_RING_BASE);
sys/dev/ic/ti.c
1347
CSR_WRITE_4(sc, TI_GCR_RX_COAL_TICKS, (sc->ti_rx_coal_ticks / 10));
sys/dev/ic/ti.c
1348
CSR_WRITE_4(sc, TI_GCR_TX_COAL_TICKS, sc->ti_tx_coal_ticks);
sys/dev/ic/ti.c
1349
CSR_WRITE_4(sc, TI_GCR_STAT_TICKS, sc->ti_stat_ticks);
sys/dev/ic/ti.c
1350
CSR_WRITE_4(sc, TI_GCR_RX_MAX_COAL_BD, sc->ti_rx_max_coal_bds);
sys/dev/ic/ti.c
1351
CSR_WRITE_4(sc, TI_GCR_TX_MAX_COAL_BD, sc->ti_tx_max_coal_bds);
sys/dev/ic/ti.c
1352
CSR_WRITE_4(sc, TI_GCR_TX_BUFFER_RATIO, sc->ti_tx_buf_ratio);
sys/dev/ic/ti.c
1355
CSR_WRITE_4(sc, TI_GCR_MASK_INTRS, 0);
sys/dev/ic/ti.c
1356
CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0);
sys/dev/ic/ti.c
1609
CSR_WRITE_4(sc, TI_GCR_RXRETURNCONS_IDX,
sys/dev/ic/ti.c
1722
CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1);
sys/dev/ic/ti.c
1738
CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0);
sys/dev/ic/ti.c
1989
CSR_WRITE_4(sc, TI_MB_SENDPROD_IDX, prodidx);
sys/dev/ic/ti.c
2030
CSR_WRITE_4(sc, TI_GCR_IFINDEX, sc->sc_dv.dv_unit);
sys/dev/ic/ti.c
2031
CSR_WRITE_4(sc, TI_GCR_IFMTU,
sys/dev/ic/ti.c
2037
CSR_WRITE_4(sc, TI_GCR_PAR0, htons(m[0]));
sys/dev/ic/ti.c
2038
CSR_WRITE_4(sc, TI_GCR_PAR1, (htons(m[1]) << 16) | htons(m[2]));
sys/dev/ic/ti.c
2065
CSR_WRITE_4(sc, TI_GCR_RXRETURNCONS_IDX, 0);
sys/dev/ic/ti.c
2075
CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0);
sys/dev/ic/ti.c
2111
CSR_WRITE_4(sc, TI_GCR_GLINK, TI_GLNK_PREF|TI_GLNK_1000MB|
sys/dev/ic/ti.c
2114
CSR_WRITE_4(sc, TI_GCR_LINK, TI_LNK_100MB|TI_LNK_10MB|
sys/dev/ic/ti.c
2122
CSR_WRITE_4(sc, TI_GCR_GLINK, TI_GLNK_PREF|TI_GLNK_1000MB|
sys/dev/ic/ti.c
2124
CSR_WRITE_4(sc, TI_GCR_LINK, 0);
sys/dev/ic/ti.c
2135
CSR_WRITE_4(sc, TI_GCR_GLINK, 0);
sys/dev/ic/ti.c
2136
CSR_WRITE_4(sc, TI_GCR_LINK, TI_LNK_ENB|TI_LNK_PREF);
sys/dev/ic/ti.c
2284
CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1);
sys/dev/ic/ti.c
314
CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1)));
sys/dev/ic/ti.c
344
CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1)));
sys/dev/ic/ti.c
371
CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1)));
sys/dev/ic/ti.c
436
CSR_WRITE_4(sc, TI_CPU_PROGRAM_COUNTER, tf->FwStartAddr);
sys/dev/ic/ti.c
449
CSR_WRITE_4(sc, TI_GCR_CMDRING + (index * 4), *(u_int32_t *)(cmd));
sys/dev/ic/ti.c
451
CSR_WRITE_4(sc, TI_MB_CMDPROD_IDX, index);
sys/dev/ic/ti.c
467
CSR_WRITE_4(sc, TI_GCR_CMDRING + (index * 4), *(u_int32_t *)(cmd));
sys/dev/ic/ti.c
470
CSR_WRITE_4(sc, TI_GCR_CMDRING + (index * 4),
sys/dev/ic/ti.c
474
CSR_WRITE_4(sc, TI_MB_CMDPROD_IDX, index);
sys/dev/ic/ti.c
550
CSR_WRITE_4(sc, TI_GCR_EVENTCONS_IDX, sc->ti_ev_saved_considx);
sys/dev/ic/ti.c
876
CSR_WRITE_4(sc, TI_MB_SENDPROD_IDX, 0);
sys/dev/ic/ti.c
912
CSR_WRITE_4(sc, TI_GCR_MAR0, htons(m[0]));
sys/dev/ic/ti.c
913
CSR_WRITE_4(sc, TI_GCR_MAR1, (htons(m[1]) << 16) | htons(m[2]));
sys/dev/ic/ti.c
938
CSR_WRITE_4(sc, TI_GCR_MAR0, htons(m[0]));
sys/dev/ic/ti.c
939
CSR_WRITE_4(sc, TI_GCR_MAR1, (htons(m[1]) << 16) | htons(m[2]));
sys/dev/ic/ti.c
994
CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1);
sys/dev/ic/tireg.h
931
CSR_WRITE_4(x, TI_MB_JUMBORXPROD_IDX, y); \
sys/dev/ic/tireg.h
937
CSR_WRITE_4(x, TI_MB_MINIRXPROD_IDX, y); \
sys/dev/ic/tireg.h
945
CSR_WRITE_4(x, TI_MB_STDRXPROD_IDX, y); \
sys/dev/ic/tireg.h
995
CSR_WRITE_4(sc, (reg), (CSR_READ_4(sc, (reg)) | (x)))
sys/dev/ic/tireg.h
997
CSR_WRITE_4(sc, (reg), (CSR_READ_4(sc, (reg)) & ~(x)))
sys/dev/ic/xl.c
1292
CSR_WRITE_4(sc, XL_DOWNLIST_PTR,
sys/dev/ic/xl.c
1369
CSR_WRITE_4(sc, XL_DOWNLIST_PTR,
sys/dev/ic/xl.c
1375
CSR_WRITE_4(sc, XL_DOWNLIST_PTR,
sys/dev/ic/xl.c
1734
CSR_WRITE_4(sc, XL_DOWNLIST_PTR,
sys/dev/ic/xl.c
1948
CSR_WRITE_4(sc, XL_UPLIST_PTR, sc->sc_listmap->dm_segs[0].ds_addr +
sys/dev/ic/xl.c
1959
CSR_WRITE_4(sc, XL_DOWNLIST_PTR,
sys/dev/ic/xl.c
2013
CSR_WRITE_4(sc, XL_DMACTL, XL_DMACTL_UP_RX_EARLY);
sys/dev/ic/xl.c
665
CSR_WRITE_4(sc, XL_W3_INTERNAL_CFG, icfg);
sys/dev/ic/xl.c
751
CSR_WRITE_4(sc, XL_W3_INTERNAL_CFG, icfg);
sys/dev/mii/dcphy.c
139
CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0);
sys/dev/mii/dcphy.c
140
CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0);
sys/dev/mii/dcphy.c
230
CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
sys/dev/mii/dcphy.c
247
CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
sys/dev/mii/dcphy.c
401
CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF);
sys/dev/mii/dcphy.c
403
CSR_WRITE_4(sc, DC_10BTCTRL, 0xFFFF);
sys/dev/mii/dcphy.c
68
CSR_WRITE_4(sc, reg, \
sys/dev/mii/dcphy.c
72
CSR_WRITE_4(sc, reg, \
sys/dev/pci/if_age.c
1109
CSR_WRITE_4(sc, AGE_MAC_CFG, reg);
sys/dev/pci/if_age.c
1488
CSR_WRITE_4(sc, AGE_MASTER_CFG, MASTER_RESET);
sys/dev/pci/if_age.c
1502
CSR_WRITE_4(sc, 0x12FC, 0x6500);
sys/dev/pci/if_age.c
1503
CSR_WRITE_4(sc, 0x1008, CSR_READ_4(sc, 0x1008) | 0x8000);
sys/dev/pci/if_age.c
1541
CSR_WRITE_4(sc, AGE_PAR0,
sys/dev/pci/if_age.c
1543
CSR_WRITE_4(sc, AGE_PAR1, eaddr[0] << 8 | eaddr[1]);
sys/dev/pci/if_age.c
1547
CSR_WRITE_4(sc, AGE_DESC_ADDR_HI, AGE_ADDR_HI(paddr));
sys/dev/pci/if_age.c
1549
CSR_WRITE_4(sc, AGE_DESC_RD_ADDR_LO, AGE_ADDR_LO(paddr));
sys/dev/pci/if_age.c
1551
CSR_WRITE_4(sc, AGE_DESC_RRD_ADDR_LO, AGE_ADDR_LO(paddr));
sys/dev/pci/if_age.c
1553
CSR_WRITE_4(sc, AGE_DESC_TPD_ADDR_LO, AGE_ADDR_LO(paddr));
sys/dev/pci/if_age.c
1555
CSR_WRITE_4(sc, AGE_DESC_CMB_ADDR_LO, AGE_ADDR_LO(paddr));
sys/dev/pci/if_age.c
1557
CSR_WRITE_4(sc, AGE_DESC_SMB_ADDR_LO, AGE_ADDR_LO(paddr));
sys/dev/pci/if_age.c
1560
CSR_WRITE_4(sc, AGE_DESC_RRD_RD_CNT,
sys/dev/pci/if_age.c
1566
CSR_WRITE_4(sc, AGE_DESC_TPD_CNT,
sys/dev/pci/if_age.c
1570
CSR_WRITE_4(sc, AGE_DMA_BLOCK, DMA_BLOCK_LOAD);
sys/dev/pci/if_age.c
1586
CSR_WRITE_4(sc, AGE_IPG_IFG_CFG,
sys/dev/pci/if_age.c
1593
CSR_WRITE_4(sc, AGE_HDPX_CFG,
sys/dev/pci/if_age.c
1612
CSR_WRITE_4(sc, AGE_MASTER_CFG, reg);
sys/dev/pci/if_age.c
1625
CSR_WRITE_4(sc, AGE_FRAME_SIZE, sc->age_max_frame_size);
sys/dev/pci/if_age.c
1629
CSR_WRITE_4(sc, AGE_RXQ_JUMBO_CFG,
sys/dev/pci/if_age.c
1643
CSR_WRITE_4(sc, 0x12FC, 0x6500);
sys/dev/pci/if_age.c
1648
CSR_WRITE_4(sc, 0x1008, CSR_READ_4(sc, 0x1008) | 0x8000);
sys/dev/pci/if_age.c
1684
CSR_WRITE_4(sc, AGE_RXQ_FIFO_PAUSE_THRESH,
sys/dev/pci/if_age.c
1689
CSR_WRITE_4(sc, AGE_RXQ_RRD_PAUSE_THRESH,
sys/dev/pci/if_age.c
1696
CSR_WRITE_4(sc, AGE_RXQ_CFG,
sys/dev/pci/if_age.c
1706
CSR_WRITE_4(sc, AGE_TXQ_CFG,
sys/dev/pci/if_age.c
1716
CSR_WRITE_4(sc, AGE_DMA_CFG,
sys/dev/pci/if_age.c
1722
CSR_WRITE_4(sc, AGE_CMB_WR_THRESH,
sys/dev/pci/if_age.c
1729
CSR_WRITE_4(sc, AGE_CMB_WR_TIMER,
sys/dev/pci/if_age.c
1734
CSR_WRITE_4(sc, AGE_SMB_TIMER, AGE_USECS(1000 * 1000));
sys/dev/pci/if_age.c
1735
CSR_WRITE_4(sc, AGE_CSMB_CTRL, CSMB_CTRL_SMB_ENB | CSMB_CTRL_CMB_ENB);
sys/dev/pci/if_age.c
1741
CSR_WRITE_4(sc, AGE_WOL_CFG, 0);
sys/dev/pci/if_age.c
1750
CSR_WRITE_4(sc, AGE_MAC_CFG,
sys/dev/pci/if_age.c
1765
CSR_WRITE_4(sc, AGE_INTR_STATUS, 0);
sys/dev/pci/if_age.c
1766
CSR_WRITE_4(sc, AGE_INTR_MASK, AGE_INTRS);
sys/dev/pci/if_age.c
1769
CSR_WRITE_4(sc, AGE_MAC_CFG, reg | MAC_CFG_TX_ENB | MAC_CFG_RX_ENB);
sys/dev/pci/if_age.c
1806
CSR_WRITE_4(sc, AGE_INTR_MASK, 0);
sys/dev/pci/if_age.c
1807
CSR_WRITE_4(sc, AGE_INTR_STATUS, 0xFFFFFFFF);
sys/dev/pci/if_age.c
1810
CSR_WRITE_4(sc, AGE_CSMB_CTRL, 0);
sys/dev/pci/if_age.c
1817
CSR_WRITE_4(sc, AGE_DMA_CFG,
sys/dev/pci/if_age.c
1821
CSR_WRITE_4(sc, AGE_TXQ_CFG,
sys/dev/pci/if_age.c
1823
CSR_WRITE_4(sc, AGE_RXQ_CFG,
sys/dev/pci/if_age.c
1963
CSR_WRITE_4(sc, AGE_MAC_CFG, reg);
sys/dev/pci/if_age.c
1969
CSR_WRITE_4(sc, AGE_DMA_CFG, reg);
sys/dev/pci/if_age.c
1990
CSR_WRITE_4(sc, AGE_MAC_CFG, reg);
sys/dev/pci/if_age.c
1996
CSR_WRITE_4(sc, AGE_DMA_CFG, reg);
sys/dev/pci/if_age.c
2155
CSR_WRITE_4(sc, AGE_MAC_CFG, reg);
sys/dev/pci/if_age.c
2200
CSR_WRITE_4(sc, AGE_MAR0, mchash[0]);
sys/dev/pci/if_age.c
2201
CSR_WRITE_4(sc, AGE_MAR1, mchash[1]);
sys/dev/pci/if_age.c
2202
CSR_WRITE_4(sc, AGE_MAC_CFG, rxcfg);
sys/dev/pci/if_age.c
312
CSR_WRITE_4(sc, AGE_MDIO, MDIO_OP_EXECUTE | MDIO_OP_READ |
sys/dev/pci/if_age.c
343
CSR_WRITE_4(sc, AGE_MDIO, MDIO_OP_EXECUTE | MDIO_OP_WRITE |
sys/dev/pci/if_age.c
397
CSR_WRITE_4(sc, AGE_DMA_CFG, CSR_READ_4(sc, AGE_DMA_CFG) |
sys/dev/pci/if_age.c
400
CSR_WRITE_4(sc, AGE_MAC_CFG, reg);
sys/dev/pci/if_age.c
452
CSR_WRITE_4(sc, AGE_INTR_STATUS, status | INTR_DIS_INT);
sys/dev/pci/if_age.c
502
CSR_WRITE_4(sc, AGE_INTR_STATUS, 0);
sys/dev/pci/if_age.c
517
CSR_WRITE_4(sc, AGE_SPI_CTRL, reg);
sys/dev/pci/if_age.c
526
CSR_WRITE_4(sc, AGE_TWSI_CTRL, CSR_READ_4(sc, AGE_TWSI_CTRL) |
sys/dev/pci/if_age.c
560
CSR_WRITE_4(sc, AGE_GPHY_CTRL, GPHY_CTRL_RST);
sys/dev/pci/if_age.c
562
CSR_WRITE_4(sc, AGE_GPHY_CTRL, GPHY_CTRL_CLR);
sys/dev/pci/if_agereg.h
875
CSR_WRITE_4(_sc, AGE_MBOX, \
sys/dev/pci/if_alc.c
1055
CSR_WRITE_4(sc, ALC_PM_CFG, pmcfg);
sys/dev/pci/if_alc.c
1091
CSR_WRITE_4(sc, ALC_PM_CFG, pmcfg);
sys/dev/pci/if_alc.c
1104
CSR_WRITE_4(sc, ALC_PEX_UNC_ERR_SEV, val);
sys/dev/pci/if_alc.c
1107
CSR_WRITE_4(sc, ALC_LTSSM_ID_CFG,
sys/dev/pci/if_alc.c
1109
CSR_WRITE_4(sc, ALC_PCIE_PHYMISC,
sys/dev/pci/if_alc.c
1119
CSR_WRITE_4(sc, ALC_PCIE_PHYMISC2, val);
sys/dev/pci/if_alc.c
1148
CSR_WRITE_4(sc, ALC_PDLL_TRNS1, val);
sys/dev/pci/if_alc.c
1155
CSR_WRITE_4(sc, ALC_MASTER_CFG, val);
sys/dev/pci/if_alc.c
1162
CSR_WRITE_4(sc, ALC_MASTER_CFG, val);
sys/dev/pci/if_alc.c
1188
CSR_WRITE_4(sc, ALC_MSI_RETRANS_TIMER, ctl |
sys/dev/pci/if_alc.c
1191
CSR_WRITE_4(sc, ALC_MSI_RETRANS_TIMER, 0);
sys/dev/pci/if_alc.c
1942
CSR_WRITE_4(sc, ALC_MBOX_TD_PROD_IDX,
sys/dev/pci/if_alc.c
198
CSR_WRITE_4(sc, ALC_MDIO, MDIO_OP_EXECUTE | MDIO_OP_READ |
sys/dev/pci/if_alc.c
2051
CSR_WRITE_4(sc, ALC_MAC_CFG, reg);
sys/dev/pci/if_alc.c
2206
CSR_WRITE_4(sc, ALC_INTR_STATUS, INTR_DIS_INT);
sys/dev/pci/if_alc.c
2213
CSR_WRITE_4(sc, ALC_INTR_STATUS, status | INTR_DIS_INT);
sys/dev/pci/if_alc.c
2247
CSR_WRITE_4(sc, ALC_INTR_STATUS, 0x7FFFFFFF);
sys/dev/pci/if_alc.c
227
CSR_WRITE_4(sc, ALC_MDIO, MDIO_OP_EXECUTE | MDIO_OP_READ |
sys/dev/pci/if_alc.c
2421
CSR_WRITE_4(sc, ALC_MBOX_RD0_PROD_IDX,
sys/dev/pci/if_alc.c
2566
CSR_WRITE_4(sc, ALC_MISC3, reg);
sys/dev/pci/if_alc.c
2576
CSR_WRITE_4(sc, ALC_MISC, reg);
sys/dev/pci/if_alc.c
2577
CSR_WRITE_4(sc, ALC_MISC, reg | MISC_INTNLOSC_OPEN);
sys/dev/pci/if_alc.c
2580
CSR_WRITE_4(sc, ALC_MISC2, reg);
sys/dev/pci/if_alc.c
2581
CSR_WRITE_4(sc, ALC_MISC2, reg | MISC2_CALB_START);
sys/dev/pci/if_alc.c
2587
CSR_WRITE_4(sc, ALC_MISC, reg | MISC_INTNLOSC_OPEN);
sys/dev/pci/if_alc.c
2588
CSR_WRITE_4(sc, ALC_MISC, reg);
sys/dev/pci/if_alc.c
2601
CSR_WRITE_4(sc, ALC_MBOX_RD0_PROD_IDX, 1);
sys/dev/pci/if_alc.c
2610
CSR_WRITE_4(sc, ALC_PM_CFG, pmcfg);
sys/dev/pci/if_alc.c
2616
CSR_WRITE_4(sc, ALC_MASTER_CFG, reg);
sys/dev/pci/if_alc.c
2652
CSR_WRITE_4(sc, ALC_MASTER_CFG, reg);
sys/dev/pci/if_alc.c
2656
CSR_WRITE_4(sc, ALC_PM_CFG, pmcfg);
sys/dev/pci/if_alc.c
266
CSR_WRITE_4(sc, ALC_MDIO, MDIO_OP_EXECUTE | MDIO_OP_WRITE |
sys/dev/pci/if_alc.c
2662
CSR_WRITE_4(sc, ALC_MISC3, reg);
sys/dev/pci/if_alc.c
2667
CSR_WRITE_4(sc, ALC_MISC, reg);
sys/dev/pci/if_alc.c
2673
CSR_WRITE_4(sc, ALC_SERDES_LOCK,
sys/dev/pci/if_alc.c
2710
CSR_WRITE_4(sc, ALC_CLK_GATING_CFG, CLK_GATING_DMAW_ENB |
sys/dev/pci/if_alc.c
2715
CSR_WRITE_4(sc, ALC_IDLE_DECISN_TIMER,
sys/dev/pci/if_alc.c
2718
CSR_WRITE_4(sc, ALC_CLK_GATING_CFG, 0);
sys/dev/pci/if_alc.c
2722
CSR_WRITE_4(sc, ALC_PAR0,
sys/dev/pci/if_alc.c
2724
CSR_WRITE_4(sc, ALC_PAR1, eaddr[0] << 8 | eaddr[1]);
sys/dev/pci/if_alc.c
2730
CSR_WRITE_4(sc, ALC_WOL_CFG, 0);
sys/dev/pci/if_alc.c
2733
CSR_WRITE_4(sc, ALC_TX_BASE_ADDR_HI, ALC_ADDR_HI(paddr));
sys/dev/pci/if_alc.c
2734
CSR_WRITE_4(sc, ALC_TDL_HEAD_ADDR_LO, ALC_ADDR_LO(paddr));
sys/dev/pci/if_alc.c
2736
CSR_WRITE_4(sc, ALC_TDH_HEAD_ADDR_LO, 0);
sys/dev/pci/if_alc.c
2738
CSR_WRITE_4(sc, ALC_TD_RING_CNT,
sys/dev/pci/if_alc.c
2742
CSR_WRITE_4(sc, ALC_RX_BASE_ADDR_HI, ALC_ADDR_HI(paddr));
sys/dev/pci/if_alc.c
2743
CSR_WRITE_4(sc, ALC_RD0_HEAD_ADDR_LO, ALC_ADDR_LO(paddr));
sys/dev/pci/if_alc.c
2746
CSR_WRITE_4(sc, ALC_RD1_HEAD_ADDR_LO, 0);
sys/dev/pci/if_alc.c
2747
CSR_WRITE_4(sc, ALC_RD2_HEAD_ADDR_LO, 0);
sys/dev/pci/if_alc.c
2748
CSR_WRITE_4(sc, ALC_RD3_HEAD_ADDR_LO, 0);
sys/dev/pci/if_alc.c
2751
CSR_WRITE_4(sc, ALC_RD_RING_CNT,
sys/dev/pci/if_alc.c
2765
CSR_WRITE_4(sc, ALC_RX_BUF_SIZE, sc->alc_buf_size);
sys/dev/pci/if_alc.c
2769
CSR_WRITE_4(sc, ALC_RRD0_HEAD_ADDR_LO, ALC_ADDR_LO(paddr));
sys/dev/pci/if_alc.c
2772
CSR_WRITE_4(sc, ALC_RRD1_HEAD_ADDR_LO, 0);
sys/dev/pci/if_alc.c
2773
CSR_WRITE_4(sc, ALC_RRD2_HEAD_ADDR_LO, 0);
sys/dev/pci/if_alc.c
2774
CSR_WRITE_4(sc, ALC_RRD3_HEAD_ADDR_LO, 0);
sys/dev/pci/if_alc.c
2777
CSR_WRITE_4(sc, ALC_RRD_RING_CNT,
sys/dev/pci/if_alc.c
2780
CSR_WRITE_4(sc, ALC_CMB_BASE_ADDR_LO, ALC_ADDR_LO(paddr));
sys/dev/pci/if_alc.c
2782
CSR_WRITE_4(sc, ALC_SMB_BASE_ADDR_HI, ALC_ADDR_HI(paddr));
sys/dev/pci/if_alc.c
2783
CSR_WRITE_4(sc, ALC_SMB_BASE_ADDR_LO, ALC_ADDR_LO(paddr));
sys/dev/pci/if_alc.c
2787
CSR_WRITE_4(sc, ALC_SRAM_RX_FIFO_LEN, 0x000002A0);
sys/dev/pci/if_alc.c
2788
CSR_WRITE_4(sc, ALC_SRAM_TX_FIFO_LEN, 0x00000100);
sys/dev/pci/if_alc.c
2789
CSR_WRITE_4(sc, ALC_SRAM_RX_FIFO_ADDR, 0x029F0000);
sys/dev/pci/if_alc.c
2790
CSR_WRITE_4(sc, ALC_SRAM_RD0_ADDR, 0x02BF02A0);
sys/dev/pci/if_alc.c
2791
CSR_WRITE_4(sc, ALC_SRAM_TX_FIFO_ADDR, 0x03BF02C0);
sys/dev/pci/if_alc.c
2792
CSR_WRITE_4(sc, ALC_SRAM_TD_ADDR, 0x03DF03C0);
sys/dev/pci/if_alc.c
2793
CSR_WRITE_4(sc, ALC_TXF_WATER_MARK, 0x00000000);
sys/dev/pci/if_alc.c
2794
CSR_WRITE_4(sc, ALC_RD_DMA_CFG, 0x00000000);
sys/dev/pci/if_alc.c
2798
CSR_WRITE_4(sc, ALC_DMA_BLOCK, DMA_BLOCK_LOAD);
sys/dev/pci/if_alc.c
2806
CSR_WRITE_4(sc, ALC_IM_TIMER, reg);
sys/dev/pci/if_alc.c
2819
CSR_WRITE_4(sc, ALC_MASTER_CFG, reg);
sys/dev/pci/if_alc.c
2824
CSR_WRITE_4(sc, ALC_INTR_RETRIG_TIMER, ALC_USECS(0));
sys/dev/pci/if_alc.c
2827
CSR_WRITE_4(sc, ALC_CMB_TD_THRESH, ALC_TX_RING_CNT / 3);
sys/dev/pci/if_alc.c
2828
CSR_WRITE_4(sc, ALC_CMB_TX_TIMER,
sys/dev/pci/if_alc.c
2832
CSR_WRITE_4(sc, ALC_CMB_TD_THRESH, 4);
sys/dev/pci/if_alc.c
2833
CSR_WRITE_4(sc, ALC_CMB_TX_TIMER, ALC_USECS(5000));
sys/dev/pci/if_alc.c
2835
CSR_WRITE_4(sc, ALC_CMB_TX_TIMER, ALC_USECS(0));
sys/dev/pci/if_alc.c
2843
CSR_WRITE_4(sc, ALC_SMB_STAT_TIMER, ALC_USECS(0));
sys/dev/pci/if_alc.c
2861
CSR_WRITE_4(sc, ALC_FRAME_SIZE, sc->alc_max_framelen);
sys/dev/pci/if_alc.c
2865
CSR_WRITE_4(sc, ALC_HDS_CFG, 0);
sys/dev/pci/if_alc.c
2867
CSR_WRITE_4(sc, ALC_IPG_IFG_CFG,
sys/dev/pci/if_alc.c
2877
CSR_WRITE_4(sc, ALC_HDPX_CFG,
sys/dev/pci/if_alc.c
2897
CSR_WRITE_4(sc, ALC_TSO_OFFLOAD_THRESH, reg);
sys/dev/pci/if_alc.c
2907
CSR_WRITE_4(sc, ALC_TXQ_CFG, reg | TXQ_CFG_ENHANCED_MODE);
sys/dev/pci/if_alc.c
2913
CSR_WRITE_4(sc, ALC_HQTD_CFG, reg);
sys/dev/pci/if_alc.c
2919
CSR_WRITE_4(sc, ALC_WRR, reg);
sys/dev/pci/if_alc.c
292
CSR_WRITE_4(sc, ALC_MDIO, MDIO_OP_EXECUTE | MDIO_OP_WRITE |
sys/dev/pci/if_alc.c
2922
CSR_WRITE_4(sc, ALC_RX_RD_FREE_THRESH,
sys/dev/pci/if_alc.c
2943
CSR_WRITE_4(sc, ALC_RX_FIFO_PAUSE_THRESH,
sys/dev/pci/if_alc.c
2954
CSR_WRITE_4(sc, ALC_RX_FIFO_PAUSE_THRESH,
sys/dev/pci/if_alc.c
2963
CSR_WRITE_4(sc, ALC_RSS_IDT_TABLE0, 0);
sys/dev/pci/if_alc.c
2964
CSR_WRITE_4(sc, ALC_RSS_CPU, 0);
sys/dev/pci/if_alc.c
2982
CSR_WRITE_4(sc, ALC_RXQ_CFG, reg);
sys/dev/pci/if_alc.c
3014
CSR_WRITE_4(sc, ALC_DMA_CFG, reg);
sys/dev/pci/if_alc.c
3041
CSR_WRITE_4(sc, ALC_MAC_CFG, reg);
sys/dev/pci/if_alc.c
3049
CSR_WRITE_4(sc, ALC_INTR_MASK, ALC_INTRS);
sys/dev/pci/if_alc.c
3050
CSR_WRITE_4(sc, ALC_INTR_STATUS, 0xFFFFFFFF);
sys/dev/pci/if_alc.c
3051
CSR_WRITE_4(sc, ALC_INTR_STATUS, 0);
sys/dev/pci/if_alc.c
3087
CSR_WRITE_4(sc, ALC_INTR_MASK, 0);
sys/dev/pci/if_alc.c
3088
CSR_WRITE_4(sc, ALC_INTR_STATUS, 0xFFFFFFFF);
sys/dev/pci/if_alc.c
3094
CSR_WRITE_4(sc, ALC_DMA_CFG, reg);
sys/dev/pci/if_alc.c
3101
CSR_WRITE_4(sc, ALC_INTR_STATUS, 0xFFFFFFFF);
sys/dev/pci/if_alc.c
3107
CSR_WRITE_4(sc, ALC_PM_CFG, reg);
sys/dev/pci/if_alc.c
3149
CSR_WRITE_4(sc, ALC_MAC_CFG, reg);
sys/dev/pci/if_alc.c
3182
CSR_WRITE_4(sc, ALC_RXQ_CFG, cfg);
sys/dev/pci/if_alc.c
3186
CSR_WRITE_4(sc, ALC_TXQ_CFG, cfg);
sys/dev/pci/if_alc.c
3200
CSR_WRITE_4(sc, ALC_RXQ_CFG, reg);
sys/dev/pci/if_alc.c
3205
CSR_WRITE_4(sc, ALC_RXQ_CFG, reg);
sys/dev/pci/if_alc.c
3212
CSR_WRITE_4(sc, ALC_TXQ_CFG, reg);
sys/dev/pci/if_alc.c
3274
CSR_WRITE_4(sc, ALC_MBOX_RD0_PROD_IDX, sc->alc_cdata.alc_rx_cons);
sys/dev/pci/if_alc.c
3329
CSR_WRITE_4(sc, ALC_MAC_CFG, reg);
sys/dev/pci/if_alc.c
3373
CSR_WRITE_4(sc, ALC_MAR0, mchash[0]);
sys/dev/pci/if_alc.c
3374
CSR_WRITE_4(sc, ALC_MAR1, mchash[1]);
sys/dev/pci/if_alc.c
3375
CSR_WRITE_4(sc, ALC_MAC_CFG, rxcfg);
sys/dev/pci/if_alc.c
344
CSR_WRITE_4(sc, ALC_MAC_CFG, reg);
sys/dev/pci/if_alc.c
375
CSR_WRITE_4(sc, ALC_EXT_MDIO, EXT_MDIO_REG(reg) |
sys/dev/pci/if_alc.c
381
CSR_WRITE_4(sc, ALC_MDIO, MDIO_OP_EXECUTE | MDIO_OP_READ |
sys/dev/pci/if_alc.c
405
CSR_WRITE_4(sc, ALC_EXT_MDIO, EXT_MDIO_REG(reg) |
sys/dev/pci/if_alc.c
411
CSR_WRITE_4(sc, ALC_MDIO, MDIO_OP_EXECUTE | MDIO_OP_WRITE |
sys/dev/pci/if_alc.c
567
CSR_WRITE_4(sc, ALC_OPT_CFG, opt);
sys/dev/pci/if_alc.c
592
CSR_WRITE_4(sc, ALC_LTSSM_ID_CFG,
sys/dev/pci/if_alc.c
594
CSR_WRITE_4(sc, ALC_WOL_CFG, 0);
sys/dev/pci/if_alc.c
597
CSR_WRITE_4(sc, ALC_TWSI_CFG, CSR_READ_4(sc, ALC_TWSI_CFG) |
sys/dev/pci/if_alc.c
618
CSR_WRITE_4(sc, ALC_OPT_CFG, opt);
sys/dev/pci/if_alc.c
662
CSR_WRITE_4(sc, ALC_SLD, reg | SLD_START);
sys/dev/pci/if_alc.c
689
CSR_WRITE_4(sc, ALC_EEPROM_LD, reg |
sys/dev/pci/if_alc.c
734
CSR_WRITE_4(sc, ALC_PM_CFG, pmcfg);
sys/dev/pci/if_alc.c
873
CSR_WRITE_4(sc, ALC_GPHY_CFG, val);
sys/dev/pci/if_alc.c
875
CSR_WRITE_4(sc, ALC_GPHY_CFG, val | GPHY_CFG_EXT_RESET);
sys/dev/pci/if_alc.c
887
CSR_WRITE_4(sc, ALC_LPI_CTL, val);
sys/dev/pci/if_alc.c
937
CSR_WRITE_4(sc, ALC_GPHY_CFG, gphy);
sys/dev/pci/if_ale.c
1022
CSR_WRITE_4(sc, ALE_MBOX_TPD_PROD_IDX,
sys/dev/pci/if_ale.c
1125
CSR_WRITE_4(sc, ALE_MAC_CFG, reg);
sys/dev/pci/if_ale.c
1247
CSR_WRITE_4(sc, ALE_INTR_STATUS, status | INTR_DIS_INT);
sys/dev/pci/if_ale.c
1275
CSR_WRITE_4(sc, ALE_INTR_STATUS, 0x7FFFFFFF);
sys/dev/pci/if_ale.c
142
CSR_WRITE_4(sc, ALE_MDIO, MDIO_OP_EXECUTE | MDIO_OP_READ |
sys/dev/pci/if_ale.c
1556
CSR_WRITE_4(sc, 0x1008, CSR_READ_4(sc, 0x1008) | 0x8000);
sys/dev/pci/if_ale.c
1558
CSR_WRITE_4(sc, ALE_MASTER_CFG, MASTER_RESET);
sys/dev/pci/if_ale.c
1603
CSR_WRITE_4(sc, ALE_PAR0,
sys/dev/pci/if_ale.c
1605
CSR_WRITE_4(sc, ALE_PAR1, eaddr[0] << 8 | eaddr[1]);
sys/dev/pci/if_ale.c
1612
CSR_WRITE_4(sc, ALE_WOL_CFG, 0);
sys/dev/pci/if_ale.c
1619
CSR_WRITE_4(sc, ALE_TPD_ADDR_HI, ALE_ADDR_HI(paddr));
sys/dev/pci/if_ale.c
1620
CSR_WRITE_4(sc, ALE_TPD_ADDR_LO, ALE_ADDR_LO(paddr));
sys/dev/pci/if_ale.c
1621
CSR_WRITE_4(sc, ALE_TPD_CNT,
sys/dev/pci/if_ale.c
1626
CSR_WRITE_4(sc, ALE_RXF0_PAGE0_ADDR_LO, ALE_ADDR_LO(paddr));
sys/dev/pci/if_ale.c
1628
CSR_WRITE_4(sc, ALE_RXF0_PAGE1_ADDR_LO, ALE_ADDR_LO(paddr));
sys/dev/pci/if_ale.c
1632
CSR_WRITE_4(sc, ALE_TX_CMB_ADDR_LO, ALE_ADDR_LO(paddr));
sys/dev/pci/if_ale.c
1634
CSR_WRITE_4(sc, ALE_RXF0_CMB0_ADDR_LO, ALE_ADDR_LO(paddr));
sys/dev/pci/if_ale.c
1636
CSR_WRITE_4(sc, ALE_RXF0_CMB1_ADDR_LO, ALE_ADDR_LO(paddr));
sys/dev/pci/if_ale.c
1647
CSR_WRITE_4(sc, ALE_RXF_PAGE_SIZE, ALE_RX_PAGE_SZ);
sys/dev/pci/if_ale.c
1650
CSR_WRITE_4(sc, ALE_DMA_BLOCK, DMA_BLOCK_LOAD);
sys/dev/pci/if_ale.c
1653
CSR_WRITE_4(sc, ALE_INT_TRIG_THRESH, (1 << INT_TRIG_RX_THRESH_SHIFT) |
sys/dev/pci/if_ale.c
1660
CSR_WRITE_4(sc, ALE_INT_TRIG_TIMER,
sys/dev/pci/if_ale.c
1669
CSR_WRITE_4(sc, ALE_IM_TIMER, reg);
sys/dev/pci/if_ale.c
1677
CSR_WRITE_4(sc, ALE_MASTER_CFG, reg);
sys/dev/pci/if_ale.c
1686
CSR_WRITE_4(sc, ALE_FRAME_SIZE, sc->ale_max_frame_size);
sys/dev/pci/if_ale.c
1689
CSR_WRITE_4(sc, ALE_IPG_IFG_CFG,
sys/dev/pci/if_ale.c
1696
CSR_WRITE_4(sc, ALE_HDPX_CFG,
sys/dev/pci/if_ale.c
170
CSR_WRITE_4(sc, ALE_MDIO, MDIO_OP_EXECUTE | MDIO_OP_WRITE |
sys/dev/pci/if_ale.c
1714
CSR_WRITE_4(sc, ALE_TX_JUMBO_THRESH,
sys/dev/pci/if_ale.c
1724
CSR_WRITE_4(sc, ALE_TXQ_CFG, reg | TXQ_CFG_ENHANCED_MODE | TXQ_CFG_ENB);
sys/dev/pci/if_ale.c
1729
CSR_WRITE_4(sc, ALE_RX_JUMBO_THRESH,
sys/dev/pci/if_ale.c
1737
CSR_WRITE_4(sc, ALE_RX_FIFO_PAUSE_THRESH,
sys/dev/pci/if_ale.c
1745
CSR_WRITE_4(sc, ALE_RSS_IDT_TABLE0, 0);
sys/dev/pci/if_ale.c
1746
CSR_WRITE_4(sc, ALE_RSS_CPU, 0);
sys/dev/pci/if_ale.c
1749
CSR_WRITE_4(sc, ALE_RXQ_CFG,
sys/dev/pci/if_ale.c
1756
CSR_WRITE_4(sc, ALE_DMA_CFG,
sys/dev/pci/if_ale.c
1771
CSR_WRITE_4(sc, ALE_SMB_STAT_TIMER, ALE_USECS(0));
sys/dev/pci/if_ale.c
1794
CSR_WRITE_4(sc, ALE_MAC_CFG, reg);
sys/dev/pci/if_ale.c
1802
CSR_WRITE_4(sc, ALE_INTR_MASK, ALE_INTRS);
sys/dev/pci/if_ale.c
1803
CSR_WRITE_4(sc, ALE_INTR_STATUS, 0xFFFFFFFF);
sys/dev/pci/if_ale.c
1804
CSR_WRITE_4(sc, ALE_INTR_STATUS, 0);
sys/dev/pci/if_ale.c
1841
CSR_WRITE_4(sc, ALE_INTR_MASK, 0);
sys/dev/pci/if_ale.c
1842
CSR_WRITE_4(sc, ALE_INTR_STATUS, 0xFFFFFFFF);
sys/dev/pci/if_ale.c
1847
CSR_WRITE_4(sc, ALE_TXQ_CFG, reg);
sys/dev/pci/if_ale.c
1850
CSR_WRITE_4(sc, ALE_RXQ_CFG, reg);
sys/dev/pci/if_ale.c
1853
CSR_WRITE_4(sc, ALE_DMA_CFG, reg);
sys/dev/pci/if_ale.c
1860
CSR_WRITE_4(sc, ALE_INTR_STATUS, 0xFFFFFFFF);
sys/dev/pci/if_ale.c
1886
CSR_WRITE_4(sc, ALE_MAC_CFG, reg);
sys/dev/pci/if_ale.c
1959
CSR_WRITE_4(sc, ALE_MAC_CFG, reg);
sys/dev/pci/if_ale.c
2003
CSR_WRITE_4(sc, ALE_MAR0, mchash[0]);
sys/dev/pci/if_ale.c
2004
CSR_WRITE_4(sc, ALE_MAR1, mchash[1]);
sys/dev/pci/if_ale.c
2005
CSR_WRITE_4(sc, ALE_MAC_CFG, rxcfg);
sys/dev/pci/if_ale.c
224
CSR_WRITE_4(sc, ALE_MAC_CFG, reg);
sys/dev/pci/if_ale.c
276
CSR_WRITE_4(sc, ALE_SPI_CTRL, reg);
sys/dev/pci/if_ale.c
285
CSR_WRITE_4(sc, ALE_TWSI_CTRL, CSR_READ_4(sc, ALE_TWSI_CTRL) |
sys/dev/pci/if_bge.c
1021
CSR_WRITE_4(sc, BGE_MI_COMM, BGE_MICMD_READ|BGE_MICOMM_BUSY|
sys/dev/pci/if_bge.c
1079
CSR_WRITE_4(sc, BGE_MI_COMM, BGE_MICMD_WRITE|BGE_MICOMM_BUSY|
sys/dev/pci/if_bge.c
1152
CSR_WRITE_4(sc, BGE_MAC_MODE, mac_mode);
sys/dev/pci/if_bge.c
1154
CSR_WRITE_4(sc, BGE_TX_MODE, tx_mode);
sys/dev/pci/if_bge.c
1155
CSR_WRITE_4(sc, BGE_RX_MODE, rx_mode);
sys/dev/pci/if_bge.c
1435
CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_MAXLEN_FLAGS, rcb->bge_maxlen_flags);
sys/dev/pci/if_bge.c
1606
CSR_WRITE_4(sc, BGE_RX_MODE, rxmode);
sys/dev/pci/if_bge.c
1713
CSR_WRITE_4(sc, BGE_CPMU_PADRNG_CTL,
sys/dev/pci/if_bge.c
1827
CSR_WRITE_4(sc, BGE_MODE_CTL, mode_ctl);
sys/dev/pci/if_bge.c
1848
CSR_WRITE_4(sc, BGE_MISC_CFG, BGE_32BITTIME_66MHZ);
sys/dev/pci/if_bge.c
1875
CSR_WRITE_4(sc, BGE_PCI_MEMWIN_BASEADDR, 0);
sys/dev/pci/if_bge.c
1879
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_BASEADDR,
sys/dev/pci/if_bge.c
1883
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_LEN, 0x10000);
sys/dev/pci/if_bge.c
1885
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_LEN, 0x18000);
sys/dev/pci/if_bge.c
1888
CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_BASEADDR,
sys/dev/pci/if_bge.c
1890
CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_LEN, 0x2000);
sys/dev/pci/if_bge.c
1896
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0);
sys/dev/pci/if_bge.c
1897
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x2a);
sys/dev/pci/if_bge.c
1898
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0xa0);
sys/dev/pci/if_bge.c
1900
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0);
sys/dev/pci/if_bge.c
1903
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x04);
sys/dev/pci/if_bge.c
1904
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0x10);
sys/dev/pci/if_bge.c
1906
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x10);
sys/dev/pci/if_bge.c
1907
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0x60);
sys/dev/pci/if_bge.c
1910
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x50);
sys/dev/pci/if_bge.c
1911
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x20);
sys/dev/pci/if_bge.c
1912
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0x60);
sys/dev/pci/if_bge.c
1916
CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_LOWAT, 5);
sys/dev/pci/if_bge.c
1917
CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_HIWAT, 10);
sys/dev/pci/if_bge.c
1929
CSR_WRITE_4(sc, BGE_BMAN_MODE, val);
sys/dev/pci/if_bge.c
1945
CSR_WRITE_4(sc, BGE_FTQ_RESET, 0xFFFFFFFF);
sys/dev/pci/if_bge.c
1946
CSR_WRITE_4(sc, BGE_FTQ_RESET, 0);
sys/dev/pci/if_bge.c
2030
CSR_WRITE_4(sc, BGE_RX_STD_RCB_HADDR_HI, rcb->bge_hostaddr.bge_addr_hi);
sys/dev/pci/if_bge.c
2031
CSR_WRITE_4(sc, BGE_RX_STD_RCB_HADDR_LO, rcb->bge_hostaddr.bge_addr_lo);
sys/dev/pci/if_bge.c
2032
CSR_WRITE_4(sc, BGE_RX_STD_RCB_MAXLEN_FLAGS, rcb->bge_maxlen_flags);
sys/dev/pci/if_bge.c
2033
CSR_WRITE_4(sc, BGE_RX_STD_RCB_NICADDR, rcb->bge_nicaddr);
sys/dev/pci/if_bge.c
2057
CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_HADDR_HI,
sys/dev/pci/if_bge.c
2059
CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_HADDR_LO,
sys/dev/pci/if_bge.c
2062
CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_MAXLEN_FLAGS,
sys/dev/pci/if_bge.c
2064
CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_NICADDR, rcb->bge_nicaddr);
sys/dev/pci/if_bge.c
2075
CSR_WRITE_4(sc, BGE_RX_MINI_RCB_MAXLEN_FLAGS,
sys/dev/pci/if_bge.c
2092
CSR_WRITE_4(sc, BGE_ISO_PKT_TX,
sys/dev/pci/if_bge.c
2108
CSR_WRITE_4(sc, BGE_RBDI_STD_REPL_THRESH, 8);
sys/dev/pci/if_bge.c
2110
CSR_WRITE_4(sc, BGE_RBDI_JUMBO_REPL_THRESH, 8);
sys/dev/pci/if_bge.c
2113
CSR_WRITE_4(sc, BGE_STD_REPL_LWM, 4);
sys/dev/pci/if_bge.c
2114
CSR_WRITE_4(sc, BGE_JUMBO_REPL_LWM, 4);
sys/dev/pci/if_bge.c
2201
CSR_WRITE_4(sc, BGE_TX_RANDOM_BACKOFF,
sys/dev/pci/if_bge.c
2213
CSR_WRITE_4(sc, BGE_TX_LENGTHS, val);
sys/dev/pci/if_bge.c
2219
CSR_WRITE_4(sc, BGE_RX_RULES_CFG, 0x08);
sys/dev/pci/if_bge.c
2225
CSR_WRITE_4(sc, BGE_RXLP_CFG, 0x181);
sys/dev/pci/if_bge.c
2228
CSR_WRITE_4(sc, BGE_RXLP_STATS_ENABLE_MASK, 0x007BFFFF);
sys/dev/pci/if_bge.c
2229
CSR_WRITE_4(sc, BGE_RXLP_STATS_CTL, 0x1);
sys/dev/pci/if_bge.c
2232
CSR_WRITE_4(sc, BGE_HCC_MODE, 0x00000000);
sys/dev/pci/if_bge.c
2248
CSR_WRITE_4(sc, BGE_HCC_RX_COAL_TICKS, sc->bge_rx_coal_ticks);
sys/dev/pci/if_bge.c
2249
CSR_WRITE_4(sc, BGE_HCC_TX_COAL_TICKS, sc->bge_tx_coal_ticks);
sys/dev/pci/if_bge.c
2250
CSR_WRITE_4(sc, BGE_HCC_RX_MAX_COAL_BDS, sc->bge_rx_max_coal_bds);
sys/dev/pci/if_bge.c
2251
CSR_WRITE_4(sc, BGE_HCC_TX_MAX_COAL_BDS, sc->bge_tx_max_coal_bds);
sys/dev/pci/if_bge.c
2253
CSR_WRITE_4(sc, BGE_HCC_RX_COAL_TICKS_INT, 0);
sys/dev/pci/if_bge.c
2254
CSR_WRITE_4(sc, BGE_HCC_TX_COAL_TICKS_INT, 0);
sys/dev/pci/if_bge.c
2256
CSR_WRITE_4(sc, BGE_HCC_RX_MAX_COAL_BDS_INT, 0);
sys/dev/pci/if_bge.c
2257
CSR_WRITE_4(sc, BGE_HCC_TX_MAX_COAL_BDS_INT, 0);
sys/dev/pci/if_bge.c
2262
CSR_WRITE_4(sc, BGE_HCC_STATS_ADDR_HI, taddr.bge_addr_hi);
sys/dev/pci/if_bge.c
2263
CSR_WRITE_4(sc, BGE_HCC_STATS_ADDR_LO, taddr.bge_addr_lo);
sys/dev/pci/if_bge.c
2265
CSR_WRITE_4(sc, BGE_HCC_STATS_BASEADDR, BGE_STATS_BLOCK);
sys/dev/pci/if_bge.c
2266
CSR_WRITE_4(sc, BGE_HCC_STATUSBLK_BASEADDR, BGE_STATUS_BLOCK);
sys/dev/pci/if_bge.c
2267
CSR_WRITE_4(sc, BGE_HCC_STATS_TICKS, sc->bge_stat_ticks);
sys/dev/pci/if_bge.c
2272
CSR_WRITE_4(sc, BGE_HCC_STATUSBLK_ADDR_HI, taddr.bge_addr_hi);
sys/dev/pci/if_bge.c
2273
CSR_WRITE_4(sc, BGE_HCC_STATUSBLK_ADDR_LO, taddr.bge_addr_lo);
sys/dev/pci/if_bge.c
2289
CSR_WRITE_4(sc, BGE_HCC_MODE, val | BGE_HCCMODE_ENABLE);
sys/dev/pci/if_bge.c
2292
CSR_WRITE_4(sc, BGE_RBDC_MODE,
sys/dev/pci/if_bge.c
2296
CSR_WRITE_4(sc, BGE_RXLP_MODE, BGE_RXLPMODE_ENABLE);
sys/dev/pci/if_bge.c
2300
CSR_WRITE_4(sc, BGE_RXLS_MODE, BGE_RXLSMODE_ENABLE);
sys/dev/pci/if_bge.c
2319
CSR_WRITE_4(sc, BGE_MAC_MODE, val);
sys/dev/pci/if_bge.c
2335
CSR_WRITE_4(sc, BGE_DMAC_MODE, BGE_DMACMODE_ENABLE);
sys/dev/pci/if_bge.c
2347
CSR_WRITE_4(sc, BGE_WDMA_MODE, val);
sys/dev/pci/if_bge.c
2404
CSR_WRITE_4(sc, rdmareg, dmactl |
sys/dev/pci/if_bge.c
2409
CSR_WRITE_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL,
sys/dev/pci/if_bge.c
2418
CSR_WRITE_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL,
sys/dev/pci/if_bge.c
2423
CSR_WRITE_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL_REG2,
sys/dev/pci/if_bge.c
2429
CSR_WRITE_4(sc, BGE_RDMA_MODE, val);
sys/dev/pci/if_bge.c
2446
CSR_WRITE_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL, val);
sys/dev/pci/if_bge.c
2451
CSR_WRITE_4(sc, BGE_RDC_MODE, BGE_RDCMODE_ENABLE);
sys/dev/pci/if_bge.c
2454
CSR_WRITE_4(sc, BGE_RBDI_MODE, BGE_RBDIMODE_ENABLE);
sys/dev/pci/if_bge.c
2457
CSR_WRITE_4(sc, BGE_RDBDI_MODE, BGE_RDBDIMODE_ENABLE);
sys/dev/pci/if_bge.c
2461
CSR_WRITE_4(sc, BGE_MBCF_MODE, BGE_MBCFMODE_ENABLE);
sys/dev/pci/if_bge.c
2464
CSR_WRITE_4(sc, BGE_SBDC_MODE, BGE_SBDCMODE_ENABLE);
sys/dev/pci/if_bge.c
2470
CSR_WRITE_4(sc, BGE_SDC_MODE, val);
sys/dev/pci/if_bge.c
2473
CSR_WRITE_4(sc, BGE_SDI_MODE, BGE_SDIMODE_ENABLE);
sys/dev/pci/if_bge.c
2476
CSR_WRITE_4(sc, BGE_SBDI_MODE, BGE_SBDIMODE_ENABLE);
sys/dev/pci/if_bge.c
2479
CSR_WRITE_4(sc, BGE_SRS_MODE, BGE_SRSMODE_ENABLE);
sys/dev/pci/if_bge.c
2481
CSR_WRITE_4(sc, BGE_SDI_STATS_ENABLE_MASK, 0x007BFFFF);
sys/dev/pci/if_bge.c
2482
CSR_WRITE_4(sc, BGE_SDI_STATS_CTL,
sys/dev/pci/if_bge.c
2486
CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED |
sys/dev/pci/if_bge.c
2492
CSR_WRITE_4(sc, BGE_MI_STS, BGE_MISTS_LINK);
sys/dev/pci/if_bge.c
2504
CSR_WRITE_4(sc, BGE_MI_MODE, mimode);
sys/dev/pci/if_bge.c
2506
CSR_WRITE_4(sc, BGE_MAC_EVT_ENB,
sys/dev/pci/if_bge.c
2517
CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED|
sys/dev/pci/if_bge.c
3126
CSR_WRITE_4(sc, BGE_MSI_MODE, CSR_READ_4(sc, BGE_MSI_MODE) &
sys/dev/pci/if_bge.c
3294
CSR_WRITE_4(sc, BGE_NVRAM_SWARB, BGE_NVRAMSWARB_SET1);
sys/dev/pci/if_bge.c
3319
CSR_WRITE_4(sc, BGE_FASTBOOT_PC, 0);
sys/dev/pci/if_bge.c
3335
CSR_WRITE_4(sc, 0x7e2c, 0x20);
sys/dev/pci/if_bge.c
3343
CSR_WRITE_4(sc, BGE_MISC_CFG, (1<<29));
sys/dev/pci/if_bge.c
3350
CSR_WRITE_4(sc, BGE_VCPU_STATUS,
sys/dev/pci/if_bge.c
3353
CSR_WRITE_4(sc, BGE_VCPU_EXT_CTRL,
sys/dev/pci/if_bge.c
3423
CSR_WRITE_4(sc, BGE_MSI_MODE,
sys/dev/pci/if_bge.c
3427
CSR_WRITE_4(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE | val);
sys/dev/pci/if_bge.c
3429
CSR_WRITE_4(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE);
sys/dev/pci/if_bge.c
3432
CSR_WRITE_4(sc, BGE_MODE_CTL, bge_dma_swap_options(sc));
sys/dev/pci/if_bge.c
3436
CSR_WRITE_4(sc, BGE_MAC_MODE, val);
sys/dev/pci/if_bge.c
3483
CSR_WRITE_4(sc, BGE_SERDES_CFG, val);
sys/dev/pci/if_bge.c
3492
CSR_WRITE_4(sc, 0x7c00, val | (1<<25));
sys/dev/pci/if_bge.c
3914
CSR_WRITE_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL, val);
sys/dev/pci/if_bge.c
4296
CSR_WRITE_4(sc, BGE_RX_MTU,
sys/dev/pci/if_bge.c
4299
CSR_WRITE_4(sc, BGE_RX_MTU,
sys/dev/pci/if_bge.c
4304
CSR_WRITE_4(sc, BGE_MAC_ADDR1_LO, htons(m[0]));
sys/dev/pci/if_bge.c
4305
CSR_WRITE_4(sc, BGE_MAC_ADDR1_HI, (htons(m[1]) << 16) | htons(m[2]));
sys/dev/pci/if_bge.c
4366
CSR_WRITE_4(sc, BGE_TX_MODE, mode | BGE_TXMODE_ENABLE);
sys/dev/pci/if_bge.c
4376
CSR_WRITE_4(sc, BGE_RX_MODE, mode | BGE_RXMODE_ENABLE);
sys/dev/pci/if_bge.c
4386
CSR_WRITE_4(sc, BGE_MAX_RX_FRAME_LOWAT, 1);
sys/dev/pci/if_bge.c
4388
CSR_WRITE_4(sc, BGE_MAX_RX_FRAME_LOWAT, 2);
sys/dev/pci/if_bge.c
4433
CSR_WRITE_4(sc, BGE_TX_TBI_AUTONEG, 0);
sys/dev/pci/if_bge.c
4438
CSR_WRITE_4(sc, BGE_SGDIG_CFG,
sys/dev/pci/if_bge.c
4441
CSR_WRITE_4(sc, BGE_SGDIG_CFG, sgdig);
sys/dev/pci/if_bge.c
4716
CSR_WRITE_4(sc, BGE_FTQ_RESET, 0xFFFFFFFF);
sys/dev/pci/if_bge.c
4717
CSR_WRITE_4(sc, BGE_FTQ_RESET, 0);
sys/dev/pci/if_bge.c
4812
CSR_WRITE_4(sc, BGE_MAC_EVT_ENB,
sys/dev/pci/if_bge.c
4830
CSR_WRITE_4(sc, BGE_MAC_STS, 0xFFFFFFFF);
sys/dev/pci/if_bge.c
4880
CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED|
sys/dev/pci/if_bge.c
544
CSR_WRITE_4(sc, off, val);
sys/dev/pci/if_bge.c
872
CSR_WRITE_4(sc, BGE_NVRAM_SWARB, BGE_NVRAMSWARB_SET1);
sys/dev/pci/if_bge.c
883
CSR_WRITE_4(sc, BGE_NVRAM_ACCESS, access | BGE_NVRAMACC_ENABLE);
sys/dev/pci/if_bge.c
885
CSR_WRITE_4(sc, BGE_NVRAM_ADDR, addr & 0xfffffffc);
sys/dev/pci/if_bge.c
886
CSR_WRITE_4(sc, BGE_NVRAM_CMD, BGE_NVRAM_READCMD);
sys/dev/pci/if_bge.c
906
CSR_WRITE_4(sc, BGE_NVRAM_ACCESS, access);
sys/dev/pci/if_bge.c
909
CSR_WRITE_4(sc, BGE_NVRAM_SWARB, BGE_NVRAMSWARB_CLR1);
sys/dev/pci/if_bge.c
957
CSR_WRITE_4(sc, BGE_EE_ADDR,
sys/dev/pci/if_bge.c
962
CSR_WRITE_4(sc, BGE_EE_ADDR, BGE_EE_READCMD | addr);
sys/dev/pci/if_bgereg.h
2287
CSR_WRITE_4(sc, BGE_MEMWIN_START + (x & 0x7FFF), val); \
sys/dev/pci/if_bgereg.h
2740
CSR_WRITE_4(sc, reg, (CSR_READ_4(sc, reg) | (x)))
sys/dev/pci/if_bgereg.h
2742
CSR_WRITE_4(sc, reg, (CSR_READ_4(sc, reg) & ~(x)))
sys/dev/pci/if_bwi_pci.c
122
CSR_WRITE_4(sc, BWI_RESET_CTRL, BWI_RESET_CTRL_RESET);
sys/dev/pci/if_bwi_pci.c
125
CSR_WRITE_4(sc, BWI_RESET_CTRL, 0);
sys/dev/pci/if_et.c
1111
CSR_WRITE_4(sc, ET_RXDMA_CTRL,
sys/dev/pci/if_et.c
1125
CSR_WRITE_4(sc, ET_TXDMA_CTRL,
sys/dev/pci/if_et.c
1224
CSR_WRITE_4(sc, ET_MULTI_HASH + (i * 4), hash[i]);
sys/dev/pci/if_et.c
1230
CSR_WRITE_4(sc, ET_PKTFILT, pktfilt);
sys/dev/pci/if_et.c
1231
CSR_WRITE_4(sc, ET_RXMAC_CTRL, rxmac_ctrl);
sys/dev/pci/if_et.c
1250
CSR_WRITE_4(sc, ET_RXQ_START, 0);
sys/dev/pci/if_et.c
1251
CSR_WRITE_4(sc, ET_RXQ_END, rxq_end);
sys/dev/pci/if_et.c
1252
CSR_WRITE_4(sc, ET_TXQ_START, rxq_end + 1);
sys/dev/pci/if_et.c
1253
CSR_WRITE_4(sc, ET_TXQ_END, ET_INTERN_MEM_END);
sys/dev/pci/if_et.c
1256
CSR_WRITE_4(sc, ET_LOOPBACK, 0);
sys/dev/pci/if_et.c
1259
CSR_WRITE_4(sc, ET_MSI_CFG, 0);
sys/dev/pci/if_et.c
1262
CSR_WRITE_4(sc, ET_TIMER, 0);
sys/dev/pci/if_et.c
1268
CSR_WRITE_4(sc, ET_MMC_CTRL, ET_MMC_CTRL_ENABLE);
sys/dev/pci/if_et.c
1359
CSR_WRITE_4(sc, ET_RX_STATUS_HI, ET_ADDR_HI(rxsd->rxsd_paddr));
sys/dev/pci/if_et.c
1360
CSR_WRITE_4(sc, ET_RX_STATUS_LO, ET_ADDR_LO(rxsd->rxsd_paddr));
sys/dev/pci/if_et.c
1365
CSR_WRITE_4(sc, ET_RXSTAT_HI, ET_ADDR_HI(rxst_ring->rsr_paddr));
sys/dev/pci/if_et.c
1366
CSR_WRITE_4(sc, ET_RXSTAT_LO, ET_ADDR_LO(rxst_ring->rsr_paddr));
sys/dev/pci/if_et.c
1367
CSR_WRITE_4(sc, ET_RXSTAT_CNT, ET_RX_NSTAT - 1);
sys/dev/pci/if_et.c
1368
CSR_WRITE_4(sc, ET_RXSTAT_POS, 0);
sys/dev/pci/if_et.c
1369
CSR_WRITE_4(sc, ET_RXSTAT_MINCNT, ((ET_RX_NSTAT * 15) / 100) - 1);
sys/dev/pci/if_et.c
1379
CSR_WRITE_4(sc, ET_RX_RING1_HI, ET_ADDR_HI(rx_ring->rr_paddr));
sys/dev/pci/if_et.c
1380
CSR_WRITE_4(sc, ET_RX_RING1_LO, ET_ADDR_LO(rx_ring->rr_paddr));
sys/dev/pci/if_et.c
1381
CSR_WRITE_4(sc, ET_RX_RING1_CNT, ET_RX_NDESC - 1);
sys/dev/pci/if_et.c
1382
CSR_WRITE_4(sc, ET_RX_RING1_POS, ET_RX_RING1_POS_WRAP);
sys/dev/pci/if_et.c
1383
CSR_WRITE_4(sc, ET_RX_RING1_MINCNT, ((ET_RX_NDESC * 15) / 100) - 1);
sys/dev/pci/if_et.c
1393
CSR_WRITE_4(sc, ET_RX_RING0_HI, ET_ADDR_HI(rx_ring->rr_paddr));
sys/dev/pci/if_et.c
1394
CSR_WRITE_4(sc, ET_RX_RING0_LO, ET_ADDR_LO(rx_ring->rr_paddr));
sys/dev/pci/if_et.c
1395
CSR_WRITE_4(sc, ET_RX_RING0_CNT, ET_RX_NDESC - 1);
sys/dev/pci/if_et.c
1396
CSR_WRITE_4(sc, ET_RX_RING0_POS, ET_RX_RING0_POS_WRAP);
sys/dev/pci/if_et.c
1397
CSR_WRITE_4(sc, ET_RX_RING0_MINCNT, ((ET_RX_NDESC * 15) / 100) - 1);
sys/dev/pci/if_et.c
1406
CSR_WRITE_4(sc, ET_RX_INTR_NPKTS, sc->sc_rx_intr_npkts);
sys/dev/pci/if_et.c
1407
CSR_WRITE_4(sc, ET_RX_INTR_DELAY, sc->sc_rx_intr_delay);
sys/dev/pci/if_et.c
1428
CSR_WRITE_4(sc, ET_TX_RING_HI, ET_ADDR_HI(tx_ring->tr_paddr));
sys/dev/pci/if_et.c
1429
CSR_WRITE_4(sc, ET_TX_RING_LO, ET_ADDR_LO(tx_ring->tr_paddr));
sys/dev/pci/if_et.c
1430
CSR_WRITE_4(sc, ET_TX_RING_CNT, ET_TX_NDESC - 1);
sys/dev/pci/if_et.c
1435
CSR_WRITE_4(sc, ET_TX_STATUS_HI, ET_ADDR_HI(txsd->txsd_paddr));
sys/dev/pci/if_et.c
1436
CSR_WRITE_4(sc, ET_TX_STATUS_LO, ET_ADDR_LO(txsd->txsd_paddr));
sys/dev/pci/if_et.c
1438
CSR_WRITE_4(sc, ET_TX_READY_POS, 0);
sys/dev/pci/if_et.c
1455
CSR_WRITE_4(sc, ET_MAC_CFG1,
sys/dev/pci/if_et.c
1467
CSR_WRITE_4(sc, ET_IPG, val);
sys/dev/pci/if_et.c
1476
CSR_WRITE_4(sc, ET_MAC_HDX, val);
sys/dev/pci/if_et.c
1479
CSR_WRITE_4(sc, ET_MAC_CTRL, 0);
sys/dev/pci/if_et.c
1482
CSR_WRITE_4(sc, ET_MII_CFG, ET_MII_CFG_CLKRST);
sys/dev/pci/if_et.c
1488
CSR_WRITE_4(sc, ET_MAC_ADDR1, val);
sys/dev/pci/if_et.c
1490
CSR_WRITE_4(sc, ET_MAC_ADDR2, val);
sys/dev/pci/if_et.c
1493
CSR_WRITE_4(sc, ET_MAX_FRMLEN, ETHER_MAX_LEN + ETHER_VLAN_ENCAP_LEN);
sys/dev/pci/if_et.c
1496
CSR_WRITE_4(sc, ET_MAC_CFG1, 0);
sys/dev/pci/if_et.c
1508
CSR_WRITE_4(sc, ET_RXMAC_CTRL, ET_RXMAC_CTRL_WOL_DISABLE);
sys/dev/pci/if_et.c
1514
CSR_WRITE_4(sc, ET_WOL_CRC + (i * 4), 0);
sys/dev/pci/if_et.c
1516
CSR_WRITE_4(sc, ET_WOL_MASK + (i * 4), 0);
sys/dev/pci/if_et.c
1522
CSR_WRITE_4(sc, ET_WOL_SA_LO, val);
sys/dev/pci/if_et.c
1524
CSR_WRITE_4(sc, ET_WOL_SA_HI, val);
sys/dev/pci/if_et.c
1527
CSR_WRITE_4(sc, ET_PKTFILT, 0);
sys/dev/pci/if_et.c
1530
CSR_WRITE_4(sc, ET_UCAST_FILTADDR1, 0);
sys/dev/pci/if_et.c
1531
CSR_WRITE_4(sc, ET_UCAST_FILTADDR2, 0);
sys/dev/pci/if_et.c
1532
CSR_WRITE_4(sc, ET_UCAST_FILTADDR3, 0);
sys/dev/pci/if_et.c
1549
CSR_WRITE_4(sc, ET_RXMAC_MC_SEGSZ, val);
sys/dev/pci/if_et.c
1551
CSR_WRITE_4(sc, ET_RXMAC_MC_WATERMARK, 0);
sys/dev/pci/if_et.c
1554
CSR_WRITE_4(sc, ET_RXMAC_MGT, 0);
sys/dev/pci/if_et.c
1556
CSR_WRITE_4(sc, ET_RXMAC_SPACE_AVL, 0);
sys/dev/pci/if_et.c
1558
CSR_WRITE_4(sc, ET_RXMAC_MGT,
sys/dev/pci/if_et.c
1568
CSR_WRITE_4(sc, ET_PKTFILT, val);
sys/dev/pci/if_et.c
1571
CSR_WRITE_4(sc, ET_RXMAC_CTRL,
sys/dev/pci/if_et.c
1584
CSR_WRITE_4(sc, ET_TXMAC_CTRL, ET_TXMAC_CTRL_FC_DISABLE);
sys/dev/pci/if_et.c
1587
CSR_WRITE_4(sc, ET_TXMAC_FLOWCTRL, 0);
sys/dev/pci/if_et.c
1590
CSR_WRITE_4(sc, ET_TXMAC_CTRL,
sys/dev/pci/if_et.c
1606
CSR_WRITE_4(sc, ET_RXDMA_CTRL, val);
sys/dev/pci/if_et.c
1620
CSR_WRITE_4(sc, ET_TXDMA_CTRL, ET_TXDMA_CTRL_SINGLE_EPKT);
sys/dev/pci/if_et.c
1635
CSR_WRITE_4(sc, ET_MAC_CFG1, val);
sys/dev/pci/if_et.c
1702
CSR_WRITE_4(sc, ET_RXSTAT_POS, rxstat_pos);
sys/dev/pci/if_et.c
1752
CSR_WRITE_4(sc, rx_ring->rr_posreg, rxring_pos);
sys/dev/pci/if_et.c
1860
CSR_WRITE_4(sc, ET_TX_READY_POS, tx_ready_pos);
sys/dev/pci/if_et.c
228
CSR_WRITE_4(sc, ET_PM,
sys/dev/pci/if_et.c
313
CSR_WRITE_4(sc, ET_MII_CMD, 0);
sys/dev/pci/if_et.c
317
CSR_WRITE_4(sc, ET_MII_ADDR, val);
sys/dev/pci/if_et.c
320
CSR_WRITE_4(sc, ET_MII_CMD, ET_MII_CMD_READ);
sys/dev/pci/if_et.c
344
CSR_WRITE_4(sc, ET_MII_CMD, 0);
sys/dev/pci/if_et.c
356
CSR_WRITE_4(sc, ET_MII_CMD, 0);
sys/dev/pci/if_et.c
360
CSR_WRITE_4(sc, ET_MII_ADDR, val);
sys/dev/pci/if_et.c
363
CSR_WRITE_4(sc, ET_MII_CTRL, __SHIFTIN(val0, ET_MII_CTRL_VALUE));
sys/dev/pci/if_et.c
382
CSR_WRITE_4(sc, ET_MII_CMD, 0);
sys/dev/pci/if_et.c
413
CSR_WRITE_4(sc, ET_MAC_CTRL, ctrl);
sys/dev/pci/if_et.c
414
CSR_WRITE_4(sc, ET_MAC_CFG2, cfg2);
sys/dev/pci/if_et.c
565
CSR_WRITE_4(sc, ET_MAC_CFG1,
sys/dev/pci/if_et.c
570
CSR_WRITE_4(sc, ET_SWRST,
sys/dev/pci/if_et.c
575
CSR_WRITE_4(sc, ET_MAC_CFG1,
sys/dev/pci/if_et.c
578
CSR_WRITE_4(sc, ET_MAC_CFG1, 0);
sys/dev/pci/if_et.c
584
CSR_WRITE_4(sc, ET_INTR_MASK, 0xffffffff);
sys/dev/pci/if_et.c
590
CSR_WRITE_4(sc, ET_INTR_MASK, ~intrs);
sys/dev/pci/if_et.c
882
CSR_WRITE_4(sc, ET_LOOPBACK, 0);
sys/dev/pci/if_et.c
885
CSR_WRITE_4(sc, ET_MAC_CFG1,
sys/dev/pci/if_et.c
897
CSR_WRITE_4(sc, ET_MAC_HDX, val);
sys/dev/pci/if_et.c
900
CSR_WRITE_4(sc, ET_MAC_CTRL, 0);
sys/dev/pci/if_et.c
903
CSR_WRITE_4(sc, ET_MII_CFG, ET_MII_CFG_CLKRST);
sys/dev/pci/if_et.c
906
CSR_WRITE_4(sc, ET_MAC_CFG1, 0);
sys/dev/pci/if_et.c
909
CSR_WRITE_4(sc, ET_MMC_CTRL, ET_MMC_CTRL_ENABLE);
sys/dev/pci/if_et.c
936
CSR_WRITE_4(sc, ET_TIMER, sc->sc_timer);
sys/dev/pci/if_et.c
986
CSR_WRITE_4(sc, ET_TIMER, sc->sc_timer);
sys/dev/pci/if_ipw.c
1054
CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0);
sys/dev/pci/if_ipw.c
1072
CSR_WRITE_4(sc, IPW_CSR_INTR, r);
sys/dev/pci/if_ipw.c
1075
CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK);
sys/dev/pci/if_ipw.c
112
CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, addr);
sys/dev/pci/if_ipw.c
1120
CSR_WRITE_4(sc, IPW_CSR_TX_WRITE_INDEX, sc->txcur);
sys/dev/pci/if_ipw.c
119
CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, addr);
sys/dev/pci/if_ipw.c
1278
CSR_WRITE_4(sc, IPW_CSR_TX_WRITE_INDEX, sc->txcur);
sys/dev/pci/if_ipw.c
1445
CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0);
sys/dev/pci/if_ipw.c
1447
CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_STOP_MASTER);
sys/dev/pci/if_ipw.c
1458
CSR_WRITE_4(sc, IPW_CSR_RST, tmp | IPW_RST_PRINCETON_RESET);
sys/dev/pci/if_ipw.c
1471
CSR_WRITE_4(sc, IPW_CSR_CTL, tmp | IPW_CTL_INIT);
sys/dev/pci/if_ipw.c
1483
CSR_WRITE_4(sc, IPW_CSR_RST, tmp | IPW_RST_SW_RESET);
sys/dev/pci/if_ipw.c
1488
CSR_WRITE_4(sc, IPW_CSR_CTL, tmp | IPW_CTL_INIT);
sys/dev/pci/if_ipw.c
1500
CSR_WRITE_4(sc, IPW_CSR_RST, 0);
sys/dev/pci/if_ipw.c
1570
CSR_WRITE_4(sc, IPW_CSR_IO, IPW_IO_GPIO1_ENABLE | IPW_IO_GPIO3_MASK |
sys/dev/pci/if_ipw.c
1574
CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK);
sys/dev/pci/if_ipw.c
1577
CSR_WRITE_4(sc, IPW_CSR_RST, 0);
sys/dev/pci/if_ipw.c
1579
CSR_WRITE_4(sc, IPW_CSR_CTL, tmp | IPW_CTL_ALLOW_STANDBY);
sys/dev/pci/if_ipw.c
1589
CSR_WRITE_4(sc, IPW_CSR_IO, tmp | IPW_IO_GPIO1_MASK |
sys/dev/pci/if_ipw.c
189
CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0);
sys/dev/pci/if_ipw.c
1963
CSR_WRITE_4(sc, IPW_CSR_TX_BD_BASE, sc->tbd_map->dm_segs[0].ds_addr);
sys/dev/pci/if_ipw.c
1964
CSR_WRITE_4(sc, IPW_CSR_TX_BD_SIZE, IPW_NTBD);
sys/dev/pci/if_ipw.c
1965
CSR_WRITE_4(sc, IPW_CSR_TX_READ_INDEX, 0);
sys/dev/pci/if_ipw.c
1966
CSR_WRITE_4(sc, IPW_CSR_TX_WRITE_INDEX, 0);
sys/dev/pci/if_ipw.c
1971
CSR_WRITE_4(sc, IPW_CSR_RX_BD_BASE, sc->rbd_map->dm_segs[0].ds_addr);
sys/dev/pci/if_ipw.c
1972
CSR_WRITE_4(sc, IPW_CSR_RX_BD_SIZE, IPW_NRBD);
sys/dev/pci/if_ipw.c
1973
CSR_WRITE_4(sc, IPW_CSR_RX_READ_INDEX, 0);
sys/dev/pci/if_ipw.c
1974
CSR_WRITE_4(sc, IPW_CSR_RX_WRITE_INDEX, IPW_NRBD - 1);
sys/dev/pci/if_ipw.c
1977
CSR_WRITE_4(sc, IPW_CSR_RX_STATUS_BASE,
sys/dev/pci/if_ipw.c
2023
CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_SW_RESET);
sys/dev/pci/if_ipw.c
2043
CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3);
sys/dev/pci/if_ipw.c
2053
CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3);
sys/dev/pci/if_ipw.c
981
CSR_WRITE_4(sc, IPW_CSR_RX_WRITE_INDEX, sc->rxcur);
sys/dev/pci/if_ipwreg.h
308
CSR_WRITE_4((sc), IPW_CSR_INDIRECT_ADDR, (addr)); \
sys/dev/pci/if_ipwreg.h
313
CSR_WRITE_4((sc), IPW_CSR_INDIRECT_ADDR, (addr)); \
sys/dev/pci/if_ipwreg.h
318
CSR_WRITE_4((sc), IPW_CSR_INDIRECT_ADDR, (addr)); \
sys/dev/pci/if_ipwreg.h
319
CSR_WRITE_4((sc), IPW_CSR_INDIRECT_DATA, (val)); \
sys/dev/pci/if_ipwreg.h
323
CSR_WRITE_4((sc), IPW_CSR_INDIRECT_ADDR, (addr)); \
sys/dev/pci/if_iwi.c
1119
CSR_WRITE_4(sc, IWI_CSR_RX_WIDX, hw);
sys/dev/pci/if_iwi.c
1161
CSR_WRITE_4(sc, IWI_CSR_INTR_MASK, 0);
sys/dev/pci/if_iwi.c
1164
CSR_WRITE_4(sc, IWI_CSR_INTR, r);
sys/dev/pci/if_iwi.c
117
CSR_WRITE_4(sc, IWI_CSR_INDIRECT_ADDR, addr);
sys/dev/pci/if_iwi.c
1186
CSR_WRITE_4(sc, IWI_CSR_CMD_WIDX, sc->cmdq.next);
sys/dev/pci/if_iwi.c
1207
CSR_WRITE_4(sc, IWI_CSR_INTR_MASK, IWI_INTR_MASK);
sys/dev/pci/if_iwi.c
1236
CSR_WRITE_4(sc, IWI_CSR_CMD_WIDX, sc->cmdq.next);
sys/dev/pci/if_iwi.c
124
CSR_WRITE_4(sc, IWI_CSR_INDIRECT_ADDR, addr);
sys/dev/pci/if_iwi.c
1372
CSR_WRITE_4(sc, txq->csr_widx, txq->cur);
sys/dev/pci/if_iwi.c
1504
CSR_WRITE_4(sc, IWI_CSR_INTR_MASK, 0);
sys/dev/pci/if_iwi.c
1506
CSR_WRITE_4(sc, IWI_CSR_RST, IWI_RST_STOP_MASTER);
sys/dev/pci/if_iwi.c
1518
CSR_WRITE_4(sc, IWI_CSR_RST, tmp | IWI_RST_PRINCETON_RESET);
sys/dev/pci/if_iwi.c
1531
CSR_WRITE_4(sc, IWI_CSR_CTL, tmp | IWI_CTL_INIT);
sys/dev/pci/if_iwi.c
1533
CSR_WRITE_4(sc, IWI_CSR_READ_INT, IWI_READ_INT_INIT_HOST);
sys/dev/pci/if_iwi.c
1548
CSR_WRITE_4(sc, IWI_CSR_RST, tmp | IWI_RST_SW_RESET);
sys/dev/pci/if_iwi.c
1553
CSR_WRITE_4(sc, IWI_CSR_CTL, tmp | IWI_CTL_INIT);
sys/dev/pci/if_iwi.c
1556
CSR_WRITE_4(sc, IWI_CSR_AUTOINC_ADDR, 0);
sys/dev/pci/if_iwi.c
1558
CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, 0);
sys/dev/pci/if_iwi.c
1571
CSR_WRITE_4(sc, IWI_CSR_RST, tmp | IWI_RST_STOP_MASTER);
sys/dev/pci/if_iwi.c
1587
CSR_WRITE_4(sc, IWI_CSR_RST, tmp & ~IWI_RST_PRINCETON_RESET);
sys/dev/pci/if_iwi.c
1691
CSR_WRITE_4(sc, IWI_CSR_AUTOINC_ADDR, 0x27000);
sys/dev/pci/if_iwi.c
1705
CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, ctl);
sys/dev/pci/if_iwi.c
1706
CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, src);
sys/dev/pci/if_iwi.c
1707
CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, dst);
sys/dev/pci/if_iwi.c
1708
CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, sum);
sys/dev/pci/if_iwi.c
1718
CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, 0);
sys/dev/pci/if_iwi.c
1722
CSR_WRITE_4(sc, IWI_CSR_RST, tmp);
sys/dev/pci/if_iwi.c
1743
CSR_WRITE_4(sc, IWI_CSR_INTR_MASK, IWI_INTR_MASK);
sys/dev/pci/if_iwi.c
1746
CSR_WRITE_4(sc, IWI_CSR_RST, 0);
sys/dev/pci/if_iwi.c
1749
CSR_WRITE_4(sc, IWI_CSR_CTL, tmp | IWI_CTL_ALLOW_STANDBY);
sys/dev/pci/if_iwi.c
2234
CSR_WRITE_4(sc, IWI_CSR_CMD_BASE, sc->cmdq.map->dm_segs[0].ds_addr);
sys/dev/pci/if_iwi.c
2235
CSR_WRITE_4(sc, IWI_CSR_CMD_SIZE, IWI_CMD_RING_COUNT);
sys/dev/pci/if_iwi.c
2236
CSR_WRITE_4(sc, IWI_CSR_CMD_WIDX, sc->cmdq.cur);
sys/dev/pci/if_iwi.c
2239
CSR_WRITE_4(sc, IWI_CSR_TX_BASE(ac),
sys/dev/pci/if_iwi.c
2241
CSR_WRITE_4(sc, IWI_CSR_TX_SIZE(ac), IWI_TX_RING_COUNT);
sys/dev/pci/if_iwi.c
2242
CSR_WRITE_4(sc, IWI_CSR_TX_WIDX(ac), sc->txq[ac].cur);
sys/dev/pci/if_iwi.c
2247
CSR_WRITE_4(sc, data->reg, data->map->dm_segs[0].ds_addr);
sys/dev/pci/if_iwi.c
2250
CSR_WRITE_4(sc, IWI_CSR_RX_WIDX, IWI_RX_RING_COUNT - 1);
sys/dev/pci/if_iwi.c
2299
CSR_WRITE_4(sc, IWI_CSR_RST, IWI_RST_SW_RESET);
sys/dev/pci/if_iwi.c
923
CSR_WRITE_4(sc, data->reg, data->map->dm_segs[0].ds_addr);
sys/dev/pci/if_iwi.c
930
CSR_WRITE_4(sc, data->reg, data->map->dm_segs[0].ds_addr);
sys/dev/pci/if_iwireg.h
486
CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
sys/dev/pci/if_iwireg.h
491
CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
sys/dev/pci/if_iwireg.h
496
CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
sys/dev/pci/if_iwireg.h
497
CSR_WRITE_4((sc), IWI_CSR_INDIRECT_DATA, (val)); \
sys/dev/pci/if_iwireg.h
501
CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
sys/dev/pci/if_jme.c
1086
CSR_WRITE_4(sc, JME_PMCS, pmcs);
sys/dev/pci/if_jme.c
1087
CSR_WRITE_4(sc, JME_GPREG0, gpr);
sys/dev/pci/if_jme.c
1253
CSR_WRITE_4(sc, JME_TXCSR, sc->jme_txcsr | TXCSR_TX_ENB |
sys/dev/pci/if_jme.c
1344
CSR_WRITE_4(sc, JME_GHC, GHC_RESET);
sys/dev/pci/if_jme.c
1346
CSR_WRITE_4(sc, JME_GHC, 0);
sys/dev/pci/if_jme.c
1365
CSR_WRITE_4(sc, JME_TXTRHD, CSR_READ_4(sc, JME_TXTRHD) &
sys/dev/pci/if_jme.c
1371
CSR_WRITE_4(sc, JME_TXTRHD, CSR_READ_4(sc, JME_TXTRHD) |
sys/dev/pci/if_jme.c
1424
CSR_WRITE_4(sc, JME_GHC, ghc);
sys/dev/pci/if_jme.c
1425
CSR_WRITE_4(sc, JME_RXMAC, rxmac);
sys/dev/pci/if_jme.c
1426
CSR_WRITE_4(sc, JME_TXMAC, txmac);
sys/dev/pci/if_jme.c
1427
CSR_WRITE_4(sc, JME_TXPFC, txpause);
sys/dev/pci/if_jme.c
1434
CSR_WRITE_4(sc, JME_GPREG1, gp1);
sys/dev/pci/if_jme.c
1450
CSR_WRITE_4(sc, JME_INTR_MASK_CLR, JME_INTRS);
sys/dev/pci/if_jme.c
1462
CSR_WRITE_4(sc, JME_INTR_STATUS, status);
sys/dev/pci/if_jme.c
1476
CSR_WRITE_4(sc, JME_RXCSR, sc->jme_rxcsr |
sys/dev/pci/if_jme.c
1488
CSR_WRITE_4(sc, JME_INTR_MASK_SET, JME_INTRS);
sys/dev/pci/if_jme.c
150
CSR_WRITE_4(sc, JME_SMI, SMI_OP_READ | SMI_OP_EXECUTE |
sys/dev/pci/if_jme.c
1776
CSR_WRITE_4(sc, JME_GHC, GHC_RESET);
sys/dev/pci/if_jme.c
1778
CSR_WRITE_4(sc, JME_GHC, 0);
sys/dev/pci/if_jme.c
180
CSR_WRITE_4(sc, JME_SMI, SMI_OP_WRITE | SMI_OP_EXECUTE |
sys/dev/pci/if_jme.c
1816
CSR_WRITE_4(sc, JME_PAR0,
sys/dev/pci/if_jme.c
1818
CSR_WRITE_4(sc, JME_PAR1, eaddr[5] << 8 | eaddr[4]);
sys/dev/pci/if_jme.c
1832
CSR_WRITE_4(sc, JME_TXCSR, sc->jme_txcsr);
sys/dev/pci/if_jme.c
1835
CSR_WRITE_4(sc, JME_TXQDC, JME_TX_RING_CNT);
sys/dev/pci/if_jme.c
1839
CSR_WRITE_4(sc, JME_TXDBA_HI, JME_ADDR_HI(paddr));
sys/dev/pci/if_jme.c
1840
CSR_WRITE_4(sc, JME_TXDBA_LO, JME_ADDR_LO(paddr));
sys/dev/pci/if_jme.c
1846
CSR_WRITE_4(sc, JME_TXMAC, reg);
sys/dev/pci/if_jme.c
1884
CSR_WRITE_4(sc, JME_RXCSR, sc->jme_rxcsr);
sys/dev/pci/if_jme.c
1887
CSR_WRITE_4(sc, JME_RXQDC, JME_RX_RING_CNT);
sys/dev/pci/if_jme.c
1891
CSR_WRITE_4(sc, JME_RXDBA_HI, JME_ADDR_HI(paddr));
sys/dev/pci/if_jme.c
1892
CSR_WRITE_4(sc, JME_RXDBA_LO, JME_ADDR_LO(paddr));
sys/dev/pci/if_jme.c
1895
CSR_WRITE_4(sc, JME_RXMAC, 0);
sys/dev/pci/if_jme.c
1908
CSR_WRITE_4(sc, JME_PMCS, reg);
sys/dev/pci/if_jme.c
1918
CSR_WRITE_4(sc, JME_RXMAC, reg);
sys/dev/pci/if_jme.c
1943
CSR_WRITE_4(sc, JME_GPREG0, reg);
sys/dev/pci/if_jme.c
1953
CSR_WRITE_4(sc, JME_PCCTX, reg);
sys/dev/pci/if_jme.c
1962
CSR_WRITE_4(sc, JME_PCCRX0, reg);
sys/dev/pci/if_jme.c
1966
CSR_WRITE_4(sc, JME_SHBASE_ADDR_HI, JME_ADDR_HI(paddr));
sys/dev/pci/if_jme.c
1967
CSR_WRITE_4(sc, JME_SHBASE_ADDR_LO, JME_ADDR_LO(paddr));
sys/dev/pci/if_jme.c
1970
CSR_WRITE_4(sc, JME_TIMER1, 0);
sys/dev/pci/if_jme.c
1971
CSR_WRITE_4(sc, JME_TIMER2, 0);
sys/dev/pci/if_jme.c
1974
CSR_WRITE_4(sc, JME_TXTRHD,
sys/dev/pci/if_jme.c
1981
CSR_WRITE_4(sc, JME_RSSC, RSSC_DIS_RSS);
sys/dev/pci/if_jme.c
1984
CSR_WRITE_4(sc, JME_INTR_MASK_SET, JME_INTRS);
sys/dev/pci/if_jme.c
1985
CSR_WRITE_4(sc, JME_INTR_STATUS, 0xFFFFFFFF);
sys/dev/pci/if_jme.c
2026
CSR_WRITE_4(sc, JME_INTR_MASK_CLR, JME_INTRS);
sys/dev/pci/if_jme.c
2027
CSR_WRITE_4(sc, JME_INTR_STATUS, 0xFFFFFFFF);
sys/dev/pci/if_jme.c
2030
CSR_WRITE_4(sc, JME_SHBASE_ADDR_LO,
sys/dev/pci/if_jme.c
2083
CSR_WRITE_4(sc, JME_TXCSR, reg);
sys/dev/pci/if_jme.c
2104
CSR_WRITE_4(sc, JME_RXCSR, reg);
sys/dev/pci/if_jme.c
2245
CSR_WRITE_4(sc, JME_RXMAC, reg);
sys/dev/pci/if_jme.c
2303
CSR_WRITE_4(sc, JME_MAR0, mchash[0]);
sys/dev/pci/if_jme.c
2304
CSR_WRITE_4(sc, JME_MAR1, mchash[1]);
sys/dev/pci/if_jme.c
2305
CSR_WRITE_4(sc, JME_RXMAC, rxcfg);
sys/dev/pci/if_jme.c
245
CSR_WRITE_4(sc, JME_INTR_MASK_CLR, JME_INTRS);
sys/dev/pci/if_jme.c
291
CSR_WRITE_4(sc, JME_RXCSR, sc->jme_rxcsr);
sys/dev/pci/if_jme.c
292
CSR_WRITE_4(sc, JME_TXCSR, sc->jme_txcsr);
sys/dev/pci/if_jme.c
296
CSR_WRITE_4(sc, JME_TXDBA_HI, JME_ADDR_HI(paddr));
sys/dev/pci/if_jme.c
297
CSR_WRITE_4(sc, JME_TXDBA_LO, JME_ADDR_LO(paddr));
sys/dev/pci/if_jme.c
301
CSR_WRITE_4(sc, JME_RXDBA_HI, JME_ADDR_HI(paddr));
sys/dev/pci/if_jme.c
302
CSR_WRITE_4(sc, JME_RXDBA_LO, JME_ADDR_LO(paddr));
sys/dev/pci/if_jme.c
305
CSR_WRITE_4(sc, JME_RXCSR, sc->jme_rxcsr | RXCSR_RX_ENB |
sys/dev/pci/if_jme.c
307
CSR_WRITE_4(sc, JME_TXCSR, sc->jme_txcsr | TXCSR_TX_ENB);
sys/dev/pci/if_jme.c
315
CSR_WRITE_4(sc, JME_INTR_MASK_SET, JME_INTRS);
sys/dev/pci/if_jme.c
380
CSR_WRITE_4(sc, JME_SMBINTF, reg | SMBINTF_RD | SMBINTF_CMD_TRIGGER);
sys/dev/pci/if_jme.c
525
CSR_WRITE_4(sc, JME_MSINUM_BASE + sizeof(uint32_t) * 0, map[0]);
sys/dev/pci/if_jme.c
526
CSR_WRITE_4(sc, JME_MSINUM_BASE + sizeof(uint32_t) * 1, map[1]);
sys/dev/pci/if_jme.c
527
CSR_WRITE_4(sc, JME_MSINUM_BASE + sizeof(uint32_t) * 2, map[2]);
sys/dev/pci/if_jme.c
528
CSR_WRITE_4(sc, JME_MSINUM_BASE + sizeof(uint32_t) * 3, map[3]);
sys/dev/pci/if_lge.c
1002
CSR_WRITE_4(sc, LGE_PAR0, *(u_int32_t *)(&sc->arpcom.ac_enaddr[0]));
sys/dev/pci/if_lge.c
1003
CSR_WRITE_4(sc, LGE_PAR1, *(u_int32_t *)(&sc->arpcom.ac_enaddr[4]));
sys/dev/pci/if_lge.c
1020
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_UCAST|
sys/dev/pci/if_lge.c
1027
CSR_WRITE_4(sc, LGE_MODE1,
sys/dev/pci/if_lge.c
1030
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_PROMISC);
sys/dev/pci/if_lge.c
1037
CSR_WRITE_4(sc, LGE_MODE1,
sys/dev/pci/if_lge.c
1040
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_BCAST);
sys/dev/pci/if_lge.c
1044
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_RMVPAD);
sys/dev/pci/if_lge.c
1047
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_ERRPKTS);
sys/dev/pci/if_lge.c
1050
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_RX_GIANTS);
sys/dev/pci/if_lge.c
1053
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_TX_FLOWCTL);
sys/dev/pci/if_lge.c
1054
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_FLOWCTL);
sys/dev/pci/if_lge.c
1057
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_CRC);
sys/dev/pci/if_lge.c
1060
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_MPACK_ENB);
sys/dev/pci/if_lge.c
1063
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_VLAN_RX|LGE_MODE1_VLAN_TX|
sys/dev/pci/if_lge.c
1068
CSR_WRITE_4(sc, LGE_IMR, LGE_IMR_SETRST_CTL1|LGE_IMR_RXFIFO_WAT);
sys/dev/pci/if_lge.c
1079
CSR_WRITE_4(sc, LGE_MODE2, LGE_MODE2_RX_IPCSUM|
sys/dev/pci/if_lge.c
1087
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL0|LGE_MODE1_GMIIPOLL);
sys/dev/pci/if_lge.c
1090
CSR_WRITE_4(sc, LGE_RXDESC_ADDR_HI, 0);
sys/dev/pci/if_lge.c
1091
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_RX_ENB);
sys/dev/pci/if_lge.c
1093
CSR_WRITE_4(sc, LGE_TXDESC_ADDR_HI, 0);
sys/dev/pci/if_lge.c
1094
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_TX_ENB);
sys/dev/pci/if_lge.c
1099
CSR_WRITE_4(sc, LGE_IMR, LGE_IMR_SETRST_CTL0|
sys/dev/pci/if_lge.c
1168
CSR_WRITE_4(sc, LGE_MODE1,
sys/dev/pci/if_lge.c
1175
CSR_WRITE_4(sc, LGE_MODE1,
sys/dev/pci/if_lge.c
1247
CSR_WRITE_4(sc, LGE_IMR, LGE_IMR_INTR_ENB);
sys/dev/pci/if_lge.c
1250
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_ENB|LGE_MODE1_TX_ENB);
sys/dev/pci/if_lge.c
160
CSR_WRITE_4(sc, reg, \
sys/dev/pci/if_lge.c
164
CSR_WRITE_4(sc, reg, \
sys/dev/pci/if_lge.c
168
CSR_WRITE_4(sc, LGE_MEAR, CSR_READ_4(sc, LGE_MEAR) | x)
sys/dev/pci/if_lge.c
171
CSR_WRITE_4(sc, LGE_MEAR, CSR_READ_4(sc, LGE_MEAR) & ~x)
sys/dev/pci/if_lge.c
182
CSR_WRITE_4(sc, LGE_EECTL, LGE_EECTL_CMD_READ|
sys/dev/pci/if_lge.c
236
CSR_WRITE_4(sc, LGE_GMIICTL, (phy << 8) | reg | LGE_GMIICMD_READ);
sys/dev/pci/if_lge.c
256
CSR_WRITE_4(sc, LGE_GMIICTL,
sys/dev/pci/if_lge.c
313
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_RX_MCAST);
sys/dev/pci/if_lge.c
319
CSR_WRITE_4(sc, LGE_MAR0, 0xFFFFFFFF);
sys/dev/pci/if_lge.c
320
CSR_WRITE_4(sc, LGE_MAR1, 0xFFFFFFFF);
sys/dev/pci/if_lge.c
325
CSR_WRITE_4(sc, LGE_MAR0, 0);
sys/dev/pci/if_lge.c
326
CSR_WRITE_4(sc, LGE_MAR1, 0);
sys/dev/pci/if_lge.c
340
CSR_WRITE_4(sc, LGE_MAR0, hashes[0]);
sys/dev/pci/if_lge.c
341
CSR_WRITE_4(sc, LGE_MAR1, hashes[1]);
sys/dev/pci/if_lge.c
601
CSR_WRITE_4(sc, LGE_RXDESC_ADDR_HI, 0);
sys/dev/pci/if_lge.c
664
CSR_WRITE_4(sc, LGE_RXDESC_ADDR_LO, VTOPHYS(c));
sys/dev/pci/if_lge.c
803
CSR_WRITE_4(sc, LGE_STATSIDX, LGE_STATS_SINGLE_COLL_PKTS);
sys/dev/pci/if_lge.c
805
CSR_WRITE_4(sc, LGE_STATSIDX, LGE_STATS_MULTI_COLL_PKTS);
sys/dev/pci/if_lge.c
870
CSR_WRITE_4(sc, LGE_IMR, LGE_IMR_SETRST_CTL0|LGE_IMR_INTR_ENB);
sys/dev/pci/if_lge.c
918
CSR_WRITE_4(sc, LGE_TXDESC_ADDR_LO, VTOPHYS(cur_tx));
sys/dev/pci/if_msk.c
1898
CSR_WRITE_4(sc, SK_Y2_ICR, 2);
sys/dev/pci/if_msk.c
1957
CSR_WRITE_4(sc, SK_STAT_BMU_CSR, SK_STAT_BMU_IRQ_CLEAR);
sys/dev/pci/if_msk.c
1961
CSR_WRITE_4(sc, SK_Y2_ICR, 2);
sys/dev/pci/if_msk.c
2207
CSR_WRITE_4(sc, SK_IMR, sc->sk_intrmask);
sys/dev/pci/if_msk.c
2260
CSR_WRITE_4(sc, SK_IMR, sc->sk_intrmask);
sys/dev/pci/if_msk.c
365
CSR_WRITE_4(sc, reg, x);
sys/dev/pci/if_msk.c
831
CSR_WRITE_4(sc, SK_I2CHWIRQ, 1);
sys/dev/pci/if_msk.c
838
CSR_WRITE_4(sc, SK_DPT_TIMER_CTRL, SK_DPT_TCTL_STOP);
sys/dev/pci/if_nge.c
1187
CSR_WRITE_4(sc, NGE_TBI_BMCR, 0);
sys/dev/pci/if_nge.c
1211
CSR_WRITE_4(sc, NGE_TX_CFG, txcfg);
sys/dev/pci/if_nge.c
1212
CSR_WRITE_4(sc, NGE_RX_CFG, rxcfg);
sys/dev/pci/if_nge.c
1254
CSR_WRITE_4(sc, NGE_IER, 0);
sys/dev/pci/if_nge.c
1258
CSR_WRITE_4(sc, NGE_GPIO, CSR_READ_4(sc, NGE_GPIO)
sys/dev/pci/if_nge.c
1307
CSR_WRITE_4(sc, NGE_IER, 1);
sys/dev/pci/if_nge.c
1314
CSR_WRITE_4(sc, NGE_GPIO, CSR_READ_4(sc, NGE_GPIO)
sys/dev/pci/if_nge.c
1463
CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_PAR0);
sys/dev/pci/if_nge.c
1464
CSR_WRITE_4(sc, NGE_RXFILT_DATA,
sys/dev/pci/if_nge.c
1466
CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_PAR1);
sys/dev/pci/if_nge.c
1467
CSR_WRITE_4(sc, NGE_RXFILT_DATA,
sys/dev/pci/if_nge.c
1469
CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_PAR2);
sys/dev/pci/if_nge.c
1470
CSR_WRITE_4(sc, NGE_RXFILT_DATA,
sys/dev/pci/if_nge.c
1521
CSR_WRITE_4(sc, NGE_RX_LISTPTR,
sys/dev/pci/if_nge.c
1523
CSR_WRITE_4(sc, NGE_TX_LISTPTR,
sys/dev/pci/if_nge.c
1527
CSR_WRITE_4(sc, NGE_RX_CFG, NGE_RXCFG);
sys/dev/pci/if_nge.c
1533
CSR_WRITE_4(sc, NGE_VLAN_IP_RXCTL, NGE_VIPRXCTL_IPCSUM_ENB);
sys/dev/pci/if_nge.c
1545
CSR_WRITE_4(sc, NGE_TX_CFG, NGE_TXCFG);
sys/dev/pci/if_nge.c
1577
CSR_WRITE_4(sc, NGE_TX_CFG, txcfg);
sys/dev/pci/if_nge.c
1578
CSR_WRITE_4(sc, NGE_RX_CFG, rxcfg);
sys/dev/pci/if_nge.c
1600
CSR_WRITE_4(sc, NGE_IHR, 0x01);
sys/dev/pci/if_nge.c
1605
CSR_WRITE_4(sc, NGE_IMR, NGE_INTRS);
sys/dev/pci/if_nge.c
1606
CSR_WRITE_4(sc, NGE_IER, 1);
sys/dev/pci/if_nge.c
1679
CSR_WRITE_4(sc, NGE_TBI_ANAR, anar);
sys/dev/pci/if_nge.c
1683
CSR_WRITE_4(sc, NGE_TBI_BMCR, bmcr);
sys/dev/pci/if_nge.c
1686
CSR_WRITE_4(sc, NGE_TBI_BMCR, bmcr);
sys/dev/pci/if_nge.c
1702
CSR_WRITE_4(sc, NGE_TX_CFG, txcfg);
sys/dev/pci/if_nge.c
1703
CSR_WRITE_4(sc, NGE_RX_CFG, rxcfg);
sys/dev/pci/if_nge.c
181
CSR_WRITE_4(sc, reg, \
sys/dev/pci/if_nge.c
185
CSR_WRITE_4(sc, reg, \
sys/dev/pci/if_nge.c
1876
CSR_WRITE_4(sc, NGE_IER, 0);
sys/dev/pci/if_nge.c
1877
CSR_WRITE_4(sc, NGE_IMR, 0);
sys/dev/pci/if_nge.c
1880
CSR_WRITE_4(sc, NGE_TX_LISTPTR, 0);
sys/dev/pci/if_nge.c
1881
CSR_WRITE_4(sc, NGE_RX_LISTPTR, 0);
sys/dev/pci/if_nge.c
189
CSR_WRITE_4(sc, NGE_MEAR, CSR_READ_4(sc, NGE_MEAR) | (x))
sys/dev/pci/if_nge.c
192
CSR_WRITE_4(sc, NGE_MEAR, CSR_READ_4(sc, NGE_MEAR) & ~(x))
sys/dev/pci/if_nge.c
224
CSR_WRITE_4(sc, NGE_MEAR, 0x00000000);
sys/dev/pci/if_nge.c
375
CSR_WRITE_4(sc, NGE_MEAR, 0);
sys/dev/pci/if_nge.c
551
CSR_WRITE_4(sc, NGE_TX_CFG, txcfg);
sys/dev/pci/if_nge.c
552
CSR_WRITE_4(sc, NGE_RX_CFG, rxcfg);
sys/dev/pci/if_nge.c
595
CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_MCAST_LO + i);
sys/dev/pci/if_nge.c
596
CSR_WRITE_4(sc, NGE_RXFILT_DATA, 0);
sys/dev/pci/if_nge.c
611
CSR_WRITE_4(sc, NGE_RXFILT_CTL,
sys/dev/pci/if_nge.c
617
CSR_WRITE_4(sc, NGE_RXFILT_CTL, filtsave);
sys/dev/pci/if_nge.c
642
CSR_WRITE_4(sc, NGE_CLKRUN, NGE_CLKRUN_PMESTS);
sys/dev/pci/if_nge.c
643
CSR_WRITE_4(sc, NGE_CLKRUN, 0);
sys/dev/pci/if_nge.c
710
CSR_WRITE_4(sc, NGE_IER, 0);
sys/dev/pci/if_nge.c
820
CSR_WRITE_4(sc, NGE_GPIO, CSR_READ_4(sc, NGE_GPIO)
sys/dev/pci/if_se.c
1056
CSR_WRITE_4(sc, IntrStatus, status);
sys/dev/pci/if_se.c
1058
CSR_WRITE_4(sc, IntrMask, 0);
sys/dev/pci/if_se.c
1067
CSR_WRITE_4(sc, RX_CTL,
sys/dev/pci/if_se.c
1076
CSR_WRITE_4(sc, IntrStatus, status);
sys/dev/pci/if_se.c
1081
CSR_WRITE_4(sc, IntrMask, SE_INTRS);
sys/dev/pci/if_se.c
1234
CSR_WRITE_4(sc, TX_CTL, 0x1a00 | TX_CTL_ENB | TX_CTL_POLL);
sys/dev/pci/if_se.c
1266
CSR_WRITE_4(sc, TX_DESC,
sys/dev/pci/if_se.c
1268
CSR_WRITE_4(sc, RX_DESC,
sys/dev/pci/if_se.c
1271
CSR_WRITE_4(sc, TxMacControl, 0x60);
sys/dev/pci/if_se.c
1272
CSR_WRITE_4(sc, RxWakeOnLan, 0);
sys/dev/pci/if_se.c
1273
CSR_WRITE_4(sc, RxWakeOnLanData, 0);
sys/dev/pci/if_se.c
1289
CSR_WRITE_4(sc, IntrStatus, 0xFFFFFFFF);
sys/dev/pci/if_se.c
1290
CSR_WRITE_4(sc, IntrMask, SE_INTRS);
sys/dev/pci/if_se.c
1293
CSR_WRITE_4(sc, TX_CTL, 0x1a00 | TX_CTL_ENB);
sys/dev/pci/if_se.c
1294
CSR_WRITE_4(sc, RX_CTL, 0x1a00 | 0x000c | RX_CTL_POLL | RX_CTL_ENB);
sys/dev/pci/if_se.c
1416
CSR_WRITE_4(sc, IntrMask, 0);
sys/dev/pci/if_se.c
1418
CSR_WRITE_4(sc, IntrStatus, 0xffffffff);
sys/dev/pci/if_se.c
1420
CSR_WRITE_4(sc, TX_CTL, 0x1a00);
sys/dev/pci/if_se.c
1421
CSR_WRITE_4(sc, RX_CTL, 0x1a00);
sys/dev/pci/if_se.c
1424
CSR_WRITE_4(sc, IntrMask, 0);
sys/dev/pci/if_se.c
1425
CSR_WRITE_4(sc, IntrStatus, 0xffffffff);
sys/dev/pci/if_se.c
211
CSR_WRITE_4(sc, ROMInterface,
sys/dev/pci/if_se.c
321
CSR_WRITE_4(sc, GMIIControl, ctrl);
sys/dev/pci/if_se.c
431
CSR_WRITE_4(sc, StationControl, ctl);
sys/dev/pci/if_se.c
433
CSR_WRITE_4(sc, RGMIIDelay, 0x0441);
sys/dev/pci/if_se.c
434
CSR_WRITE_4(sc, RGMIIDelay, 0x0440);
sys/dev/pci/if_se.c
479
CSR_WRITE_4(sc, RxHashTable, hashes[0]);
sys/dev/pci/if_se.c
480
CSR_WRITE_4(sc, RxHashTable2, hashes[1]);
sys/dev/pci/if_se.c
486
CSR_WRITE_4(sc, IntrMask, 0);
sys/dev/pci/if_se.c
487
CSR_WRITE_4(sc, IntrStatus, 0xffffffff);
sys/dev/pci/if_se.c
490
CSR_WRITE_4(sc, IntrControl, 0x8000);
sys/dev/pci/if_se.c
493
CSR_WRITE_4(sc, IntrControl, 0);
sys/dev/pci/if_se.c
495
CSR_WRITE_4(sc, TX_CTL, 0x1a00);
sys/dev/pci/if_se.c
496
CSR_WRITE_4(sc, RX_CTL, 0x1a00);
sys/dev/pci/if_se.c
498
CSR_WRITE_4(sc, IntrMask, 0);
sys/dev/pci/if_se.c
499
CSR_WRITE_4(sc, IntrStatus, 0xffffffff);
sys/dev/pci/if_se.c
501
CSR_WRITE_4(sc, GMIIControl, 0);
sys/dev/pci/if_sis.c
149
CSR_WRITE_4(sc, reg, \
sys/dev/pci/if_sis.c
153
CSR_WRITE_4(sc, reg, \
sys/dev/pci/if_sis.c
1565
CSR_WRITE_4(sc, SIS_RX_LISTPTR,
sys/dev/pci/if_sis.c
157
CSR_WRITE_4(sc, SIS_EECTL, CSR_READ_4(sc, SIS_EECTL) | x)
sys/dev/pci/if_sis.c
160
CSR_WRITE_4(sc, SIS_EECTL, CSR_READ_4(sc, SIS_EECTL) & ~x)
sys/dev/pci/if_sis.c
1740
CSR_WRITE_4(sc, NS_IHR, NS_IHR_VALUE);
sys/dev/pci/if_sis.c
1747
CSR_WRITE_4(sc, SIS_RXFILT_CTL, NS_FILTADDR_PAR0);
sys/dev/pci/if_sis.c
1748
CSR_WRITE_4(sc, SIS_RXFILT_DATA,
sys/dev/pci/if_sis.c
1750
CSR_WRITE_4(sc, SIS_RXFILT_CTL, NS_FILTADDR_PAR1);
sys/dev/pci/if_sis.c
1751
CSR_WRITE_4(sc, SIS_RXFILT_DATA,
sys/dev/pci/if_sis.c
1753
CSR_WRITE_4(sc, SIS_RXFILT_CTL, NS_FILTADDR_PAR2);
sys/dev/pci/if_sis.c
1754
CSR_WRITE_4(sc, SIS_RXFILT_DATA,
sys/dev/pci/if_sis.c
1757
CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR0);
sys/dev/pci/if_sis.c
1758
CSR_WRITE_4(sc, SIS_RXFILT_DATA,
sys/dev/pci/if_sis.c
1760
CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR1);
sys/dev/pci/if_sis.c
1761
CSR_WRITE_4(sc, SIS_RXFILT_DATA,
sys/dev/pci/if_sis.c
1763
CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR2);
sys/dev/pci/if_sis.c
1764
CSR_WRITE_4(sc, SIS_RXFILT_DATA,
sys/dev/pci/if_sis.c
1787
CSR_WRITE_4(sc, NS_PHY_PAGE, 0x0001);
sys/dev/pci/if_sis.c
1788
CSR_WRITE_4(sc, NS_PHY_CR, 0x189C);
sys/dev/pci/if_sis.c
1790
CSR_WRITE_4(sc, NS_PHY_TDATA, 0x0000);
sys/dev/pci/if_sis.c
1792
CSR_WRITE_4(sc, NS_PHY_DSPCFG, 0x5040);
sys/dev/pci/if_sis.c
1794
CSR_WRITE_4(sc, NS_PHY_SDCFG, 0x008C);
sys/dev/pci/if_sis.c
1795
CSR_WRITE_4(sc, NS_PHY_PAGE, 0);
sys/dev/pci/if_sis.c
1806
CSR_WRITE_4(sc, SIS_RX_LISTPTR, sc->sc_listmap->dm_segs[0].ds_addr +
sys/dev/pci/if_sis.c
1808
CSR_WRITE_4(sc, SIS_TX_LISTPTR, sc->sc_listmap->dm_segs[0].ds_addr +
sys/dev/pci/if_sis.c
1816
CSR_WRITE_4(sc, SIS_RX_CFG, SIS_RXCFG64);
sys/dev/pci/if_sis.c
1818
CSR_WRITE_4(sc, SIS_RX_CFG, SIS_RXCFG256);
sys/dev/pci/if_sis.c
1827
CSR_WRITE_4(sc, SIS_TX_CFG, SIS_TXCFG_100);
sys/dev/pci/if_sis.c
1832
CSR_WRITE_4(sc, SIS_IMR, SIS_INTRS);
sys/dev/pci/if_sis.c
1833
CSR_WRITE_4(sc, SIS_IER, 1);
sys/dev/pci/if_sis.c
1988
CSR_WRITE_4(sc, SIS_IER, 0);
sys/dev/pci/if_sis.c
1989
CSR_WRITE_4(sc, SIS_IMR, 0);
sys/dev/pci/if_sis.c
1993
CSR_WRITE_4(sc, SIS_TX_LISTPTR, 0);
sys/dev/pci/if_sis.c
1994
CSR_WRITE_4(sc, SIS_RX_LISTPTR, 0);
sys/dev/pci/if_sis.c
213
CSR_WRITE_4(sc, SIS_EECTL, 0x00000000);
sys/dev/pci/if_sis.c
334
CSR_WRITE_4(sc, SIS_CSR, SIS_CSR_RELOAD | csrsave);
sys/dev/pci/if_sis.c
335
CSR_WRITE_4(sc, SIS_CSR, 0);
sys/dev/pci/if_sis.c
337
CSR_WRITE_4(sc, SIS_RXFILT_CTL, rxfilt & ~SIS_RXFILTCTL_ENABLE);
sys/dev/pci/if_sis.c
339
CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR0);
sys/dev/pci/if_sis.c
341
CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR1);
sys/dev/pci/if_sis.c
343
CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR2);
sys/dev/pci/if_sis.c
346
CSR_WRITE_4(sc, SIS_RXFILT_CTL, rxfilt);
sys/dev/pci/if_sis.c
347
CSR_WRITE_4(sc, SIS_CSR, csrsave);
sys/dev/pci/if_sis.c
581
CSR_WRITE_4(sc, SIS_PHYCTL,
sys/dev/pci/if_sis.c
622
CSR_WRITE_4(sc, NS_BMCR + (reg * 4), data);
sys/dev/pci/if_sis.c
638
CSR_WRITE_4(sc, SIS_PHYCTL, (data << 16) | (phy << 11) |
sys/dev/pci/if_sis.c
675
CSR_WRITE_4(sc, SIS_TX_CFG, SIS_TXCFG_10);
sys/dev/pci/if_sis.c
679
CSR_WRITE_4(sc, SIS_TX_CFG, SIS_TXCFG_100);
sys/dev/pci/if_sis.c
726
CSR_WRITE_4(sc, NS_PHY_PAGE, 0x0001);
sys/dev/pci/if_sis.c
728
CSR_WRITE_4(sc, NS_PHY_DSPCFG, reg | 0x1000);
sys/dev/pci/if_sis.c
736
CSR_WRITE_4(sc, NS_PHY_TDATA, 0x00e8);
sys/dev/pci/if_sis.c
739
CSR_WRITE_4(sc, NS_PHY_PAGE, 0);
sys/dev/pci/if_sis.c
793
CSR_WRITE_4(sc, SIS_RXFILT_CTL, rxfilt & ~SIS_RXFILTCTL_ENABLE);
sys/dev/pci/if_sis.c
823
CSR_WRITE_4(sc, SIS_RXFILT_CTL, NS_FILTADDR_FMEM_LO + (i * 2));
sys/dev/pci/if_sis.c
824
CSR_WRITE_4(sc, SIS_RXFILT_DATA, 0);
sys/dev/pci/if_sis.c
834
CSR_WRITE_4(sc, SIS_RXFILT_CTL, NS_FILTADDR_FMEM_LO + index);
sys/dev/pci/if_sis.c
845
CSR_WRITE_4(sc, SIS_RXFILT_CTL, rxfilt);
sys/dev/pci/if_sis.c
847
CSR_WRITE_4(sc, SIS_RXFILT_CTL, rxfilt | SIS_RXFILTCTL_ENABLE);
sys/dev/pci/if_sis.c
873
CSR_WRITE_4(sc, SIS_RXFILT_CTL, rxfilt & ~SIS_RXFILTCTL_ENABLE);
sys/dev/pci/if_sis.c
909
CSR_WRITE_4(sc, SIS_RXFILT_CTL, (4 + i) << 16);
sys/dev/pci/if_sis.c
910
CSR_WRITE_4(sc, SIS_RXFILT_DATA, hashes[i]);
sys/dev/pci/if_sis.c
913
CSR_WRITE_4(sc, SIS_RXFILT_CTL, rxfilt);
sys/dev/pci/if_sis.c
915
CSR_WRITE_4(sc, SIS_RXFILT_CTL, rxfilt | SIS_RXFILTCTL_ENABLE);
sys/dev/pci/if_sis.c
942
CSR_WRITE_4(sc, NS_CLKRUN, NS_CLKRUN_PMESTS);
sys/dev/pci/if_sis.c
943
CSR_WRITE_4(sc, NS_CLKRUN, 0);
sys/dev/pci/if_sk.c
1527
CSR_WRITE_4(sc, sc_if->sk_tx_bmu, SK_TXBMU_TX_START);
sys/dev/pci/if_sk.c
1873
CSR_WRITE_4(sc, SK_BMU_RX_CSR0,
sys/dev/pci/if_sk.c
1878
CSR_WRITE_4(sc, SK_BMU_RX_CSR1,
sys/dev/pci/if_sk.c
1885
CSR_WRITE_4(sc, SK_BMU_TXS_CSR0,
sys/dev/pci/if_sk.c
1890
CSR_WRITE_4(sc, SK_BMU_TXS_CSR1,
sys/dev/pci/if_sk.c
1924
CSR_WRITE_4(sc, SK_IMR, sc->sk_intrmask);
sys/dev/pci/if_sk.c
223
CSR_WRITE_4(sc, reg, x);
sys/dev/pci/if_sk.c
2369
CSR_WRITE_4(sc, SK_IMR, sc->sk_intrmask);
sys/dev/pci/if_sk.c
2390
CSR_WRITE_4(sc, sc_if->sk_tx_bmu, SK_TXBMU_TX_START);
sys/dev/pci/if_sk.c
2422
CSR_WRITE_4(sc, sc_if->sk_tx_bmu, SK_TXBMU_TX_STOP);
sys/dev/pci/if_sk.c
2491
CSR_WRITE_4(sc, SK_IMR, sc->sk_intrmask);
sys/dev/pci/if_ste.c
1074
CSR_WRITE_4(sc, STE_RX_DMALIST_PTR,
sys/dev/pci/if_ste.c
1085
CSR_WRITE_4(sc, STE_TX_DMALIST_PTR, 0);
sys/dev/pci/if_ste.c
113
CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) | x)
sys/dev/pci/if_ste.c
116
CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) & ~x)
sys/dev/pci/if_ste.c
1342
CSR_WRITE_4(sc, STE_TX_DMALIST_PTR,
sys/dev/pci/if_stge.c
1059
CSR_WRITE_4(sc, STGE_AsicCtrl,
sys/dev/pci/if_stge.c
1156
CSR_WRITE_4(sc, STGE_RMONStatisticsMask, 0xffffffff);
sys/dev/pci/if_stge.c
1157
CSR_WRITE_4(sc, STGE_StatisticsMask,
sys/dev/pci/if_stge.c
1169
CSR_WRITE_4(sc, STGE_TFDListPtrHi, 0); /* NOTE: 32-bit DMA */
sys/dev/pci/if_stge.c
1170
CSR_WRITE_4(sc, STGE_TFDListPtrLo,
sys/dev/pci/if_stge.c
1173
CSR_WRITE_4(sc, STGE_RFDListPtrHi, 0); /* NOTE: 32-bit DMA */
sys/dev/pci/if_stge.c
1174
CSR_WRITE_4(sc, STGE_RFDListPtrLo,
sys/dev/pci/if_stge.c
1208
CSR_WRITE_4(sc, STGE_RxDMAIntCtrl,
sys/dev/pci/if_stge.c
1223
CSR_WRITE_4(sc, STGE_DMACtrl, sc->sc_DMACtrl |
sys/dev/pci/if_stge.c
1251
CSR_WRITE_4(sc, STGE_MACCtrl, sc->sc_MACCtrl);
sys/dev/pci/if_stge.c
1351
CSR_WRITE_4(sc, STGE_MACCtrl,
sys/dev/pci/if_stge.c
1358
CSR_WRITE_4(sc, STGE_TFDListPtrHi, 0);
sys/dev/pci/if_stge.c
1359
CSR_WRITE_4(sc, STGE_TFDListPtrLo, 0);
sys/dev/pci/if_stge.c
1360
CSR_WRITE_4(sc, STGE_RFDListPtrHi, 0);
sys/dev/pci/if_stge.c
1361
CSR_WRITE_4(sc, STGE_RFDListPtrLo, 0);
sys/dev/pci/if_stge.c
1515
CSR_WRITE_4(sc, STGE_HashTable0, mchash[0]);
sys/dev/pci/if_stge.c
1516
CSR_WRITE_4(sc, STGE_HashTable1, mchash[1]);
sys/dev/pci/if_stge.c
1566
CSR_WRITE_4(sc, STGE_MACCtrl, sc->sc_MACCtrl);
sys/dev/pci/if_stge.c
584
CSR_WRITE_4(sc, STGE_DMACtrl,
sys/dev/pci/if_tl.c
1106
CSR_WRITE_4(sc, TL_CH_PARM, VTOPHYS(sc->tl_cdata.tl_rx_head->tl_ptr));
sys/dev/pci/if_tl.c
1184
CSR_WRITE_4(sc, TL_CH_PARM,
sys/dev/pci/if_tl.c
1515
CSR_WRITE_4(sc, TL_CH_PARM, VTOPHYS(start_tx->tl_ptr));
sys/dev/pci/if_tl.c
1578
CSR_WRITE_4(sc, TL_CH_PARM, VTOPHYS(&sc->tl_ldata->tl_rx_list[0]));
sys/dev/pci/if_tl.c
1728
CSR_WRITE_4(sc, TL_CH_PARM, 0);
sys/dev/pci/if_tl.c
1733
CSR_WRITE_4(sc, TL_CH_PARM, 0);
sys/dev/pci/if_tl.c
1743
CSR_WRITE_4(sc, TL_CH_PARM, 0);
sys/dev/pci/if_tl.c
330
CSR_WRITE_4(sc, TL_DIO_DATA + (reg & 3), val);
sys/dev/pci/if_tlreg.h
514
#define CMD_PUT(sc, x) CSR_WRITE_4(sc, TL_HOSTCMD, x)
sys/dev/pci/if_tlreg.h
516
CSR_WRITE_4(sc, TL_HOSTCMD, CSR_READ_4(sc, TL_HOSTCMD) | (x))
sys/dev/pci/if_tlreg.h
518
CSR_WRITE_4(sc, TL_HOSTCMD, CSR_READ_4(sc, TL_HOSTCMD) & ~(x))
sys/dev/pci/if_vge.c
1264
CSR_WRITE_4(sc, VGE_ISR, status);
sys/dev/pci/if_vge.c
1548
CSR_WRITE_4(sc, VGE_TXDESC_ADDR_LO0,
sys/dev/pci/if_vge.c
1552
CSR_WRITE_4(sc, VGE_RXDESC_ADDR_LO,
sys/dev/pci/if_vge.c
1628
CSR_WRITE_4(sc, VGE_IMR, VGE_INTRS);
sys/dev/pci/if_vge.c
1629
CSR_WRITE_4(sc, VGE_ISR, 0);
sys/dev/pci/if_vge.c
1811
CSR_WRITE_4(sc, VGE_ISR, 0xFFFFFFFF);
sys/dev/pci/if_vge.c
1814
CSR_WRITE_4(sc, VGE_RXDESC_ADDR_LO, 0);
sys/dev/pci/if_vge.c
514
CSR_WRITE_4(sc, VGE_MAR0, hashes[0]);
sys/dev/pci/if_vge.c
515
CSR_WRITE_4(sc, VGE_MAR1, hashes[1]);
sys/dev/pci/if_vgevar.h
118
CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) | (x))
sys/dev/pci/if_vgevar.h
125
CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) & ~(x))
sys/dev/pci/if_vr.c
1008
CSR_WRITE_4(sc, VR_TXADDR, cur_tx->vr_paddr);
sys/dev/pci/if_vr.c
1451
CSR_WRITE_4(sc, VR_RXADDR, sc->vr_cdata.vr_rx_cons->vr_paddr);
sys/dev/pci/if_vr.c
1458
CSR_WRITE_4(sc, VR_TXADDR, sc->sc_listmap.vrm_map->dm_segs[0].ds_addr +
sys/dev/pci/if_vr.c
1618
CSR_WRITE_4(sc, VR_TXADDR, 0x00000000);
sys/dev/pci/if_vr.c
1619
CSR_WRITE_4(sc, VR_RXADDR, 0x00000000);
sys/dev/pci/if_vr.c
194
CSR_WRITE_4(sc, reg, \
sys/dev/pci/if_vr.c
198
CSR_WRITE_4(sc, reg, \
sys/dev/pci/if_vr.c
373
CSR_WRITE_4(sc, VR_MAR0, hashes[0]);
sys/dev/pci/if_vr.c
374
CSR_WRITE_4(sc, VR_MAR1, hashes[1]);
sys/dev/pci/if_vr.c
965
CSR_WRITE_4(sc, VR_RXADDR, sc->vr_cdata.vr_rx_cons->vr_paddr);
sys/dev/pci/if_wb.c
1038
CSR_WRITE_4(sc, WB_TXSTART, 0xFFFFFFFF);
sys/dev/pci/if_wb.c
1060
CSR_WRITE_4(sc, WB_IMR, 0x00000000);
sys/dev/pci/if_wb.c
1066
CSR_WRITE_4(sc, WB_ISR, status);
sys/dev/pci/if_wb.c
1098
CSR_WRITE_4(sc, WB_TXSTART, 0xFFFFFFFF);
sys/dev/pci/if_wb.c
1118
CSR_WRITE_4(sc, WB_IMR, WB_INTRS);
sys/dev/pci/if_wb.c
1300
CSR_WRITE_4(sc, WB_TXSTART, 0xFFFFFFFF);
sys/dev/pci/if_wb.c
1346
CSR_WRITE_4(sc, WB_BUSCTL, WB_BUSCTL_CONFIG);
sys/dev/pci/if_wb.c
1351
CSR_WRITE_4(sc, WB_BUSCTL, WB_BUSCTL_MUSTBEONE|WB_BUSCTL_ARBITRATION);
sys/dev/pci/if_wb.c
1414
CSR_WRITE_4(sc, WB_RXADDR, VTOPHYS(&sc->wb_ldata->wb_rx_list[0]));
sys/dev/pci/if_wb.c
1419
CSR_WRITE_4(sc, WB_IMR, WB_INTRS);
sys/dev/pci/if_wb.c
1420
CSR_WRITE_4(sc, WB_ISR, 0xFFFFFFFF);
sys/dev/pci/if_wb.c
1424
CSR_WRITE_4(sc, WB_RXSTART, 0xFFFFFFFF);
sys/dev/pci/if_wb.c
1427
CSR_WRITE_4(sc, WB_TXADDR, VTOPHYS(&sc->wb_ldata->wb_tx_list[0]));
sys/dev/pci/if_wb.c
1555
CSR_WRITE_4(sc, WB_IMR, 0x00000000);
sys/dev/pci/if_wb.c
1556
CSR_WRITE_4(sc, WB_TXADDR, 0x00000000);
sys/dev/pci/if_wb.c
1557
CSR_WRITE_4(sc, WB_RXADDR, 0x00000000);
sys/dev/pci/if_wb.c
163
CSR_WRITE_4(sc, reg, \
sys/dev/pci/if_wb.c
167
CSR_WRITE_4(sc, reg, \
sys/dev/pci/if_wb.c
171
CSR_WRITE_4(sc, WB_SIO, \
sys/dev/pci/if_wb.c
175
CSR_WRITE_4(sc, WB_SIO, \
sys/dev/pci/if_wb.c
217
CSR_WRITE_4(sc, WB_SIO, WB_SIO_EESEL|WB_SIO_EE_CS);
sys/dev/pci/if_wb.c
224
CSR_WRITE_4(sc, WB_SIO, WB_SIO_EESEL|WB_SIO_EE_CS);
sys/dev/pci/if_wb.c
239
CSR_WRITE_4(sc, WB_SIO, 0);
sys/dev/pci/if_wb.c
328
CSR_WRITE_4(sc, WB_SIO, 0);
sys/dev/pci/if_wb.c
515
CSR_WRITE_4(sc, WB_NETCFG, rxfilt);
sys/dev/pci/if_wb.c
516
CSR_WRITE_4(sc, WB_MAR0, 0xFFFFFFFF);
sys/dev/pci/if_wb.c
517
CSR_WRITE_4(sc, WB_MAR1, 0xFFFFFFFF);
sys/dev/pci/if_wb.c
522
CSR_WRITE_4(sc, WB_MAR0, 0);
sys/dev/pci/if_wb.c
523
CSR_WRITE_4(sc, WB_MAR1, 0);
sys/dev/pci/if_wb.c
542
CSR_WRITE_4(sc, WB_MAR0, hashes[0]);
sys/dev/pci/if_wb.c
543
CSR_WRITE_4(sc, WB_MAR1, hashes[1]);
sys/dev/pci/if_wb.c
544
CSR_WRITE_4(sc, WB_NETCFG, rxfilt);
sys/dev/pci/if_wb.c
597
CSR_WRITE_4(sc, WB_NETCFG, 0);
sys/dev/pci/if_wb.c
598
CSR_WRITE_4(sc, WB_BUSCTL, 0);
sys/dev/pci/if_wb.c
599
CSR_WRITE_4(sc, WB_TXADDR, 0);
sys/dev/pci/if_wb.c
600
CSR_WRITE_4(sc, WB_RXADDR, 0);
sys/dev/pci/if_wb.c
955
CSR_WRITE_4(sc, WB_RXADDR, VTOPHYS(&sc->wb_ldata->wb_rx_list[0]));
sys/dev/pci/if_wb.c
958
CSR_WRITE_4(sc, WB_RXSTART, 0xFFFFFFFF);