pci
cdev_decl(pci);
cdev_pci_init(NPCI,pci), /* 52: PCI user */
register struct pcibus_attach_args *pci = aux;
printf("%s at %s", pci->pba_busname, p);
printf(" bus %d", pci->pba_bus);
cdev_decl(pci);
cdev_pci_init(NPCI,pci), /* 72: PCI user */
(gnt->info.pci.BusDevFunc >> 8) & 0xff,
(gnt->info.pci.BusDevFunc >> 3) & 0x1f,
gnt->info.pci.BusDevFunc & 0x7);
} pci, cardbus;
cdev_pci_init(NPCI,pci), /* 88: PCI user */
cdev_decl(pci);
cdev_decl(pci);
cdev_decl(pci);
cdev_pci_init(NPCI,pci), /* 72: PCI user */
cdev_decl(pci);
cdev_pci_init(NPCI,pci), /* 31: PCI user */
cdev_decl(pci);
cdev_pci_init(NPCI,pci), /* 72: PCI user */
(gnt->info.pci.BusDevFunc >> 8) & 0xff,
(gnt->info.pci.BusDevFunc >> 3) & 0x1f,
gnt->info.pci.BusDevFunc & 0x7);
} pci, cardbus;
cdev_decl(pci);
cdev_pci_init(NPCI,pci), /* 88: PCI user */
cdev_decl(pci);
cdev_decl(pci);
cdev_pci_init(NPCI,pci), /* 29: PCI user */
cdev_decl(pci);
cdev_pci_init(NPCI,pci), /* 71: PCI user */
cdev_decl(pci);
cdev_pci_init(NPCI,pci), /* 29: PCI user */
cdev_decl(pci);
cdev_pci_init(NPCI,pci), /* 93: PCI user */
cdev_decl(pci);
cdev_pci_init(NPCI,pci), /* 72: PCI user */
cdev_pci_init(NPCI,pci), /* 52: PCI user */
cdev_decl(pci);
struct acpi_pci *pci, *ppci;
pci = malloc(sizeof(*pci), M_DEVBUF, M_WAITOK|M_ZERO);
pci->bus = -1;
pci->seg = val;
&pci->bus);
aml_nodename(node), pci->bus);
aml_nodename(node), pci->bus, val);
if (pci->bus == -1)
pci->bus = val;
pci->sub = pci->bus;
node->pci = pci;
aml_nodename(node), pci->bus);
TAILQ_INSERT_TAIL(&acpi_pcirootdevs, pci, next);
if (!node->parent || (ppci = node->parent->pci) == NULL)
pci = malloc(sizeof(*pci), M_DEVBUF, M_WAITOK|M_ZERO);
pci->seg = ppci->seg;
pci->bus = ppci->sub;
pci->dev = ACPI_ADR_PCIDEV(val);
pci->fun = ACPI_ADR_PCIFUN(val);
pci->node = node;
pci->sub = -1;
pci->bus, pci->dev, pci->fun,
pci->_s0w = val;
pci->_s0w = -1;
pci->_s3d = val;
pci->_s3d = -1;
pci->_s3w = val;
pci->_s3w = -1;
pci->_s4d = val;
pci->_s4d = -1;
pci->_s4w = val;
pci->_s4w = -1;
pci->d3cold = acpi_storaged3enable(sc, node);
if (pci->dev > 0x1F || pci->fun > 7) {
free(pci, M_DEVBUF, sizeof(*pci));
pc = pci_lookup_segment(pci->seg, pci->bus);
tag = pci_make_tag(pc, pci->bus, pci->dev, pci->fun);
free(pci, M_DEVBUF, sizeof(*pci));
node->pci = pci;
TAILQ_INSERT_TAIL(&acpi_pcidevs, pci, next);
pci->sub = PPB_BUSINFO_SECONDARY(reg);
aml_nodename(node), pci->sub);
return (node->parent && node->parent->pci) ?
node->parent->pci->sub : -1;
return (node->parent && node->parent->pci) ?
node->parent->pci->sub : -1;
struct acpi_pci *pci;
aic_dev_softc_t pci;
pci = ahd->dev_softc;
if (aic_get_pci_slot(list_pci) == aic_get_pci_slot(pci)
&& aic_get_pci_bus(list_pci) == aic_get_pci_bus(pci)) {
#define aic_get_pci_function(pci) ((pci)->pa_function)
#define aic_get_pci_slot(pci) ((pci)->pa_device)
#define aic_get_pci_bus(pci) ((pci)->pa_bus)
ahc_dev_softc_t pci;
pci = ahc->dev_softc;
if (ahc_get_pci_slot(list_pci) == ahc_get_pci_slot(pci)
&& ahc_get_pci_bus(list_pci) == ahc_get_pci_bus(pci)) {
ahc_pci_read_config(ahc_dev_softc_t pci, int reg, int width)
return (pci_conf_read(pci->pa_pc, pci->pa_tag, reg));
ahc_pci_write_config(ahc_dev_softc_t pci, int reg, uint32_t value, int width)
pci_conf_write(pci->pa_pc, pci->pa_tag, reg, value);
ahc_get_pci_function(ahc_dev_softc_t pci)
return (pci->pa_function);
ahc_get_pci_slot(ahc_dev_softc_t pci)
return (pci->pa_device);
ahc_get_pci_bus(ahc_dev_softc_t pci)
return (pci->pa_bus);
} __packed pci;
MODULE_DEVICE_TABLE(pci, pciidlist);
dev->pdev->pci = (struct pci_softc *)parent->dv_parent;
if (pdev->pci->sc_bridgetag != NULL)
pci_enumerate_bus(pdev->pci, vga_disable_bridge, NULL);
MODULE_DEVICE_TABLE(pci, pciidlist);
struct pci_softc *pci;
MODULE_DEVICE_TABLE(pci, pciidlist);
struct pci_softc *pci;
pci = (struct pci_softc *)dev->dv_parent;
LIST_FOREACH(pd, &pci->sc_devs, pd_next) {
struct pci_softc *pci;
pci = pci_cd.cd_devs[i];
if (pci != NULL && pci->sc_domain == minor(dev) &&
pci->sc_bus == sel->pc_bus)
if (pci->sc_bus >= 256 ||
sel->pc_dev >= pci_bus_maxdevs(pci->sc_pc, pci->sc_bus) ||
pc = pci->sc_pc;
LIST_FOREACH(pd, &pci->sc_devs, pd_next) {
error = bus_space_map(pci->sc_memt, PCI_ROM_ADDR(addr),
bus_space_read_region_1(pci->sc_memt, h, off,
bus_space_unmap(pci->sc_memt, h, PCI_ROM_SIZE(mask));
LIST_FOREACH(pd, &pci->sc_devs, pd_next) {
if (pci != pci_vga_pci) {
pci_route_vga(pci);
pci_vga_pci = pci;
pci.pci_devices[id].pd_bartype[bar_ct] = PCI_BAR_TYPE_IO;
pci.pci_devices[id].pd_barsize[bar_ct] = VM_PCI_IO_BAR_SIZE;
pci.pci_devices[id].pd_bar_ct++;
if (id >= pci.pci_dev_ct)
pci.pci_devices[id].pd_barfunc[bar_ct] = barfn;
pci.pci_devices[id].pd_bar_cookie[bar_ct] = cookie;
if (pci.pci_devices[id].pd_int)
return pci.pci_devices[id].pd_irq;
if (pci.pci_dev_ct >= PCI_CONFIG_MAX_DEV)
if (pci.pci_next_pic_irq >= PCI_MAX_PIC_IRQS && irq_needed)
*id = pci.pci_dev_ct;
pci.pci_devices[*id].pd_vid = vid;
pci.pci_devices[*id].pd_did = pid;
pci.pci_devices[*id].pd_rev = rev_id;
pci.pci_devices[*id].pd_class = class;
pci.pci_devices[*id].pd_subclass = subclass;
pci.pci_devices[*id].pd_subsys_vid = subsys_vid;
pci.pci_devices[*id].pd_subsys_id = subsys_id;
pci.pci_devices[*id].pd_csfunc = csfunc;
pci.pci_devices[*id].pd_irq =
pci_pic_irqs[pci.pci_next_pic_irq];
pci.pci_devices[*id].pd_int = 1;
pci.pci_next_pic_irq++;
pci.pci_devices[*id].pd_irq, *id);
intr_toggle_el(¤t_vm, pci.pci_devices[*id].pd_irq, 1);
pci.pci_dev_ct++;
if (id >= pci.pci_dev_ct)
dev = &pci.pci_devices[id];
memset(&pci, 0, sizeof(pci));
CTASSERT(sizeof(pci.pci_devices[0].pd_cfg_space) <= 256);
pci.pci_next_mmio_bar = PCI_MMIO_BAR_BASE;
pci.pci_next_io_bar = VM_PCI_IO_BAR_BASE;
get_input_data(vei, &pci.pci_addr_reg);
set_return_data(vei, pci.pci_addr_reg);
for (i = 0 ; i < pci.pci_dev_ct; i++) {
for (j = 0 ; j < pci.pci_devices[i].pd_bar_ct; j++) {
b_lo = PCI_MAPREG_IO_ADDR(pci.pci_devices[i].pd_bar[j]);
fn = pci.pci_devices[i].pd_barfunc[j];
cookie = pci.pci_devices[i].pd_bar_cookie[j];
irq = pci.pci_devices[i].pd_irq;
struct pci pci;
if (!(pci.pci_addr_reg & PCI_MODE1_ENABLE)) {
"0x%llx", (uint64_t)pci.pci_addr_reg);
b = (pci.pci_addr_reg >> 16) & 0xff;
d = (pci.pci_addr_reg >> 11) & 0x1f;
f = (pci.pci_addr_reg >> 8) & 0x7;
o = (pci.pci_addr_reg & 0xfc);
if (d >= pci.pci_dev_ct) {
pd = &pci.pci_devices[d];
if (d > pci.pci_dev_ct || b > 0 || f > 0)
for (i = 0; i < pci.pci_dev_ct; i++)
if (pci.pci_devices[i].pd_subsys_id == subsys_id)
if (pci_id >= pci.pci_dev_ct)
return (pci.pci_devices[pci_id].pd_subsys_id);
if (id >= pci.pci_dev_ct)
bar_ct = pci.pci_devices[id].pd_bar_ct;
if (pci.pci_next_mmio_bar >= PCI_MMIO_BAR_END)
pci.pci_devices[id].pd_cfg_space[bar_reg_idx] =
PCI_MAPREG_MEM_ADDR(pci.pci_next_mmio_bar);
pci.pci_next_mmio_bar += VM_PCI_MMIO_BAR_SIZE;
pci.pci_devices[id].pd_barfunc[bar_ct] = barfn;
pci.pci_devices[id].pd_bar_cookie[bar_ct] = cookie;
pci.pci_devices[id].pd_bartype[bar_ct] = PCI_BAR_TYPE_MMIO;
pci.pci_devices[id].pd_barsize[bar_ct] = VM_PCI_MMIO_BAR_SIZE;
pci.pci_devices[id].pd_bar_ct++;
if (pci.pci_next_io_bar >= VM_PCI_IO_BAR_END)
pci.pci_devices[id].pd_cfg_space[bar_reg_idx] =
PCI_MAPREG_IO_ADDR(pci.pci_next_io_bar) |
pci.pci_next_io_bar += VM_PCI_IO_BAR_SIZE;
pci.pci_devices[id].pd_barfunc[bar_ct] = barfn;
pci.pci_devices[id].pd_bar_cookie[bar_ct] = cookie;
if (pci_add_capability(pci_id, &cap.pci) == -1) {
struct pci_cap pci;