sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

766

block_sequence[*num_steps].params.pipe_control_lock_params.dc = dc;

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

767

block_sequence[*num_steps].params.pipe_control_lock_params.lock = true;

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

768

block_sequence[*num_steps].params.pipe_control_lock_params.pipe_ctx = pipe_ctx;

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

883

block_sequence[*num_steps].params.pipe_control_lock_params.dc = dc;

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

884

block_sequence[*num_steps].params.pipe_control_lock_params.lock = false;

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

885

block_sequence[*num_steps].params.pipe_control_lock_params.pipe_ctx = pipe_ctx;

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

940

dc->hwss.pipe_control_lock(params->pipe_control_lock_params.dc,

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

941

params->pipe_control_lock_params.pipe_ctx,

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

942

params->pipe_control_lock_params.lock);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

160

struct pipe_control_lock_params pipe_control_lock_params;