bin/ps/print.c

111

command(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

113

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

154

if (pi->prefix)

bin/ps/print.c

155

left -= mbswprint(pi->prefix, left, 0);

bin/ps/print.c

205

ucomm(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

207

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

212

curwd(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

214

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

226

logname(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

228

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

245

printstate(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

247

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

329

printpledge(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

331

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

351

pri(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

353

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

361

pnice(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

363

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

371

euname(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

373

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

380

runame(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

382

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

389

gname(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

391

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

398

rgname(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

400

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

407

supgid(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

409

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

429

supgrp(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

431

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

451

tdev(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

453

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

471

tname(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

473

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

491

longtname(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

493

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

507

started(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

509

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

543

lstarted(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

545

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

562

elapsed(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

564

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

608

wchan(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

610

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

621

vsize(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

623

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

632

p_rssize(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

634

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

643

cputime(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

645

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

689

pcpu(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

694

(void)printf("%*.1f", v->width, getpcpu(pi->ki));

bin/ps/print.c

713

pmem(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

718

(void)printf("%*.1f", v->width, getpmem(pi->ki));

bin/ps/print.c

722

pagein(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

724

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

733

maxrss(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

735

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

743

tsize(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

745

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

753

dsize(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

755

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

763

ssize(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

765

const struct kinfo_proc *kp = pi->ki;

bin/ps/print.c

824

pvar(const struct pinfo *pi, VARENT *ve)

bin/ps/print.c

826

const struct kinfo_proc *kp = pi->ki;

games/boggle/boggle/bog.c

502

int prevch, previndex, *pi, *qi, st;

games/boggle/boggle/bog.c

545

pi = wordpath;

games/boggle/boggle/bog.c

546

while (pi < qi && *pi != -1)

games/boggle/boggle/bog.c

547

*pi++ = -1;

lib/libc/stdlib/qsort.c

68

TYPE *pi = (TYPE *) (parmi); \

lib/libc/stdlib/qsort.c

71

TYPE t = *pi; \

lib/libc/stdlib/qsort.c

72

*pi++ = *pj; \

lib/libm/src/e_acos.c

44

pi = 3.14159265358979311600e+00, /* 0x400921FB, 0x54442D18 */

lib/libm/src/e_acos.c

70

else return pi+2.0*pio2_lo; /* acos(-1)= pi */

lib/libm/src/e_acos.c

88

return pi - 2.0*(s+w);

lib/libm/src/e_acosf.c

21

pi = 3.1415925026e+00, /* 0x40490fda */

lib/libm/src/e_acosf.c

44

else return pi+(float)2.0*pio2_lo; /* acos(-1)= pi */

lib/libm/src/e_acosf.c

62

return pi - (float)2.0*(s+w);

lib/libm/src/e_acosl.c

44

pi = 3.14159265358979323846264338327950280e+00L;

lib/libm/src/e_acosl.c

69

else return pi+2.0*pio2_lo; /* acos(-1)= pi */

lib/libm/src/e_acosl.c

87

return pi - 2.0*(s+w);

lib/libm/src/e_atan2.c

116

case 2: return pi-(z-pi_lo);/* atan(+,-) */

lib/libm/src/e_atan2.c

118

return (z-pi_lo)-pi;/* atan(-,-) */

lib/libm/src/e_atan2.c

50

pi = 3.1415926535897931160E+00, /* 0x400921FB, 0x54442D18 */

lib/libm/src/e_atan2.c

75

case 2: return pi+tiny;/* atan(+0,-anything) = pi */

lib/libm/src/e_atan2.c

76

case 3: return -pi-tiny;/* atan(-0,-anything) =-pi */

lib/libm/src/e_atan2.c

95

case 2: return pi+tiny ; /* atan(+...,-INF) */

lib/libm/src/e_atan2.c

96

case 3: return -pi-tiny ; /* atan(-...,-INF) */

lib/libm/src/e_atan2f.c

24

pi = 3.1415925026e+00, /* 0x40490fda */

lib/libm/src/e_atan2f.c

48

case 2: return pi+tiny;/* atan(+0,-anything) = pi */

lib/libm/src/e_atan2f.c

49

case 3: return -pi-tiny;/* atan(-0,-anything) =-pi */

lib/libm/src/e_atan2f.c

68

case 2: return pi+tiny ; /* atan(+...,-INF) */

lib/libm/src/e_atan2f.c

69

case 3: return -pi-tiny ; /* atan(-...,-INF) */

lib/libm/src/e_atan2f.c

89

case 2: return pi-(z-pi_lo);/* atan(+,-) */

lib/libm/src/e_atan2f.c

91

return (z-pi_lo)-pi;/* atan(-,-) */

lib/libm/src/e_atan2l.c

111

case 2: return pi+tiny;/* atan(+0,-anything) = pi */

lib/libm/src/e_atan2l.c

112

case 3: return -pi-tiny;/* atan(-0,-anything) =-pi */

lib/libm/src/e_atan2l.c

139

case 2: return pi+tiny ; /* atan(+...,-INF) */

lib/libm/src/e_atan2l.c

140

case 3: return -pi-tiny ; /* atan(-...,-INF) */

lib/libm/src/e_atan2l.c

159

case 2: return pi-(z-pi_lo);/* atan(+,-) */

lib/libm/src/e_atan2l.c

161

return (z-pi_lo)-pi;/* atan(-,-) */

lib/libm/src/e_atan2l.c

48

pi = 3.14159265358979323846264338327950280e+00L;

lib/libm/src/e_lgamma_r.c

162

if(ix<0x3fd00000) return __kernel_sin(pi*x,zero,0);

lib/libm/src/e_lgamma_r.c

186

case 0: y = __kernel_sin(pi*y,zero,0); break;

lib/libm/src/e_lgamma_r.c

188

case 2: y = __kernel_cos(pi*(0.5-y),zero); break;

lib/libm/src/e_lgamma_r.c

190

case 4: y = __kernel_sin(pi*(one-y),zero,0); break;

lib/libm/src/e_lgamma_r.c

192

case 6: y = -__kernel_cos(pi*(y-1.5),zero); break;

lib/libm/src/e_lgamma_r.c

193

default: y = __kernel_sin(pi*(y-2.0),zero,0); break;

lib/libm/src/e_lgamma_r.c

227

nadj = log(pi/fabs(t*x));

lib/libm/src/e_lgamma_r.c

87

pi = 3.14159265358979311600e+00, /* 0x400921FB, 0x54442D18 */

lib/libm/src/e_lgammaf_r.c

122

case 0: y = __kernel_sinf(pi*y,zero,0); break;

lib/libm/src/e_lgammaf_r.c

124

case 2: y = __kernel_cosf(pi*((float)0.5-y),zero); break;

lib/libm/src/e_lgammaf_r.c

126

case 4: y = __kernel_sinf(pi*(one-y),zero,0); break;

lib/libm/src/e_lgammaf_r.c

128

case 6: y = -__kernel_cosf(pi*(y-(float)1.5),zero); break;

lib/libm/src/e_lgammaf_r.c

129

default: y = __kernel_sinf(pi*(y-(float)2.0),zero,0); break;

lib/libm/src/e_lgammaf_r.c

163

nadj = logf(pi/fabsf(t*x));

lib/libm/src/e_lgammaf_r.c

23

pi = 3.1415927410e+00, /* 0x40490fdb */

lib/libm/src/e_lgammaf_r.c

98

if(ix<0x3e800000) return __kernel_sinf(pi*x,zero,0);

lib/libm/src/ld80/e_lgammal.c

212

return sinl (pi * x);

lib/libm/src/ld80/e_lgammal.c

246

y = sinl (pi * y);

lib/libm/src/ld80/e_lgammal.c

250

y = cosl (pi * (half - y));

lib/libm/src/ld80/e_lgammal.c

254

y = sinl (pi * (one - y));

lib/libm/src/ld80/e_lgammal.c

258

y = -cosl (pi * (y - 1.5));

lib/libm/src/ld80/e_lgammal.c

261

y = sinl (pi * (y - 2.0));

lib/libm/src/ld80/e_lgammal.c

307

nadj = logl (pi / fabsl (t * x));

lib/libm/src/ld80/e_lgammal.c

96

pi = 3.14159265358979323846264L,

lib/libossaudio/ossaudio.c

104

for (pi = &controls; (i = *pi) != NULL; pi = &i->next) {

lib/libossaudio/ossaudio.c

106

*pi = i->next;

lib/libossaudio/ossaudio.c

95

struct control *i, **pi;

regress/lib/libm/msun/invctrig_test.c

121

pi = 3.14159265358979323846264338327950280L,

regress/lib/libm/msun/invctrig_test.c

131

testall_tol(cacosh, zero, CMPLXL(0.0, pi / 2), 1);

regress/lib/libm/msun/invctrig_test.c

132

testall_tol(cacosh, -zero, CMPLXL(0.0, -pi / 2), 1);

regress/lib/libm/msun/invctrig_test.c

133

testall_tol(cacos, zero, CMPLXL(pi / 2, -0.0), 1);

regress/lib/libm/msun/invctrig_test.c

134

testall_tol(cacos, -zero, CMPLXL(pi / 2, 0.0), 1);

regress/lib/libm/msun/invctrig_test.c

194

testall_tol(catanh, z, CMPLXL(0.0, pi / 2), 1);

regress/lib/libm/msun/invctrig_test.c

205

testall_odd_tol(catan, z, CMPLXL(pi / 2, 0.0), 1);

regress/lib/libm/msun/invctrig_test.c

210

testall_even_tol(cacos, z, CMPLXL(pi / 2, NAN), 1);

regress/lib/libm/msun/invctrig_test.c

239

testall_tol(cacosh, z, CMPLXL(INFINITY, pi / 4), 1);

regress/lib/libm/msun/invctrig_test.c

241

testall_tol(cacos, z, CMPLXL(pi / 4, -INFINITY), 1);

regress/lib/libm/msun/invctrig_test.c

243

testall_odd_tol(casinh, z, CMPLXL(INFINITY, pi / 4), 1);

regress/lib/libm/msun/invctrig_test.c

244

testall_odd_tol(casin, z, CMPLXL(pi / 4, INFINITY), 1);

regress/lib/libm/msun/invctrig_test.c

245

testall_odd_tol(catanh, z, CMPLXL(0, pi / 2), 1);

regress/lib/libm/msun/invctrig_test.c

246

testall_odd_tol(catan, z, CMPLXL(pi / 2, 0), 1);

regress/lib/libm/msun/invctrig_test.c

251

testall_tol(cacosh, -z, CMPLXL(INFINITY, -pi), 1);

regress/lib/libm/msun/invctrig_test.c

253

testall_tol(cacos, -z, CMPLXL(pi, INFINITY), 1);

regress/lib/libm/msun/invctrig_test.c

255

testall_odd_tol(casin, z, CMPLXL(pi / 2, INFINITY), 1);

regress/lib/libm/msun/invctrig_test.c

256

testall_odd_tol(catanh, z, CMPLXL(0, pi / 2), 1);

regress/lib/libm/msun/invctrig_test.c

257

testall_odd_tol(catan, z, CMPLXL(pi / 2, 0), 1);

regress/lib/libm/msun/invctrig_test.c

260

testall_tol(cacosh, z, CMPLXL(INFINITY, pi / 2), 1);

regress/lib/libm/msun/invctrig_test.c

261

testall_tol(cacosh, -z, CMPLXL(INFINITY, -pi / 2), 1);

regress/lib/libm/msun/invctrig_test.c

262

testall_tol(cacos, z, CMPLXL(pi / 2, -INFINITY), 1);

regress/lib/libm/msun/invctrig_test.c

263

testall_tol(cacos, -z, CMPLXL(pi / 2, INFINITY), 1);

regress/lib/libm/msun/invctrig_test.c

264

testall_odd_tol(casinh, z, CMPLXL(INFINITY, pi / 2), 1);

regress/lib/libm/msun/invctrig_test.c

267

testall_odd_tol(catanh, z, CMPLXL(0, pi / 2), 1);

regress/lib/libm/msun/invctrig_test.c

268

testall_odd_tol(catan, z, CMPLXL(pi / 2, 0), 1);

regress/lib/libm/msun/invctrig_test.c

292

(nums[i] < 0) ? pi : 0), 1);

regress/lib/libm/msun/invctrig_test.c

294

CMPLXL((nums[i] < 0) ? pi : 0,

regress/lib/libm/msun/invctrig_test.c

297

CMPLXL(copysign(pi / 2, nums[i]),

regress/lib/libm/msun/invctrig_test.c

300

CMPLXL(atanh(1 / nums[i]), pi / 2), 1);

regress/lib/libm/msun/invctrig_test.c

324

acos_z = CMPLXL(pi / 4, -0.34657359027997265470861606072908828L);

regress/lib/libm/msun/invctrig_test.c

325

asin_z = CMPLXL(pi / 4, 0.34657359027997265470861606072908828L);

regress/lib/libm/msun/invtrig_test.c

115

pi = 3.14159265358979323846264338327950280e+00L,

regress/lib/libm/msun/invtrig_test.c

132

testall(acos, 0.0, pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

135

testall(acos, -0.0, pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

140

testall(atan, INFINITY, pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

143

testall(atan, -INFINITY, -pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

160

testall2(atan2, 0.0, -0.0, pi, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

161

testall2(atan2, -0.0, -0.0, -pi, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

167

testall2(atan2, INFINITY, INFINITY, pi / 4, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

168

testall2(atan2, -INFINITY, INFINITY, -pi / 4, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

175

test2(atan2f, 0.0, ldexpf(-z, e), (float)pi, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

176

test2(atan2f, -0.0, ldexpf(-z, e), (float)-pi, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

177

test2(atan2f, ldexpf(z, e), 0.0, (float)pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

178

test2(atan2f, ldexpf(z, e), -0.0, (float)pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

179

test2(atan2f, ldexpf(-z, e), 0.0, (float)-pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

180

test2(atan2f, ldexpf(-z, e), -0.0, (float)-pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

185

test2(atan2, 0.0, ldexp(-z, e), (double)pi, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

186

test2(atan2, -0.0, ldexp(-z, e), (double)-pi, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

187

test2(atan2, ldexp(z, e), 0.0, (double)pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

188

test2(atan2, ldexp(z, e), -0.0, (double)pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

189

test2(atan2, ldexp(-z, e), 0.0, (double)-pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

190

test2(atan2, ldexp(-z, e), -0.0, (double)-pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

195

test2(atan2l, 0.0, ldexpl(-z, e), pi, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

196

test2(atan2l, -0.0, ldexpl(-z, e), -pi, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

197

test2(atan2l, ldexpl(z, e), 0.0, pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

198

test2(atan2l, ldexpl(z, e), -0.0, pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

199

test2(atan2l, ldexpl(-z, e), 0.0, -pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

200

test2(atan2l, ldexpl(-z, e), -0.0, -pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

207

test2(atan2f, ldexpf(z, e), -INFINITY, (float)pi, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

208

test2(atan2f, ldexpf(-z,e), -INFINITY, (float)-pi, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

209

test2(atan2f, INFINITY, ldexpf(z,e), (float)pi/2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

210

test2(atan2f, INFINITY, ldexpf(-z,e), (float)pi/2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

211

test2(atan2f, -INFINITY, ldexpf(z,e), (float)-pi/2,FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

212

test2(atan2f, -INFINITY, ldexpf(-z,e),(float)-pi/2,FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

217

test2(atan2, ldexp(z, e), -INFINITY, (double)pi, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

218

test2(atan2, ldexp(-z,e), -INFINITY, (double)-pi, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

219

test2(atan2, INFINITY, ldexp(z,e), (double)pi/2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

220

test2(atan2, INFINITY, ldexp(-z,e), (double)pi/2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

221

test2(atan2, -INFINITY, ldexp(z,e), (double)-pi/2,FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

222

test2(atan2, -INFINITY, ldexp(-z,e),(double)-pi/2,FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

227

test2(atan2l, ldexpl(z, e), -INFINITY, pi, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

228

test2(atan2l, ldexpl(-z,e), -INFINITY, -pi, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

229

test2(atan2l, INFINITY, ldexpl(z, e), pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

230

test2(atan2l, INFINITY, ldexpl(-z, e), pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

231

test2(atan2l, -INFINITY, ldexpl(z, e), -pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

232

test2(atan2l, -INFINITY, ldexpl(-z, e), -pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

245

testall(asin, 1.0, pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

247

testall(atan, 1.0, pi / 4, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

248

testall(asin, -1.0, -pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

249

testall(acos, -1.0, pi, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

250

testall(atan, -1.0, -pi / 4, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

258

testall_tol(asin, sqrtl(2) / 2, pi / 4, 1, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

259

testall_tol(acos, sqrtl(2) / 2, pi / 4, 1, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

260

testall_tol(asin, -sqrtl(2) / 2, -pi / 4, 1, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

270

testall_tol(atan, sqrt2m1, pi / 8, 1, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

271

testall_tol(atan, -sqrt2m1, -pi / 8, 1, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

282

testall2(atan2, 1.0, 1.0, pi / 4, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

284

testall2(atan2, -1.0, 1.0, -pi / 4, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

287

testall2_tol(atan2, sqrt2m1 * 2, 2.0, pi / 8, 1, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

289

testall2_tol(atan2, -sqrt2m1 * 2, 2.0, -pi / 8, 1, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

307

testall(acos, tiny, pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

311

testall(acos, -tiny, pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

323

test2(atan2f, 0x1.0p-100, -0x1.0p100, (float)pi, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

324

test2(atan2, 0x1.0p-1000, -0x1.0p1000, (double)pi, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

326

-ldexpl(1.0, LDBL_MAX_EXP - 100), pi, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

327

test2(atan2f, -0x1.0p-100, -0x1.0p100, (float)-pi, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

328

test2(atan2, -0x1.0p-1000, -0x1.0p1000, (double)-pi, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

330

-ldexpl(1.0, LDBL_MAX_EXP - 100), -pi, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

341

testall(atan, huge, pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

342

testall(atan, -huge, -pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

345

test2(atan2f, 0x1.0p100, 0x1.0p-100, (float)pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

346

test2(atan2, 0x1.0p1000, 0x1.0p-1000, (double)pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

348

ldexpl(1.0, 100 - LDBL_MAX_EXP), pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

349

test2(atan2f, -0x1.0p100, 0x1.0p-100, (float)-pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

350

test2(atan2, -0x1.0p1000, 0x1.0p-1000, (double)-pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

352

ldexpl(1.0, 100 - LDBL_MAX_EXP), -pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

354

test2(atan2f, 0x1.0p100, -0x1.0p-100, (float)pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

355

test2(atan2, 0x1.0p1000, -0x1.0p-1000, (double)pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

357

-ldexpl(1.0, 100 - LDBL_MAX_EXP), pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

358

test2(atan2f, -0x1.0p100, -0x1.0p-100, (float)-pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

359

test2(atan2, -0x1.0p1000, -0x1.0p-1000, (double)-pi / 2, FE_INEXACT);

regress/lib/libm/msun/invtrig_test.c

361

-ldexpl(1.0, 100 - LDBL_MAX_EXP), -pi / 2, FE_INEXACT);

sbin/pfctl/pfctl.c

2597

struct pfioc_iface pi;

sbin/pfctl/pfctl.c

2599

memset(&pi, 0, sizeof(pi));

sbin/pfctl/pfctl.c

2600

if (ifname && strlcpy(pi.pfiio_name, ifname,

sbin/pfctl/pfctl.c

2601

sizeof(pi.pfiio_name)) >= sizeof(pi.pfiio_name)) {

sbin/pfctl/pfctl.c

2605

if (ioctl(pf->dev, DIOCSETSTATUSIF, &pi) == -1) {

sbin/pfctl/pfctl.c

2692

struct pfioc_iface pi;

sbin/pfctl/pfctl.c

2694

bzero(&pi, sizeof(pi));

sbin/pfctl/pfctl.c

2696

pi.pfiio_flags = flags;

sbin/pfctl/pfctl.c

2698

if (strlcpy(pi.pfiio_name, ifname, sizeof(pi.pfiio_name)) >=

sbin/pfctl/pfctl.c

2699

sizeof(pi.pfiio_name))

sbin/pfctl/pfctl.c

2704

if (ioctl(pf->dev, DIOCCLRIFFLAG, &pi) == -1)

sbin/pfctl/pfctl.c

2707

if (ioctl(pf->dev, DIOCSETIFFLAG, &pi) == -1)

sbin/pfctl/pfctl.c

399

struct pfioc_iface pi;

sbin/pfctl/pfctl.c

401

memset(&pi, 0, sizeof(pi));

sbin/pfctl/pfctl.c

402

if (iface != NULL && strlcpy(pi.pfiio_name, iface,

sbin/pfctl/pfctl.c

403

sizeof(pi.pfiio_name)) >= sizeof(pi.pfiio_name))

sbin/pfctl/pfctl.c

406

if (ioctl(dev, DIOCCLRSTATUS, &pi) == -1)

sbin/pfctl/pfctl.c

419

struct pfioc_iface pi;

sbin/pfctl/pfctl.c

422

bzero(&pi, sizeof(pi));

sbin/pfctl/pfctl.c

423

pi.pfiio_flags = PFI_IFLAG_SKIP;

sbin/pfctl/pfctl.c

425

if (ioctl(dev, DIOCCLRIFFLAG, &pi) == -1)

sbin/slaacd/frontend.c

1004

struct in6_pktinfo *pi;

sbin/slaacd/frontend.c

1026

pi = (struct in6_pktinfo *)CMSG_DATA(cm);

sbin/slaacd/frontend.c

1027

pi->ipi6_ifindex = if_index;

sbin/slaacd/frontend.c

135

struct in6_pktinfo *pi;

sbin/slaacd/frontend.c

229

pi = (struct in6_pktinfo *)CMSG_DATA(cm);

sbin/slaacd/frontend.c

230

memset(&pi->ipi6_addr, 0, sizeof(pi->ipi6_addr));

sbin/slaacd/frontend.c

231

pi->ipi6_ifindex = 0;

sbin/slaacd/frontend.c

931

struct in6_pktinfo *pi = NULL;

sbin/slaacd/frontend.c

959

pi = (struct in6_pktinfo *)(CMSG_DATA(cm));

sbin/slaacd/frontend.c

960

if_index = pi->ipi6_ifindex;

sbin/unwind/libunbound/services/listen_dnsport.c

5136

struct ngtcp2_pkt_info pi;

sbin/unwind/libunbound/services/listen_dnsport.c

5163

&pi, sldns_buffer_begin(c->doq_socket->pkt_buf),

sbin/unwind/libunbound/services/listen_dnsport.c

5191

conn->close_ecn = pi.ecn;

sbin/unwind/libunbound/services/listen_dnsport.c

5247

struct doq_conn* conn, struct ngtcp2_pkt_info* pi, int* err_retry,

sbin/unwind/libunbound/services/listen_dnsport.c

5260

ret = ngtcp2_conn_read_pkt(conn->conn, &path, pi,

sbin/unwind/libunbound/services/listen_dnsport.c

5357

ngtcp2_pkt_info pi;

sbin/unwind/libunbound/services/listen_dnsport.c

5400

ret = ngtcp2_conn_writev_stream(conn->conn, &ps.path, &pi,

sbin/unwind/libunbound/services/listen_dnsport.c

5480

doq_send_pkt(c, &conn->key.paddr, pi.ecn);

sbin/unwind/libunbound/services/listen_dnsport.h

766

struct doq_conn* conn, struct ngtcp2_pkt_info* pi, int* err_retry,

sbin/unwind/libunbound/services/outside_network.c

1027

&pend_tcp->pi->addr, comm_tcp, NULL, w->sq->zone,

sbin/unwind/libunbound/services/outside_network.c

215

struct port_if* pi = NULL;

sbin/unwind/libunbound/services/outside_network.c

217

pend->pi = NULL;

sbin/unwind/libunbound/services/outside_network.c

232

pi = &w->outnet->ip6_ifs[ub_random_max(w->outnet->rnd, num)];

sbin/unwind/libunbound/services/outside_network.c

235

pi = &w->outnet->ip4_ifs[ub_random_max(w->outnet->rnd, num)];

sbin/unwind/libunbound/services/outside_network.c

236

log_assert(pi);

sbin/unwind/libunbound/services/outside_network.c

237

pend->pi = pi;

sbin/unwind/libunbound/services/outside_network.c

238

if(addr_is_any(&pi->addr, pi->addrlen)) {

sbin/unwind/libunbound/services/outside_network.c

243

if(addr_is_ip6(&pi->addr, pi->addrlen))

sbin/unwind/libunbound/services/outside_network.c

244

((struct sockaddr_in6*)&pi->addr)->sin6_port = 0;

sbin/unwind/libunbound/services/outside_network.c

245

else ((struct sockaddr_in*)&pi->addr)->sin_port = 0;

sbin/unwind/libunbound/services/outside_network.c

246

if(bind(s, (struct sockaddr*)&pi->addr, pi->addrlen) != 0) {

sbin/unwind/libunbound/services/outside_network.c

2546

&pend->pi->addr, comm_tcp, NULL, sq->zone,

sbin/unwind/libunbound/services/outside_network.c

258

log_addr(VERB_ALGO, "tcp bound to src", &pi->addr, pi->addrlen);

sbin/unwind/libunbound/services/outside_network.c

3096

struct port_if* pi = NULL;

sbin/unwind/libunbound/services/outside_network.c

3099

pi = pend_tcp->pi;

sbin/unwind/libunbound/services/outside_network.c

3113

if(error==NETEVENT_NOERROR && pi && sq->outnet->dtenv &&

sbin/unwind/libunbound/services/outside_network.c

3117

log_addr(VERB_ALGO, "to local addr", &pi->addr, pi->addrlen);

sbin/unwind/libunbound/services/outside_network.c

3119

&pi->addr, c->type, c->ssl, sq->zone, sq->zonelen, sq->qbuf,

sbin/unwind/libunbound/services/outside_network.h

354

struct port_if* pi;

sbin/unwind/libunbound/util/netevent.c

1566

struct ngtcp2_pkt_info* pi)

sbin/unwind/libunbound/util/netevent.c

1603

pi->ecn = msghdr_get_ecn(&msg, paddr->addr.sockaddr.in.sin_family);

sbin/unwind/libunbound/util/netevent.c

2126

struct doq_conn** conn, struct ngtcp2_pkt_info* pi)

sbin/unwind/libunbound/util/netevent.c

2158

if(!doq_conn_recv(c, paddr, *conn, pi, &err_retry, NULL)) {

sbin/unwind/libunbound/util/netevent.c

2526

struct ngtcp2_pkt_info pi;

sbin/unwind/libunbound/util/netevent.c

2623

if(!doq_recv(c, &paddr, &pkt_continue, &pi)) {

sbin/unwind/libunbound/util/netevent.c

2645

(int)pi.ecn);

sbin/unwind/libunbound/util/netevent.c

2655

if(!doq_accept(c, &paddr, &conn, &pi))

sbin/unwind/libunbound/util/netevent.c

2688

if(!doq_conn_recv(c, &paddr, conn, &pi, NULL, &err_drop)) {

sys/arch/loongson/stand/boot/dev.c

108

struct pmon_iodata *pi;

sys/arch/loongson/stand/boot/dev.c

113

pi = alloc(sizeof *pi);

sys/arch/loongson/stand/boot/dev.c

114

if (pi == NULL)

sys/arch/loongson/stand/boot/dev.c

116

bzero(pi, sizeof *pi);

sys/arch/loongson/stand/boot/dev.c

117

f->f_devdata = pi;

sys/arch/loongson/stand/boot/dev.c

134

pi->fd = rc;

sys/arch/loongson/stand/boot/dev.c

140

if (pmon_getdisklabel(pi) != 0) {

sys/arch/loongson/stand/boot/dev.c

145

if (part >= pi->label.d_npartitions) {

sys/arch/loongson/stand/boot/dev.c

150

if (memcmp(pi->label.d_uid, zero, sizeof(pi->label.d_uid)) != 0) {

sys/arch/loongson/stand/boot/dev.c

151

const u_char *duid = pi->label.d_uid;

sys/arch/loongson/stand/boot/dev.c

159

pi->partoff = DL_GETPOFFSET(&pi->label.d_partitions[part]);

sys/arch/loongson/stand/boot/dev.c

160

pi->curpos = 0;

sys/arch/loongson/stand/boot/dev.c

168

struct pmon_iodata *pi;

sys/arch/loongson/stand/boot/dev.c

172

pi = (struct pmon_iodata *)f->f_devdata;

sys/arch/loongson/stand/boot/dev.c

173

rc = pmon_close(pi->fd);

sys/arch/loongson/stand/boot/dev.c

174

free(pi, sizeof *pi);

sys/arch/loongson/stand/boot/dev.c

186

pmon_getdisklabel(struct pmon_iodata *pi)

sys/arch/loongson/stand/boot/dev.c

191

struct disklabel *lp = &pi->label;

sys/arch/loongson/stand/boot/dev.c

200

if (pmon_iostrategy(pi, F_READ, DOSBBSECTOR, DEV_BSIZE, buf, &rsize))

sys/arch/loongson/stand/boot/dev.c

220

if (pmon_iostrategy(pi, F_READ, sector + DOS_LABELSECTOR, DEV_BSIZE,

sys/arch/loongson/stand/boot/dev.c

66

int pmon_getdisklabel(struct pmon_iodata *pi);

sys/arch/loongson/stand/boot/dev.c

72

struct pmon_iodata *pi = (struct pmon_iodata *)f;

sys/arch/loongson/stand/boot/dev.c

84

offs = ((daddr_t)dblk + pi->partoff) * DEV_BSIZE;

sys/arch/loongson/stand/boot/dev.c

85

if (offs != pi->curpos) {

sys/arch/loongson/stand/boot/dev.c

86

pos = pmon_lseek(pi->fd, offs, 0 /* SEEK_SET */);

sys/arch/loongson/stand/boot/dev.c

92

rc = pmon_read(pi->fd, buf, size);

sys/arch/loongson/stand/boot/dev.c

94

pi->curpos += rc;

sys/arch/octeon/dev/cn30xxpowvar.h

72

#define _POW_GROUP_RD8(sc, pi, off) \

sys/arch/octeon/dev/cn30xxpowvar.h

74

(off) + sizeof(uint64_t) * (pi)->pi_group)

sys/arch/octeon/dev/cn30xxpowvar.h

75

#define _POW_GROUP_WR8(sc, pi, off, v) \

sys/arch/octeon/dev/cn30xxpowvar.h

77

(off) + sizeof(uint64_t) * (pi)->pi_group, (v))

sys/arch/octeon/dev/octpcie.c

285

int pi;

sys/arch/octeon/dev/octpcie.c

331

for (pi = 0; pi < cfg->cfg_nports; pi++) {

sys/arch/octeon/dev/octpcie.c

332

port = &sc->sc_ports[pi];

sys/arch/octeon/dev/octpcie.c

334

port->port_index = pi;

sys/arch/sparc64/dev/vdsp.c

913

struct partinfo pi;

sys/arch/sparc64/dev/vdsp.c

932

DIOCGPART, (caddr_t)&pi, FREAD, curproc);

sys/arch/sparc64/dev/vdsp.c

935

sc->sc_vdisk_block_size = pi.disklab->d_secsize;

sys/arch/sparc64/dev/vdsp.c

936

sc->sc_vdisk_size = DL_GETPSIZE(pi.part);

sys/dev/acpi/acpi.c

2011

union amlpci_t pi;

sys/dev/acpi/acpi.c

2033

aml_rdpciaddr(node->parent->parent, &pi);

sys/dev/acpi/acpi.c

2034

ide->addr = pi.addr;

sys/dev/acpi/acpi.c

2038

aml_rdpciaddr(node->parent->parent->parent, &pi);

sys/dev/acpi/acpi.c

2039

ide->addr = pi.addr;

sys/dev/acpi/acpi.c

3440

acpi_apminfo(struct apm_power_info *pi)

sys/dev/acpi/acpi.c

3450

pi->ac_state = APM_AC_UNKNOWN;

sys/dev/acpi/acpi.c

3454

pi->ac_state = APM_AC_ON;

sys/dev/acpi/acpi.c

3456

if (pi->ac_state == APM_AC_UNKNOWN)

sys/dev/acpi/acpi.c

3457

pi->ac_state = APM_AC_OFF;

sys/dev/acpi/acpi.c

3461

pi->battery_state = APM_BATT_UNKNOWN;

sys/dev/acpi/acpi.c

3462

pi->battery_life = 0;

sys/dev/acpi/acpi.c

3463

pi->minutes_left = 0;

sys/dev/acpi/acpi.c

3482

pi->battery_state = APM_BATT_CHARGING;

sys/dev/acpi/acpi.c

3513

pi->battery_state = APM_BATTERY_ABSENT;

sys/dev/acpi/acpi.c

3514

pi->battery_life = 0;

sys/dev/acpi/acpi.c

3515

pi->minutes_left = (unsigned int)-1;

sys/dev/acpi/acpi.c

3520

pi->minutes_left = (unsigned int)-1;

sys/dev/acpi/acpi.c

3521

else if (pi->battery_state == APM_BATT_CHARGING)

sys/dev/acpi/acpi.c

3522

pi->minutes_left = 60 * (capacity - remaining) / rate;

sys/dev/acpi/acpi.c

3524

pi->minutes_left = 60 * minutes / rate;

sys/dev/acpi/acpi.c

3526

pi->battery_life = remaining * 100 / capacity;

sys/dev/acpi/acpi.c

3528

if (pi->battery_state == APM_BATT_CHARGING)

sys/dev/acpi/acpi.c

3532

if (pi->battery_life > 50)

sys/dev/acpi/acpi.c

3533

pi->battery_state = APM_BATT_HIGH;

sys/dev/acpi/acpi.c

3534

else if (pi->battery_life > 25)

sys/dev/acpi/acpi.c

3535

pi->battery_state = APM_BATT_LOW;

sys/dev/acpi/acpi.c

3537

pi->battery_state = APM_BATT_CRITICAL;

sys/dev/acpi/acpi_apm.c

112

struct apm_power_info *pi = (struct apm_power_info *)data;

sys/dev/acpi/acpi_apm.c

153

error = acpi_apminfo(pi);

sys/dev/acpi/dsdt.c

2486

union amlpci_t pi;

sys/dev/acpi/dsdt.c

2513

pi.addr = (rgn->v_opregion.iobase + (bpos >> 3)) & ~(sz - 1);

sys/dev/acpi/dsdt.c

2519

aml_rdpciaddr(rgn->node->parent, &pi);

sys/dev/acpi/dsdt.c

2562

acpi_genio(acpi_softc, ACPI_IOREAD, type, pi.addr,

sys/dev/acpi/dsdt.c

2569

acpi_genio(acpi_softc, ACPI_IOREAD, type, pi.addr,

sys/dev/acpi/dsdt.c

2576

acpi_genio(acpi_softc, ACPI_IOWRITE, type, pi.addr,

sys/dev/fdt/ahci_fdt.c

68

uint32_t pi;

sys/dev/fdt/ahci_fdt.c

93

pi = OF_getpropint(faa->fa_node, "ports-implemented", 0x0);

sys/dev/fdt/ahci_fdt.c

94

if (pi != 0)

sys/dev/fdt/ahci_fdt.c

95

bus_space_write_4(sc->sc_iot, sc->sc_ioh, AHCI_REG_PI, pi);

sys/dev/ic/aac.c

1594

u_int32_t pi, ci;

sys/dev/ic/aac.c

1603

pi = sc->aac_queues->qt_qindex[queue][AAC_PRODUCER_INDEX];

sys/dev/ic/aac.c

1607

if (pi >= aac_qinfo[queue].size)

sys/dev/ic/aac.c

1608

pi = 0;

sys/dev/ic/aac.c

1611

if ((pi + 1) == ci) {

sys/dev/ic/aac.c

1617

(sc->aac_qentries[queue] + pi)->aq_fib_size = fib_size;

sys/dev/ic/aac.c

1618

(sc->aac_qentries[queue] + pi)->aq_fib_addr = fib_addr;

sys/dev/ic/aac.c

1621

sc->aac_queues->qt_qindex[queue][AAC_PRODUCER_INDEX] = pi + 1;

sys/dev/ic/aac.c

1647

u_int32_t pi, ci;

sys/dev/ic/aac.c

1653

pi = sc->aac_queues->qt_qindex[queue][AAC_PRODUCER_INDEX];

sys/dev/ic/aac.c

1657

if (ci == pi) {

sys/dev/ic/aac.c

1663

if (pi >= aac_qinfo[queue].size)

sys/dev/ic/aac.c

1664

pi = 0;

sys/dev/ic/aac.c

1667

if (ci == pi + 1)

sys/dev/ic/aac.c

1741

u_int32_t pi, ci;

sys/dev/ic/aac.c

1752

pi = sc->aac_queues->qt_qindex[queue][AAC_PRODUCER_INDEX];

sys/dev/ic/aac.c

1756

if (pi >= aac_qinfo[queue].size)

sys/dev/ic/aac.c

1757

pi = 0;

sys/dev/ic/aac.c

1760

if ((pi + 1) == ci) {

sys/dev/ic/aac.c

1766

(sc->aac_qentries[queue] + pi)->aq_fib_size = fib_size;

sys/dev/ic/aac.c

1767

(sc->aac_qentries[queue] + pi)->aq_fib_addr = fib_addr;

sys/dev/ic/aac.c

1770

sc->aac_queues->qt_qindex[queue][AAC_PRODUCER_INDEX] = pi + 1;

sys/dev/ic/ahci.c

181

u_int32_t pi;

sys/dev/ic/ahci.c

223

pi = ahci_read(sc, AHCI_REG_PI);

sys/dev/ic/ahci.c

225

DEVNAME(sc), pi);

sys/dev/ic/ahci.c

240

if (pi & sc->sc_ccc_mask) {

sys/dev/ic/ahci.c

244

DEVNAME(sc), pi, sc->sc_ccc_mask);

sys/dev/ic/ahci.c

250

sc->sc_ccc_ports = pi;

sys/dev/ic/ahci.c

270

if (!ISSET(pi, 1U << i)) {

sys/dev/ic/ahci.c

403

u_int32_t reg, cap, pi;

sys/dev/ic/ahci.c

413

pi = ahci_read(sc, AHCI_REG_PI);

sys/dev/ic/ahci.c

430

ahci_write(sc, AHCI_REG_PI, pi);

sys/dev/ic/ami.c

378

struct ami_fc_prodinfo *pi;

sys/dev/ic/ami.c

416

pi = AMIMEM_KVA(am);

sys/dev/ic/ami.c

430

bcopy (pi->api_fwver, sc->sc_fwver, 16);

sys/dev/ic/ami.c

432

bcopy (pi->api_biosver, sc->sc_biosver, 16);

sys/dev/ic/ami.c

434

sc->sc_channels = pi->api_channels;

sys/dev/ic/ami.c

435

sc->sc_targets = pi->api_fcloops;

sys/dev/ic/ami.c

436

sc->sc_memory = letoh16(pi->api_ramsize);

sys/dev/ic/ami.c

437

sc->sc_maxcmds = pi->api_maxcmd;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1000

pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1004

pi->vce_interval = 1;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1007

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1009

(u8 *)&pi->vce_interval,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1011

pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1016

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1018

(u8 *)&pi->vce_level,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1020

pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1027

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1037

pi->samu_level_count = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1039

if (pi->high_voltage_t &&

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1040

pi->high_voltage_t < table->entries[i].v)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1043

pi->samu_level[i].Frequency = cpu_to_be32(table->entries[i].clk);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1044

pi->samu_level[i].MinVoltage = cpu_to_be16(table->entries[i].v);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1046

pi->samu_level[i].ClkBypassCntl =

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1053

pi->samu_level[i].Divider = (u8)dividers.post_div;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1055

pi->samu_level_count++;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1059

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1061

(u8 *)&pi->samu_level_count,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1063

pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1067

pi->samu_interval = 1;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1070

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1072

(u8 *)&pi->samu_interval,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1074

pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1079

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1081

(u8 *)&pi->samu_level,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1083

pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1093

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1103

pi->acp_level_count = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1105

pi->acp_level[i].Frequency = cpu_to_be32(table->entries[i].clk);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1106

pi->acp_level[i].MinVoltage = cpu_to_be16(table->entries[i].v);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1112

pi->acp_level[i].Divider = (u8)dividers.post_div;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1114

pi->acp_level_count++;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1118

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1120

(u8 *)&pi->acp_level_count,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1122

pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1126

pi->acp_interval = 1;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1129

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1131

(u8 *)&pi->acp_interval,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1133

pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1138

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1140

(u8 *)&pi->acp_level,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1142

pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1151

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1157

for (i = 0; i < pi->graphics_dpm_level_count; i++) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1158

if (pi->caps_enable_dfs_bypass) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1160

pi->graphics_level[i].ClkBypassCntl = 3;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1162

pi->graphics_level[i].ClkBypassCntl = 2;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1164

pi->graphics_level[i].ClkBypassCntl = 7;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1166

pi->graphics_level[i].ClkBypassCntl = 6;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1168

pi->graphics_level[i].ClkBypassCntl = 8;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1170

pi->graphics_level[i].ClkBypassCntl = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1172

pi->graphics_level[i].ClkBypassCntl = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1177

&pi->sys_info.sclk_voltage_mapping_table;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1178

for (i = 0; i < pi->graphics_dpm_level_count; i++) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1179

if (pi->caps_enable_dfs_bypass) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1181

pi->graphics_level[i].ClkBypassCntl = 3;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1183

pi->graphics_level[i].ClkBypassCntl = 2;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1185

pi->graphics_level[i].ClkBypassCntl = 7;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1187

pi->graphics_level[i].ClkBypassCntl = 6;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1189

pi->graphics_level[i].ClkBypassCntl = 8;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1191

pi->graphics_level[i].ClkBypassCntl = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1193

pi->graphics_level[i].ClkBypassCntl = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1207

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1209

pi->acp_boot_level = 0xff;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1216

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1218

pi->current_rps = *rps;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1219

pi->current_ps = *new_ps;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1220

pi->current_rps.ps_priv = &pi->current_ps;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1221

adev->pm.dpm.current_ps = &pi->current_rps;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1228

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1230

pi->requested_rps = *rps;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1231

pi->requested_ps = *new_ps;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1232

pi->requested_rps.ps_priv = &pi->requested_ps;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1233

adev->pm.dpm.requested_ps = &pi->requested_rps;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1239

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1242

if (pi->bapm_enable) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1264

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1310

if (pi->enable_auto_thermal_throttling) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1375

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1393

if (pi->caps_vce_pg) /* power on the VCE block */

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1395

if (pi->caps_uvd_pg) /* power on the UVD block */

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1412

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1414

return amdgpu_kv_copy_bytes_to_smc(adev, pi->soft_regs_start + reg_offset,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1415

(u8 *)&value, sizeof(u16), pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1421

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1423

return amdgpu_kv_read_smc_sram_dword(adev, pi->soft_regs_start + reg_offset,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1424

value, pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1430

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1432

pi->low_sclk_interrupt_t = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1437

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1440

if (pi->caps_fps) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1444

pi->fps_high_t = cpu_to_be16(tmp);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1446

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1448

(u8 *)&pi->fps_high_t,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1449

sizeof(u16), pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1452

pi->fps_low_t = cpu_to_be16(tmp);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1455

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1457

(u8 *)&pi->fps_low_t,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1458

sizeof(u16), pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1466

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1468

pi->uvd_power_gated = false;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1469

pi->vce_power_gated = false;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1470

pi->samu_power_gated = false;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1471

pi->acp_power_gated = false;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1501

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1509

pi->uvd_boot_level = table->count - 1;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1511

pi->uvd_boot_level = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1513

if (!pi->caps_uvd_dpm || pi->caps_stable_p_state) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1514

mask = 1 << pi->uvd_boot_level;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1520

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1522

(uint8_t *)&pi->uvd_boot_level,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1523

sizeof(u8), pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1553

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1559

if (pi->caps_stable_p_state)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1560

pi->vce_boot_level = table->count - 1;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1562

pi->vce_boot_level = kv_get_vce_boot_level(adev, amdgpu_new_state->evclk);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1565

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1567

(u8 *)&pi->vce_boot_level,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1569

pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1573

if (pi->caps_stable_p_state)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1576

(1 << pi->vce_boot_level));

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1587

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1593

if (pi->caps_stable_p_state)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1594

pi->samu_boot_level = table->count - 1;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1596

pi->samu_boot_level = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1599

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1601

(u8 *)&pi->samu_boot_level,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1603

pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1607

if (pi->caps_stable_p_state)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1610

(1 << pi->samu_boot_level));

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1623

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1626

if (!pi->caps_stable_p_state) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1628

if (acp_boot_level != pi->acp_boot_level) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1629

pi->acp_boot_level = acp_boot_level;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1632

(1 << pi->acp_boot_level));

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1639

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1645

if (pi->caps_stable_p_state)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1646

pi->acp_boot_level = table->count - 1;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1648

pi->acp_boot_level = kv_get_acp_boot_level(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1651

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1653

(u8 *)&pi->acp_boot_level,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1655

pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1659

if (pi->caps_stable_p_state)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1662

(1 << pi->acp_boot_level));

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1671

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1673

pi->uvd_power_gated = gate;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1680

if (pi->caps_uvd_pg)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1684

if (pi->caps_uvd_pg)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1698

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1700

pi->vce_power_gated = gate;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1707

if (pi->caps_vce_pg) /* power off the VCE block */

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1710

if (pi->caps_vce_pg) /* power on the VCE block */

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1722

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1724

if (pi->samu_power_gated == gate)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1727

pi->samu_power_gated = gate;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1731

if (pi->caps_samu_pg)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1734

if (pi->caps_samu_pg)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1742

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1744

if (pi->acp_power_gated == gate)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1750

pi->acp_power_gated = gate;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1754

if (pi->caps_acp_pg)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1757

if (pi->caps_acp_pg)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1767

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1773

for (i = 0; i < pi->graphics_dpm_level_count; i++) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1775

(i == (pi->graphics_dpm_level_count - 1))) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1776

pi->lowest_valid = i;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1781

for (i = pi->graphics_dpm_level_count - 1; i > 0; i--) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1785

pi->highest_valid = i;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1787

if (pi->lowest_valid > pi->highest_valid) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1788

if ((new_ps->levels[0].sclk - table->entries[pi->highest_valid].clk) >

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1789

(table->entries[pi->lowest_valid].clk - new_ps->levels[new_ps->num_levels - 1].sclk))

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1790

pi->highest_valid = pi->lowest_valid;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1792

pi->lowest_valid = pi->highest_valid;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1796

&pi->sys_info.sclk_voltage_mapping_table;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1798

for (i = 0; i < (int)pi->graphics_dpm_level_count; i++) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1800

i == (int)(pi->graphics_dpm_level_count - 1)) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1801

pi->lowest_valid = i;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1806

for (i = pi->graphics_dpm_level_count - 1; i > 0; i--) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1811

pi->highest_valid = i;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1813

if (pi->lowest_valid > pi->highest_valid) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1815

table->entries[pi->highest_valid].sclk_frequency) >

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1816

(table->entries[pi->lowest_valid].sclk_frequency -

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1818

pi->highest_valid = pi->lowest_valid;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1820

pi->lowest_valid = pi->highest_valid;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1829

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1833

if (pi->caps_enable_dfs_bypass) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1835

pi->graphics_level[pi->graphics_boot_level].ClkBypassCntl : 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1837

(pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1839

(pi->graphics_boot_level * sizeof(SMU7_Fusion_GraphicsLevel)) +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1842

sizeof(u8), pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1851

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1855

if (pi->enable_nb_dpm && !pi->nb_dpm_enabled) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1858

pi->nb_dpm_enabled = true;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1861

if (pi->enable_nb_dpm && pi->nb_dpm_enabled) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1864

pi->nb_dpm_enabled = false;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1899

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1906

&pi->requested_rps,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1907

&pi->current_rps);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1915

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1916

struct amdgpu_ps *new_ps = &pi->requested_rps;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1917

struct amdgpu_ps *old_ps = &pi->current_rps;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1920

if (pi->bapm_enable) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1929

if (pi->enable_dpm) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1958

if (pi->enable_dpm) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1990

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

1991

struct amdgpu_ps *new_ps = &pi->requested_rps;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2006

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2021

kv_set_enabled_level(adev, pi->graphics_boot_level);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2029

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2031

if (pi->sys_info.sclk_voltage_mapping_table.num_max_dpm_entries > 0) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2032

int idx = pi->sys_info.sclk_voltage_mapping_table.num_max_dpm_entries - 1;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2034

pi->sys_info.sclk_voltage_mapping_table.entries[idx].sclk_frequency;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2037

pi->sys_info.sclk_voltage_mapping_table.entries[idx].vid_2bit);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2040

table->mclk = pi->sys_info.nbp_memory_clock[0];

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2087

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2089

pi->boot_pl.sclk = pi->sys_info.bootup_sclk;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2090

pi->boot_pl.vddc_index = pi->sys_info.bootup_nb_voltage_index;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2091

pi->boot_pl.ds_divider_index = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2092

pi->boot_pl.ss_divider_index = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2093

pi->boot_pl.allow_gnb_slow = 1;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2094

pi->boot_pl.force_nbp_state = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2095

pi->boot_pl.display_wm = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2096

pi->boot_pl.vce_wm = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2142

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2150

if (!pi->caps_sclk_ds)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2164

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2171

if (pi->high_voltage_t &&

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2173

pi->high_voltage_t)) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2180

&pi->sys_info.sclk_voltage_mapping_table;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2183

if (pi->high_voltage_t &&

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2185

pi->high_voltage_t)) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2201

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2223

if (pi->caps_stable_p_state) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2253

if (pi->high_voltage_t &&

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2254

(pi->high_voltage_t <

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2262

&pi->sys_info.sclk_voltage_mapping_table;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2265

if (pi->high_voltage_t &&

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2266

(pi->high_voltage_t <

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2274

if (pi->caps_stable_p_state) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2280

pi->video_start = new_rps->dclk || new_rps->vclk ||

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2285

pi->battery_state = true;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2287

pi->battery_state = false;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2300

if (pi->sys_info.nb_dpm_enable) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2301

force_high = (mclk >= pi->sys_info.nbp_memory_clock[3]) ||

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2302

pi->video_start || (adev->pm.pm_display_cfg.num_display >= 3) ||

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2303

pi->disable_nb_ps3_in_battery;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2315

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2317

pi->graphics_level[index].EnabledForThrottle = enable ? 1 : 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2322

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2326

if (pi->lowest_valid > pi->highest_valid)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2329

for (i = pi->lowest_valid; i <= pi->highest_valid; i++) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2330

pi->graphics_level[i].DeepSleepDivId =

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2332

be32_to_cpu(pi->graphics_level[i].SclkFrequency),

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2340

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2347

if (pi->lowest_valid > pi->highest_valid)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2351

for (i = pi->lowest_valid; i <= pi->highest_valid; i++) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2352

pi->graphics_level[i].GnbSlow = 1;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2353

pi->graphics_level[i].ForceNbPs1 = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2354

pi->graphics_level[i].UpH = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2357

if (!pi->sys_info.nb_dpm_enable)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2360

force_high = ((mclk >= pi->sys_info.nbp_memory_clock[3]) ||

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2361

(adev->pm.pm_display_cfg.num_display >= 3) || pi->video_start);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2364

for (i = pi->lowest_valid; i <= pi->highest_valid; i++)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2365

pi->graphics_level[i].GnbSlow = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2367

if (pi->battery_state)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2368

pi->graphics_level[0].ForceNbPs1 = 1;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2370

pi->graphics_level[1].GnbSlow = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2371

pi->graphics_level[2].GnbSlow = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2372

pi->graphics_level[3].GnbSlow = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2373

pi->graphics_level[4].GnbSlow = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2376

for (i = pi->lowest_valid; i <= pi->highest_valid; i++) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2377

pi->graphics_level[i].GnbSlow = 1;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2378

pi->graphics_level[i].ForceNbPs1 = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2379

pi->graphics_level[i].UpH = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2382

if (pi->sys_info.nb_dpm_enable && pi->battery_state) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2383

pi->graphics_level[pi->lowest_valid].UpH = 0x28;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2384

pi->graphics_level[pi->lowest_valid].GnbSlow = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2385

if (pi->lowest_valid != pi->highest_valid)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2386

pi->graphics_level[pi->lowest_valid].ForceNbPs1 = 1;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2394

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2397

if (pi->lowest_valid > pi->highest_valid)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2400

for (i = pi->lowest_valid; i <= pi->highest_valid; i++)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2401

pi->graphics_level[i].DisplayWatermark = (i == pi->highest_valid) ? 1 : 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2408

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2416

pi->graphics_dpm_level_count = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2418

if (pi->high_voltage_t &&

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2419

(pi->high_voltage_t <

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2425

&pi->sys_info.vid_mapping_table,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2428

kv_set_at(adev, i, pi->at[i]);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2430

pi->graphics_dpm_level_count++;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2434

&pi->sys_info.sclk_voltage_mapping_table;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2436

pi->graphics_dpm_level_count = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2438

if (pi->high_voltage_t &&

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2439

pi->high_voltage_t <

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2445

kv_set_at(adev, i, pi->at[i]);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2447

pi->graphics_dpm_level_count++;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2457

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2461

if (i >= pi->lowest_valid && i <= pi->highest_valid)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2477

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2480

for (i = pi->lowest_valid; i <= pi->highest_valid; i++)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2492

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2498

if (pi->sys_info.nb_dpm_enable) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2552

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2569

pi->sys_info.bootup_sclk = le32_to_cpu(igp_info->info_8.ulBootUpEngineClock);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2570

pi->sys_info.bootup_uma_clk = le32_to_cpu(igp_info->info_8.ulBootUpUMAClock);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2571

pi->sys_info.bootup_nb_voltage_index =

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2574

pi->sys_info.htc_tmp_lmt = 203;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2576

pi->sys_info.htc_tmp_lmt = igp_info->info_8.ucHtcTmpLmt;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2578

pi->sys_info.htc_hyst_lmt = 5;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2580

pi->sys_info.htc_hyst_lmt = igp_info->info_8.ucHtcHystLmt;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2581

if (pi->sys_info.htc_tmp_lmt <= pi->sys_info.htc_hyst_lmt) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2586

pi->sys_info.nb_dpm_enable = true;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2588

pi->sys_info.nb_dpm_enable = false;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2591

pi->sys_info.nbp_memory_clock[i] =

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2593

pi->sys_info.nbp_n_clock[i] =

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2598

pi->caps_enable_dfs_bypass = true;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2601

&pi->sys_info.sclk_voltage_mapping_table,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2605

&pi->sys_info.vid_mapping_table,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2638

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2641

ps->levels[0] = pi->boot_pl;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2675

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2687

if (pi->caps_sclk_ds) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2783

struct kv_power_info *pi;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2786

pi = kzalloc(sizeof(struct kv_power_info), GFP_KERNEL);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2787

if (pi == NULL)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2789

adev->pm.dpm.priv = pi;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2800

pi->at[i] = TRINITY_AT_DFLT;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2802

pi->sram_end = SMC_RAM_END;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2804

pi->enable_nb_dpm = true;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2806

pi->caps_power_containment = true;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2807

pi->caps_cac = true;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2808

pi->enable_didt = false;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2809

if (pi->enable_didt) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2810

pi->caps_sq_ramping = true;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2811

pi->caps_db_ramping = true;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2812

pi->caps_td_ramping = true;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2813

pi->caps_tcp_ramping = true;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2817

pi->caps_sclk_ds = true;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2819

pi->caps_sclk_ds = false;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2821

pi->enable_auto_thermal_throttling = true;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2822

pi->disable_nb_ps3_in_battery = false;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2824

pi->bapm_enable = false;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2826

pi->bapm_enable = true;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2827

pi->voltage_drop_t = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2828

pi->caps_sclk_throttle_low_notification = false;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2829

pi->caps_fps = false; /* true? */

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2830

pi->caps_uvd_pg = (adev->pg_flags & AMD_PG_SUPPORT_UVD) ? true : false;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2831

pi->caps_uvd_dpm = true;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2832

pi->caps_vce_pg = (adev->pg_flags & AMD_PG_SUPPORT_VCE) ? true : false;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2833

pi->caps_samu_pg = (adev->pg_flags & AMD_PG_SUPPORT_SAMU) ? true : false;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2834

pi->caps_acp_pg = (adev->pg_flags & AMD_PG_SUPPORT_ACP) ? true : false;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2835

pi->caps_stable_p_state = false;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2848

pi->enable_dpm = true;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2858

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2869

sclk = be32_to_cpu(pi->graphics_level[current_index].SclkFrequency);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2874

seq_printf(m, "uvd %sabled\n", pi->uvd_power_gated ? "dis" : "en");

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2875

seq_printf(m, "vce %sabled\n", pi->vce_power_gated ? "dis" : "en");

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2923

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2924

struct kv_ps *requested_state = kv_get_ps(&pi->requested_rps);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2935

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

2937

return pi->sys_info.bootup_uma_clk;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

3263

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

3278

pi->graphics_level[pl_index].SclkFrequency);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

369

struct kv_power_info *pi = adev->pm.dpm.priv;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

371

return pi;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

451

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

454

if (pi->caps_sq_ramping) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

463

if (pi->caps_db_ramping) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

472

if (pi->caps_td_ramping) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

481

if (pi->caps_tcp_ramping) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

493

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

496

if (pi->caps_sq_ramping ||

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

497

pi->caps_db_ramping ||

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

498

pi->caps_td_ramping ||

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

499

pi->caps_tcp_ramping) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

521

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

523

if (pi->caps_cac) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

553

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

556

if (pi->caps_cac) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

560

pi->cac_enabled = false;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

562

pi->cac_enabled = true;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

563

} else if (pi->cac_enabled) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

565

pi->cac_enabled = false;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

574

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

580

&tmp, pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

583

pi->dpm_table_start = tmp;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

587

&tmp, pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

590

pi->soft_regs_start = tmp;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

597

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

600

pi->graphics_voltage_change_enable = 1;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

603

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

605

&pi->graphics_voltage_change_enable,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

606

sizeof(u8), pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

613

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

616

pi->graphics_interval = 1;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

619

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

621

&pi->graphics_interval,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

622

sizeof(u8), pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

629

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

633

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

635

&pi->graphics_boot_level,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

636

sizeof(u8), pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

654

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

663

pi->graphics_level[index].SclkDid = (u8)dividers.post_div;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

664

pi->graphics_level[index].SclkFrequency = cpu_to_be32(sclk);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

678

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

680

&pi->sys_info.vid_mapping_table,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

689

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

691

pi->graphics_level[index].VoltageDownH = (u8)pi->voltage_drop_t;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

692

pi->graphics_level[index].MinVddNb =

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

700

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

702

pi->graphics_level[index].AT = cpu_to_be16((u16)at);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

710

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

712

pi->graphics_level[index].EnabledForActivity = enable ? 1 : 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

772

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

776

if (pi->caps_sclk_throttle_low_notification) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

777

low_sclk_interrupt_t = cpu_to_be32(pi->low_sclk_interrupt_t);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

780

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

783

sizeof(u32), pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

790

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

796

for (i = pi->graphics_dpm_level_count - 1; i > 0; i--) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

797

if (table->entries[i].clk == pi->boot_pl.sclk)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

801

pi->graphics_boot_level = (u8)i;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

805

&pi->sys_info.sclk_voltage_mapping_table;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

810

for (i = pi->graphics_dpm_level_count - 1; i > 0; i--) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

811

if (table->entries[i].sclk_frequency == pi->boot_pl.sclk)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

815

pi->graphics_boot_level = (u8)i;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

823

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

826

pi->graphics_therm_throttle_enable = 1;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

829

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

831

&pi->graphics_therm_throttle_enable,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

832

sizeof(u8), pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

839

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

843

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

845

(u8 *)&pi->graphics_level,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

847

pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

853

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

855

&pi->graphics_dpm_level_count,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

856

sizeof(u8), pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

868

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

871

if (pi->caps_enable_dfs_bypass) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

893

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

903

pi->uvd_level_count = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

905

if (pi->high_voltage_t &&

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

906

(pi->high_voltage_t < table->entries[i].v))

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

909

pi->uvd_level[i].VclkFrequency = cpu_to_be32(table->entries[i].vclk);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

910

pi->uvd_level[i].DclkFrequency = cpu_to_be32(table->entries[i].dclk);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

911

pi->uvd_level[i].MinVddNb = cpu_to_be16(table->entries[i].v);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

913

pi->uvd_level[i].VClkBypassCntl =

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

915

pi->uvd_level[i].DClkBypassCntl =

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

922

pi->uvd_level[i].VclkDivider = (u8)dividers.post_div;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

928

pi->uvd_level[i].DclkDivider = (u8)dividers.post_div;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

930

pi->uvd_level_count++;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

934

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

936

(u8 *)&pi->uvd_level_count,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

937

sizeof(u8), pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

941

pi->uvd_interval = 1;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

944

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

946

&pi->uvd_interval,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

947

sizeof(u8), pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

952

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

954

(u8 *)&pi->uvd_level,

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

956

pi->sram_end);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

964

struct kv_power_info *pi = kv_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

974

pi->vce_level_count = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

976

if (pi->high_voltage_t &&

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

977

pi->high_voltage_t < table->entries[i].v)

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

980

pi->vce_level[i].Frequency = cpu_to_be32(table->entries[i].evclk);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

981

pi->vce_level[i].MinVoltage = cpu_to_be16(table->entries[i].v);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

983

pi->vce_level[i].ClkBypassCntl =

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

990

pi->vce_level[i].Divider = (u8)dividers.post_div;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

992

pi->vce_level_count++;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

996

pi->dpm_table_start +

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

998

(u8 *)&pi->vce_level_count,

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

1870

struct si_power_info *pi = adev->pm.dpm.priv;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

1871

return pi;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

1972

struct rv7xx_power_info *pi = adev->pm.dpm.priv;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

1974

return pi;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

1979

struct ni_power_info *pi = adev->pm.dpm.priv;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

1981

return pi;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2387

struct evergreen_power_info *pi = adev->pm.dpm.priv;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2389

return pi;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3417

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3421

pi->max_vddc = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3423

pi->max_vddc = vddc;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3428

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3431

pi->sclk_ss = amdgpu_atombios_get_asic_ss_info(adev, &ss,

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3433

pi->mclk_ss = amdgpu_atombios_get_asic_ss_info(adev, &ss,

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3436

if (pi->sclk_ss || pi->mclk_ss)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3437

pi->dynamic_ss = true;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3439

pi->dynamic_ss = false;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3799

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3825

if (pi->thermal_protection)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3836

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3839

if (!(pi->active_auto_throttle_sources & (1 << source))) {

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3840

pi->active_auto_throttle_sources |= 1 << source;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3841

si_set_dpm_event_sources(adev, pi->active_auto_throttle_sources);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3844

if (pi->active_auto_throttle_sources & (1 << source)) {

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3845

pi->active_auto_throttle_sources &= ~(1 << source);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

3846

si_set_dpm_event_sources(adev, pi->active_auto_throttle_sources);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4244

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4247

if (pi->sclk_ss)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4257

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4260

r600_calculate_u_and_p(pi->asi,

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4263

&pi->bsp,

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4264

&pi->bsu);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4266

r600_calculate_u_and_p(pi->pasi,

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4269

&pi->pbsp,

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4270

&pi->pbsu);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4273

pi->dsp = (pi->bsp << CG_BSP__BSP__SHIFT) | (pi->bsu << CG_BSP__BSU__SHIFT);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4274

pi->psp = (pi->pbsp << CG_BSP__BSP__SHIFT) | (pi->pbsu << CG_BSP__BSU__SHIFT);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4276

WREG32(mmCG_BSP, pi->dsp);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4330

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4332

WREG32(mmCG_FTV, pi->vrc);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4377

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4381

if (mclk <= pi->mclk_strobe_mode_threshold)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4472

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4477

if (pi->voltage_control) {

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4516

if (pi->mvdd_control) {

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4521

pi->mvdd_control = false;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4526

pi->mvdd_control = false;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4563

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4582

if (pi->max_vddc_in_table <= eg_pi->vddc_voltage_table.entries[i].value) {

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4646

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4649

if (pi->mvdd_control) {

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4650

if (mclk <= pi->mvdd_split_frequency)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4872

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4875

if (pi->mvdd_control)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4887

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4970

table->initialState.level.bSP = cpu_to_be32(pi->dsp);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

4978

if (initial_state->performance_levels[0].mclk > pi->mclk_edc_enable_threshold)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5034

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5055

if (pi->acpi_vddc) {

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5057

pi->acpi_vddc, &table->ACPIState.level.vddc);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5073

pi->acpi_vddc,

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5080

pi->min_vddc_in_table, &table->ACPIState.level.vddc);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5101

pi->min_vddc_in_table,

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5107

if (pi->acpi_vddc) {

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5232

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5234

pi->mvdd_split_frequency = 30000;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5330

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5367

if (pi->sclk_ss) {

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5424

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5458

if (pi->mclk_ss) {

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5511

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5515

smc_state->levels[i].bSP = cpu_to_be32(pi->dsp);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5518

cpu_to_be32(pi->psp);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5525

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5544

if (pi->mclk_stutter_mode_threshold &&

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5545

(pl->mclk <= pi->mclk_stutter_mode_threshold) &&

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5553

if (pl->mclk > pi->mclk_edc_enable_threshold)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5630

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5663

a_t |= (t_l * pi->bsp / 20000) << CG_AT__CG_R__SHIFT;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

5667

pi->pbsp : pi->bsp;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

6862

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

6870

if (pi->voltage_control || si_pi->voltage_control_svi2)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

6872

if (pi->mvdd_control)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

6874

if (pi->voltage_control || si_pi->voltage_control_svi2) {

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

6886

if (pi->dynamic_ss)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

6888

if (pi->thermal_protection)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

6997

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7005

if (pi->thermal_protection)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7233

struct rv7xx_power_info *pi = rv770_get_pi(adev);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7263

pi->acpi_vddc = pl->vddc;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7279

if (pi->min_vddc_in_table > pl->vddc)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7280

pi->min_vddc_in_table = pl->vddc;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7282

if (pi->max_vddc_in_table < pl->vddc)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7283

pi->max_vddc_in_table = pl->vddc;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7402

struct rv7xx_power_info *pi;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7415

pi = &eg_pi->rv7xx;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7428

pi->acpi_vddc = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7430

pi->min_vddc_in_table = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7431

pi->max_vddc_in_table = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7470

pi->ref_div = dividers.ref_div + 1;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7472

pi->ref_div = R600_REFERENCEDIVIDER_DFLT;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7476

pi->mclk_strobe_mode_threshold = 40000;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7478

pi->mclk_stutter_mode_threshold = 0;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7480

pi->mclk_stutter_mode_threshold = pi->mclk_strobe_mode_threshold;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7481

pi->mclk_edc_enable_threshold = 40000;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7486

pi->voltage_control =

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7489

if (!pi->voltage_control) {

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7498

pi->mvdd_control =

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7516

pi->asi = RV770_ASI_DFLT;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7517

pi->pasi = CYPRESS_HASI_DFLT;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7518

pi->vrc = SISLANDS_VRC_DFLT;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7520

pi->gfx_clock_gating = true;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7526

pi->thermal_protection = true;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

7528

pi->thermal_protection = false;

sys/dev/pci/drm/i915/i915_drv.h

482

const unsigned int pi = __platform_mask_index(info, p);

sys/dev/pci/drm/i915/i915_drv.h

484

return info->platform_mask[pi] & INTEL_SUBPLATFORM_MASK;

sys/dev/pci/drm/i915/i915_drv.h

491

const unsigned int pi = __platform_mask_index(info, p);

sys/dev/pci/drm/i915/i915_drv.h

498

return info->platform_mask[pi] & BIT(pb);

sys/dev/pci/drm/i915/i915_drv.h

506

const unsigned int pi = __platform_mask_index(info, p);

sys/dev/pci/drm/i915/i915_drv.h

509

const u32 mask = info->platform_mask[pi];

sys/dev/pci/drm/i915/intel_device_info.c

233

const unsigned int pi = __platform_mask_index(rinfo, info->platform);

sys/dev/pci/drm/i915/intel_device_info.c

239

RUNTIME_INFO(i915)->platform_mask[pi] = BIT(pb);

sys/dev/pci/drm/i915/intel_device_info.c

294

RUNTIME_INFO(i915)->platform_mask[pi] |= mask;

sys/dev/pci/drm/linux_sort.c

44

TYPE *pi = (TYPE *) (parmi); \

sys/dev/pci/drm/linux_sort.c

47

TYPE t = *pi; \

sys/dev/pci/drm/linux_sort.c

48

*pi++ = *pj; \

sys/dev/pci/drm/linux_sort_r.c

45

TYPE *pi = (TYPE *) (parmi); \

sys/dev/pci/drm/linux_sort_r.c

48

TYPE t = *pi; \

sys/dev/pci/drm/linux_sort_r.c

49

*pi++ = *pj; \

sys/dev/pci/drm/radeon/btc_dpm.c

1306

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/btc_dpm.c

1313

if (!pi->boot_in_gen2) {

sys/dev/pci/drm/radeon/btc_dpm.c

1332

if (!pi->boot_in_gen2) {

sys/dev/pci/drm/radeon/btc_dpm.c

1600

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/btc_dpm.c

1602

RV770_SMC_STATETABLE *table = &pi->smc_statetable;

sys/dev/pci/drm/radeon/btc_dpm.c

1631

if (pi->mem_gddr5)

sys/dev/pci/drm/radeon/btc_dpm.c

1655

pi->state_table_start,

sys/dev/pci/drm/radeon/btc_dpm.c

1658

pi->sram_end);

sys/dev/pci/drm/radeon/btc_dpm.c

1664

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/btc_dpm.c

1672

pi->rlp = 10;

sys/dev/pci/drm/radeon/btc_dpm.c

1673

pi->rmp = 100;

sys/dev/pci/drm/radeon/btc_dpm.c

1674

pi->lhp = 100;

sys/dev/pci/drm/radeon/btc_dpm.c

1675

pi->lmp = 10;

sys/dev/pci/drm/radeon/btc_dpm.c

1677

pi->rlp = eg_pi->ats[idx].rlp;

sys/dev/pci/drm/radeon/btc_dpm.c

1678

pi->rmp = eg_pi->ats[idx].rmp;

sys/dev/pci/drm/radeon/btc_dpm.c

1679

pi->lhp = eg_pi->ats[idx].lhp;

sys/dev/pci/drm/radeon/btc_dpm.c

1680

pi->lmp = eg_pi->ats[idx].lmp;

sys/dev/pci/drm/radeon/btc_dpm.c

1889

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/btc_dpm.c

1916

if (!pi->mem_gddr5)

sys/dev/pci/drm/radeon/btc_dpm.c

2038

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/btc_dpm.c

2041

if (pi->mclk_stutter_mode_threshold) {

sys/dev/pci/drm/radeon/btc_dpm.c

2042

if (pi->mem_gddr5) {

sys/dev/pci/drm/radeon/btc_dpm.c

2054

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/btc_dpm.c

2056

u32 switch_limit = pi->mem_gddr5 ? 450 : 100;

sys/dev/pci/drm/radeon/btc_dpm.c

2348

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/btc_dpm.c

2353

if (pi->gfx_clock_gating)

sys/dev/pci/drm/radeon/btc_dpm.c

2359

if (pi->mg_clock_gating)

sys/dev/pci/drm/radeon/btc_dpm.c

2365

if (pi->voltage_control) {

sys/dev/pci/drm/radeon/btc_dpm.c

2374

if (pi->mvdd_control) {

sys/dev/pci/drm/radeon/btc_dpm.c

2391

if (pi->dynamic_ss)

sys/dev/pci/drm/radeon/btc_dpm.c

2394

if (pi->thermal_protection)

sys/dev/pci/drm/radeon/btc_dpm.c

2406

if (pi->dynamic_pcie_gen2)

sys/dev/pci/drm/radeon/btc_dpm.c

2445

if (pi->gfx_clock_gating)

sys/dev/pci/drm/radeon/btc_dpm.c

2448

if (pi->mg_clock_gating)

sys/dev/pci/drm/radeon/btc_dpm.c

2465

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/btc_dpm.c

2473

if (pi->thermal_protection)

sys/dev/pci/drm/radeon/btc_dpm.c

2476

if (pi->dynamic_pcie_gen2)

sys/dev/pci/drm/radeon/btc_dpm.c

2485

if (pi->gfx_clock_gating)

sys/dev/pci/drm/radeon/btc_dpm.c

2488

if (pi->mg_clock_gating)

sys/dev/pci/drm/radeon/btc_dpm.c

2524

struct rv7xx_power_info *pi;

sys/dev/pci/drm/radeon/btc_dpm.c

2533

pi = &eg_pi->rv7xx;

sys/dev/pci/drm/radeon/btc_dpm.c

2538

pi->acpi_vddc = 0;

sys/dev/pci/drm/radeon/btc_dpm.c

2540

pi->min_vddc_in_table = 0;

sys/dev/pci/drm/radeon/btc_dpm.c

2541

pi->max_vddc_in_table = 0;

sys/dev/pci/drm/radeon/btc_dpm.c

2580

pi->ref_div = dividers.ref_div + 1;

sys/dev/pci/drm/radeon/btc_dpm.c

2582

pi->ref_div = R600_REFERENCEDIVIDER_DFLT;

sys/dev/pci/drm/radeon/btc_dpm.c

2584

pi->mclk_strobe_mode_threshold = 40000;

sys/dev/pci/drm/radeon/btc_dpm.c

2585

pi->mclk_edc_enable_threshold = 40000;

sys/dev/pci/drm/radeon/btc_dpm.c

2588

pi->rlp = RV770_RLP_DFLT;

sys/dev/pci/drm/radeon/btc_dpm.c

2589

pi->rmp = RV770_RMP_DFLT;

sys/dev/pci/drm/radeon/btc_dpm.c

2590

pi->lhp = RV770_LHP_DFLT;

sys/dev/pci/drm/radeon/btc_dpm.c

2591

pi->lmp = RV770_LMP_DFLT;

sys/dev/pci/drm/radeon/btc_dpm.c

2605

pi->voltage_control =

sys/dev/pci/drm/radeon/btc_dpm.c

2608

pi->mvdd_control =

sys/dev/pci/drm/radeon/btc_dpm.c

2616

pi->asi = RV770_ASI_DFLT;

sys/dev/pci/drm/radeon/btc_dpm.c

2617

pi->pasi = CYPRESS_HASI_DFLT;

sys/dev/pci/drm/radeon/btc_dpm.c

2618

pi->vrc = CYPRESS_VRC_DFLT;

sys/dev/pci/drm/radeon/btc_dpm.c

2620

pi->power_gating = false;

sys/dev/pci/drm/radeon/btc_dpm.c

2622

pi->gfx_clock_gating = true;

sys/dev/pci/drm/radeon/btc_dpm.c

2624

pi->mg_clock_gating = true;

sys/dev/pci/drm/radeon/btc_dpm.c

2625

pi->mgcgtssm = true;

sys/dev/pci/drm/radeon/btc_dpm.c

2629

pi->dynamic_pcie_gen2 = true;

sys/dev/pci/drm/radeon/btc_dpm.c

2632

pi->thermal_protection = true;

sys/dev/pci/drm/radeon/btc_dpm.c

2634

pi->thermal_protection = false;

sys/dev/pci/drm/radeon/btc_dpm.c

2636

pi->display_gap = true;

sys/dev/pci/drm/radeon/btc_dpm.c

2639

pi->dcodt = true;

sys/dev/pci/drm/radeon/btc_dpm.c

2641

pi->dcodt = false;

sys/dev/pci/drm/radeon/btc_dpm.c

2643

pi->ulps = true;

sys/dev/pci/drm/radeon/btc_dpm.c

2664

pi->mclk_stutter_mode_threshold = 30000;

sys/dev/pci/drm/radeon/btc_dpm.c

2666

pi->mclk_stutter_mode_threshold = 0;

sys/dev/pci/drm/radeon/btc_dpm.c

2668

pi->sram_end = SMC_RAM_END;

sys/dev/pci/drm/radeon/ci_dpm.c

1006

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1009

if (pi->caps_od_fuzzy_fan_control_support) {

sys/dev/pci/drm/radeon/ci_dpm.c

1028

pi->fan_is_controlled_by_smc = true;

sys/dev/pci/drm/radeon/ci_dpm.c

1035

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1039

pi->fan_is_controlled_by_smc = false;

sys/dev/pci/drm/radeon/ci_dpm.c

1076

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1081

if (pi->fan_is_controlled_by_smc)

sys/dev/pci/drm/radeon/ci_dpm.c

1121

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1124

if (pi->fan_is_controlled_by_smc)

sys/dev/pci/drm/radeon/ci_dpm.c

1185

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1188

if (!pi->fan_ctrl_is_in_default_mode) {

sys/dev/pci/drm/radeon/ci_dpm.c

1190

tmp |= FDO_PWM_MODE(pi->fan_ctrl_default_mode);

sys/dev/pci/drm/radeon/ci_dpm.c

1194

tmp |= TMIN(pi->t_min);

sys/dev/pci/drm/radeon/ci_dpm.c

1196

pi->fan_ctrl_is_in_default_mode = true;

sys/dev/pci/drm/radeon/ci_dpm.c

1254

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1257

pi->soft_regs_start + reg_offset,

sys/dev/pci/drm/radeon/ci_dpm.c

1258

value, pi->sram_end);

sys/dev/pci/drm/radeon/ci_dpm.c

1265

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1268

pi->soft_regs_start + reg_offset,

sys/dev/pci/drm/radeon/ci_dpm.c

1269

value, pi->sram_end);

sys/dev/pci/drm/radeon/ci_dpm.c

1274

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1275

SMU7_Discrete_DpmTable *table = &pi->smc_state_table;

sys/dev/pci/drm/radeon/ci_dpm.c

1277

if (pi->caps_fps) {

sys/dev/pci/drm/radeon/ci_dpm.c

1290

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1294

if (pi->caps_sclk_throttle_low_notification) {

sys/dev/pci/drm/radeon/ci_dpm.c

1295

low_sclk_interrupt_t = cpu_to_be32(pi->low_sclk_interrupt_t);

sys/dev/pci/drm/radeon/ci_dpm.c

1298

pi->dpm_table_start +

sys/dev/pci/drm/radeon/ci_dpm.c

1301

sizeof(u32), pi->sram_end);

sys/dev/pci/drm/radeon/ci_dpm.c

1310

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1315

pi->vddc_leakage.count = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

1316

pi->vddci_leakage.count = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

1324

pi->vddc_leakage.actual_voltage[pi->vddc_leakage.count] = vddc;

sys/dev/pci/drm/radeon/ci_dpm.c

1325

pi->vddc_leakage.leakage_id[pi->vddc_leakage.count] = virtual_voltage_id;

sys/dev/pci/drm/radeon/ci_dpm.c

1326

pi->vddc_leakage.count++;

sys/dev/pci/drm/radeon/ci_dpm.c

1336

pi->vddc_leakage.actual_voltage[pi->vddc_leakage.count] = vddc;

sys/dev/pci/drm/radeon/ci_dpm.c

1337

pi->vddc_leakage.leakage_id[pi->vddc_leakage.count] = virtual_voltage_id;

sys/dev/pci/drm/radeon/ci_dpm.c

1338

pi->vddc_leakage.count++;

sys/dev/pci/drm/radeon/ci_dpm.c

1341

pi->vddci_leakage.actual_voltage[pi->vddci_leakage.count] = vddci;

sys/dev/pci/drm/radeon/ci_dpm.c

1342

pi->vddci_leakage.leakage_id[pi->vddci_leakage.count] = virtual_voltage_id;

sys/dev/pci/drm/radeon/ci_dpm.c

1343

pi->vddci_leakage.count++;

sys/dev/pci/drm/radeon/ci_dpm.c

1352

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1375

if (pi->thermal_protection)

sys/dev/pci/drm/radeon/ci_dpm.c

1391

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1394

if (!(pi->active_auto_throttle_sources & (1 << source))) {

sys/dev/pci/drm/radeon/ci_dpm.c

1395

pi->active_auto_throttle_sources |= 1 << source;

sys/dev/pci/drm/radeon/ci_dpm.c

1396

ci_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources);

sys/dev/pci/drm/radeon/ci_dpm.c

1399

if (pi->active_auto_throttle_sources & (1 << source)) {

sys/dev/pci/drm/radeon/ci_dpm.c

1400

pi->active_auto_throttle_sources &= ~(1 << source);

sys/dev/pci/drm/radeon/ci_dpm.c

1401

ci_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources);

sys/dev/pci/drm/radeon/ci_dpm.c

1414

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1417

if (!pi->need_update_smu7_dpm_table)

sys/dev/pci/drm/radeon/ci_dpm.c

1420

if ((!pi->sclk_dpm_key_disabled) &&

sys/dev/pci/drm/radeon/ci_dpm.c

1421

(pi->need_update_smu7_dpm_table & (DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_UPDATE_SCLK))) {

sys/dev/pci/drm/radeon/ci_dpm.c

1427

if ((!pi->mclk_dpm_key_disabled) &&

sys/dev/pci/drm/radeon/ci_dpm.c

1428

(pi->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK)) {

sys/dev/pci/drm/radeon/ci_dpm.c

1434

pi->need_update_smu7_dpm_table = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

1440

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1444

if (!pi->sclk_dpm_key_disabled) {

sys/dev/pci/drm/radeon/ci_dpm.c

1450

if (!pi->mclk_dpm_key_disabled) {

sys/dev/pci/drm/radeon/ci_dpm.c

1468

if (!pi->sclk_dpm_key_disabled) {

sys/dev/pci/drm/radeon/ci_dpm.c

1474

if (!pi->mclk_dpm_key_disabled) {

sys/dev/pci/drm/radeon/ci_dpm.c

1486

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1511

if (!pi->pcie_dpm_key_disabled) {

sys/dev/pci/drm/radeon/ci_dpm.c

1522

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1525

if (!pi->need_update_smu7_dpm_table)

sys/dev/pci/drm/radeon/ci_dpm.c

1528

if ((!pi->sclk_dpm_key_disabled) &&

sys/dev/pci/drm/radeon/ci_dpm.c

1529

(pi->need_update_smu7_dpm_table & (DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_UPDATE_SCLK))) {

sys/dev/pci/drm/radeon/ci_dpm.c

1535

if ((!pi->mclk_dpm_key_disabled) &&

sys/dev/pci/drm/radeon/ci_dpm.c

1536

(pi->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK)) {

sys/dev/pci/drm/radeon/ci_dpm.c

1547

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1560

if (!pi->pcie_dpm_key_disabled) {

sys/dev/pci/drm/radeon/ci_dpm.c

1592

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1604

if (pi->caps_automatic_dc_transition) {

sys/dev/pci/drm/radeon/ci_dpm.c

1658

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1660

if (!pi->sclk_dpm_key_disabled) {

sys/dev/pci/drm/radeon/ci_dpm.c

1672

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1674

if (!pi->mclk_dpm_key_disabled) {

sys/dev/pci/drm/radeon/ci_dpm.c

1686

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1688

if (!pi->pcie_dpm_key_disabled) {

sys/dev/pci/drm/radeon/ci_dpm.c

169

struct ci_power_info *pi = rdev->pm.dpm.priv;

sys/dev/pci/drm/radeon/ci_dpm.c

1700

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1702

if (pi->power_containment_features & POWERCONTAINMENT_FEATURE_PkgPwrLimit) {

sys/dev/pci/drm/radeon/ci_dpm.c

171

return pi;

sys/dev/pci/drm/radeon/ci_dpm.c

1776

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1783

&tmp, pi->sram_end);

sys/dev/pci/drm/radeon/ci_dpm.c

1787

pi->dpm_table_start = tmp;

sys/dev/pci/drm/radeon/ci_dpm.c

1792

&tmp, pi->sram_end);

sys/dev/pci/drm/radeon/ci_dpm.c

1796

pi->soft_regs_start = tmp;

sys/dev/pci/drm/radeon/ci_dpm.c

1801

&tmp, pi->sram_end);

sys/dev/pci/drm/radeon/ci_dpm.c

1805

pi->mc_reg_table_start = tmp;

sys/dev/pci/drm/radeon/ci_dpm.c

1810

&tmp, pi->sram_end);

sys/dev/pci/drm/radeon/ci_dpm.c

1814

pi->fan_table_start = tmp;

sys/dev/pci/drm/radeon/ci_dpm.c

1819

&tmp, pi->sram_end);

sys/dev/pci/drm/radeon/ci_dpm.c

1823

pi->arb_table_start = tmp;

sys/dev/pci/drm/radeon/ci_dpm.c

183

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1830

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1832

pi->clock_registers.cg_spll_func_cntl =

sys/dev/pci/drm/radeon/ci_dpm.c

1834

pi->clock_registers.cg_spll_func_cntl_2 =

sys/dev/pci/drm/radeon/ci_dpm.c

1836

pi->clock_registers.cg_spll_func_cntl_3 =

sys/dev/pci/drm/radeon/ci_dpm.c

1838

pi->clock_registers.cg_spll_func_cntl_4 =

sys/dev/pci/drm/radeon/ci_dpm.c

1840

pi->clock_registers.cg_spll_spread_spectrum =

sys/dev/pci/drm/radeon/ci_dpm.c

1842

pi->clock_registers.cg_spll_spread_spectrum_2 =

sys/dev/pci/drm/radeon/ci_dpm.c

1844

pi->clock_registers.dll_cntl = RREG32(DLL_CNTL);

sys/dev/pci/drm/radeon/ci_dpm.c

1845

pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL);

sys/dev/pci/drm/radeon/ci_dpm.c

1846

pi->clock_registers.mpll_ad_func_cntl = RREG32(MPLL_AD_FUNC_CNTL);

sys/dev/pci/drm/radeon/ci_dpm.c

1847

pi->clock_registers.mpll_dq_func_cntl = RREG32(MPLL_DQ_FUNC_CNTL);

sys/dev/pci/drm/radeon/ci_dpm.c

1848

pi->clock_registers.mpll_func_cntl = RREG32(MPLL_FUNC_CNTL);

sys/dev/pci/drm/radeon/ci_dpm.c

1849

pi->clock_registers.mpll_func_cntl_1 = RREG32(MPLL_FUNC_CNTL_1);

sys/dev/pci/drm/radeon/ci_dpm.c

1850

pi->clock_registers.mpll_func_cntl_2 = RREG32(MPLL_FUNC_CNTL_2);

sys/dev/pci/drm/radeon/ci_dpm.c

1851

pi->clock_registers.mpll_ss1 = RREG32(MPLL_SS1);

sys/dev/pci/drm/radeon/ci_dpm.c

1852

pi->clock_registers.mpll_ss2 = RREG32(MPLL_SS2);

sys/dev/pci/drm/radeon/ci_dpm.c

1857

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1859

pi->low_sclk_interrupt_t = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

1923

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1926

if (pi->caps_sclk_ds) {

sys/dev/pci/drm/radeon/ci_dpm.c

193

pi->powertune_defaults = &defaults_bonaire_xt;

sys/dev/pci/drm/radeon/ci_dpm.c

1934

if (pi->caps_sclk_ds) {

sys/dev/pci/drm/radeon/ci_dpm.c

1979

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

1983

if (pi->caps_sclk_ss_support) {

sys/dev/pci/drm/radeon/ci_dpm.c

199

pi->powertune_defaults = &defaults_saturn_xt;

sys/dev/pci/drm/radeon/ci_dpm.c

203

pi->powertune_defaults = &defaults_hawaii_xt;

sys/dev/pci/drm/radeon/ci_dpm.c

2053

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

2065

return ci_load_smc_ucode(rdev, pi->sram_end);

sys/dev/pci/drm/radeon/ci_dpm.c

207

pi->powertune_defaults = &defaults_hawaii_pro;

sys/dev/pci/drm/radeon/ci_dpm.c

2092

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

2095

if (pi->voltage_control == CISLANDS_VOLTAGE_CONTROL_BY_GPIO) {

sys/dev/pci/drm/radeon/ci_dpm.c

2098

&pi->vddc_voltage_table);

sys/dev/pci/drm/radeon/ci_dpm.c

2101

} else if (pi->voltage_control == CISLANDS_VOLTAGE_CONTROL_BY_SVID2) {

sys/dev/pci/drm/radeon/ci_dpm.c

2104

&pi->vddc_voltage_table);

sys/dev/pci/drm/radeon/ci_dpm.c

2109

if (pi->vddc_voltage_table.count > SMU7_MAX_LEVELS_VDDC)

sys/dev/pci/drm/radeon/ci_dpm.c

2111

&pi->vddc_voltage_table);

sys/dev/pci/drm/radeon/ci_dpm.c

2113

if (pi->vddci_control == CISLANDS_VOLTAGE_CONTROL_BY_GPIO) {

sys/dev/pci/drm/radeon/ci_dpm.c

2116

&pi->vddci_voltage_table);

sys/dev/pci/drm/radeon/ci_dpm.c

2119

} else if (pi->vddci_control == CISLANDS_VOLTAGE_CONTROL_BY_SVID2) {

sys/dev/pci/drm/radeon/ci_dpm.c

2122

&pi->vddci_voltage_table);

sys/dev/pci/drm/radeon/ci_dpm.c

2127

if (pi->vddci_voltage_table.count > SMU7_MAX_LEVELS_VDDCI)

sys/dev/pci/drm/radeon/ci_dpm.c

2129

&pi->vddci_voltage_table);

sys/dev/pci/drm/radeon/ci_dpm.c

2131

if (pi->mvdd_control == CISLANDS_VOLTAGE_CONTROL_BY_GPIO) {

sys/dev/pci/drm/radeon/ci_dpm.c

2134

&pi->mvdd_voltage_table);

sys/dev/pci/drm/radeon/ci_dpm.c

2137

} else if (pi->mvdd_control == CISLANDS_VOLTAGE_CONTROL_BY_SVID2) {

sys/dev/pci/drm/radeon/ci_dpm.c

2140

&pi->mvdd_voltage_table);

sys/dev/pci/drm/radeon/ci_dpm.c

2145

if (pi->mvdd_voltage_table.count > SMU7_MAX_LEVELS_MVDD)

sys/dev/pci/drm/radeon/ci_dpm.c

2147

&pi->mvdd_voltage_table);

sys/dev/pci/drm/radeon/ci_dpm.c

217

pi->powertune_defaults = &defaults_bonaire_xt;

sys/dev/pci/drm/radeon/ci_dpm.c

2177

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

2180

table->VddcLevelCount = pi->vddc_voltage_table.count;

sys/dev/pci/drm/radeon/ci_dpm.c

2183

&pi->vddc_voltage_table.entries[count],

sys/dev/pci/drm/radeon/ci_dpm.c

2186

if (pi->voltage_control == CISLANDS_VOLTAGE_CONTROL_BY_GPIO)

sys/dev/pci/drm/radeon/ci_dpm.c

2188

pi->vddc_voltage_table.entries[count].smio_low;

sys/dev/pci/drm/radeon/ci_dpm.c

2201

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

2203

table->VddciLevelCount = pi->vddci_voltage_table.count;

sys/dev/pci/drm/radeon/ci_dpm.c

2206

&pi->vddci_voltage_table.entries[count],

sys/dev/pci/drm/radeon/ci_dpm.c

2209

if (pi->vddci_control == CISLANDS_VOLTAGE_CONTROL_BY_GPIO)

sys/dev/pci/drm/radeon/ci_dpm.c

221

pi->dte_tj_offset = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

2211

pi->vddci_voltage_table.entries[count].smio_low;

sys/dev/pci/drm/radeon/ci_dpm.c

2223

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

2226

table->MvddLevelCount = pi->mvdd_voltage_table.count;

sys/dev/pci/drm/radeon/ci_dpm.c

2229

&pi->mvdd_voltage_table.entries[count],

sys/dev/pci/drm/radeon/ci_dpm.c

223

pi->caps_power_containment = true;

sys/dev/pci/drm/radeon/ci_dpm.c

2232

if (pi->mvdd_control == CISLANDS_VOLTAGE_CONTROL_BY_GPIO)

sys/dev/pci/drm/radeon/ci_dpm.c

2234

pi->mvdd_voltage_table.entries[count].smio_low;

sys/dev/pci/drm/radeon/ci_dpm.c

224

pi->caps_cac = false;

sys/dev/pci/drm/radeon/ci_dpm.c

225

pi->caps_sq_ramping = false;

sys/dev/pci/drm/radeon/ci_dpm.c

226

pi->caps_db_ramping = false;

sys/dev/pci/drm/radeon/ci_dpm.c

2266

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

2269

if (pi->mvdd_control != CISLANDS_VOLTAGE_CONTROL_NONE) {

sys/dev/pci/drm/radeon/ci_dpm.c

227

pi->caps_td_ramping = false;

sys/dev/pci/drm/radeon/ci_dpm.c

2272

voltage->Voltage = pi->mvdd_voltage_table.entries[i].value;

sys/dev/pci/drm/radeon/ci_dpm.c

228

pi->caps_tcp_ramping = false;

sys/dev/pci/drm/radeon/ci_dpm.c

230

if (pi->caps_power_containment) {

sys/dev/pci/drm/radeon/ci_dpm.c

231

pi->caps_cac = true;

sys/dev/pci/drm/radeon/ci_dpm.c

233

pi->enable_bapm_feature = false;

sys/dev/pci/drm/radeon/ci_dpm.c

235

pi->enable_bapm_feature = true;

sys/dev/pci/drm/radeon/ci_dpm.c

236

pi->enable_tdc_limit_feature = true;

sys/dev/pci/drm/radeon/ci_dpm.c

237

pi->enable_pkg_pwr_tracking_feature = true;

sys/dev/pci/drm/radeon/ci_dpm.c

2371

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

2375

ret = ci_read_smc_sram_dword(rdev, pi->arb_table_start,

sys/dev/pci/drm/radeon/ci_dpm.c

2376

&tmp, pi->sram_end);

sys/dev/pci/drm/radeon/ci_dpm.c

2383

return ci_write_smc_sram_dword(rdev, pi->arb_table_start,

sys/dev/pci/drm/radeon/ci_dpm.c

2384

tmp, pi->sram_end);

sys/dev/pci/drm/radeon/ci_dpm.c

248

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

249

u8 *hi_vid = pi->smc_powertune_table.BapmVddCVidHiSidd;

sys/dev/pci/drm/radeon/ci_dpm.c

250

u8 *lo_vid = pi->smc_powertune_table.BapmVddCVidLoSidd;

sys/dev/pci/drm/radeon/ci_dpm.c

2504

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

251

u8 *hi2_vid = pi->smc_powertune_table.BapmVddCVidHiSidd2;

sys/dev/pci/drm/radeon/ci_dpm.c

2511

for (i = 0; i < pi->dpm_table.sclk_table.count; i++) {

sys/dev/pci/drm/radeon/ci_dpm.c

2512

for (j = 0; j < pi->dpm_table.mclk_table.count; j++) {

sys/dev/pci/drm/radeon/ci_dpm.c

2514

pi->dpm_table.sclk_table.dpm_levels[i].value,

sys/dev/pci/drm/radeon/ci_dpm.c

2515

pi->dpm_table.mclk_table.dpm_levels[j].value,

sys/dev/pci/drm/radeon/ci_dpm.c

2524

pi->arb_table_start,

sys/dev/pci/drm/radeon/ci_dpm.c

2527

pi->sram_end);

sys/dev/pci/drm/radeon/ci_dpm.c

2534

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

2536

if (pi->need_update_smu7_dpm_table == 0)

sys/dev/pci/drm/radeon/ci_dpm.c

2546

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

2552

pi->smc_state_table.GraphicsBootLevel = level;

sys/dev/pci/drm/radeon/ci_dpm.c

2560

pi->smc_state_table.MemoryBootLevel = level;

sys/dev/pci/drm/radeon/ci_dpm.c

2585

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

2586

struct ci_dpm_table *dpm_table = &pi->dpm_table;

sys/dev/pci/drm/radeon/ci_dpm.c

2599

pi->smc_state_table.LinkLevelCount = (u8)dpm_table->pcie_speed_table.count;

sys/dev/pci/drm/radeon/ci_dpm.c

2600

pi->dpm_level_enable_mask.pcie_dpm_enable_mask =

sys/dev/pci/drm/radeon/ci_dpm.c

2750

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

2751

u32 dll_cntl = pi->clock_registers.dll_cntl;

sys/dev/pci/drm/radeon/ci_dpm.c

2752

u32 mclk_pwrmgt_cntl = pi->clock_registers.mclk_pwrmgt_cntl;

sys/dev/pci/drm/radeon/ci_dpm.c

2753

u32 mpll_ad_func_cntl = pi->clock_registers.mpll_ad_func_cntl;

sys/dev/pci/drm/radeon/ci_dpm.c

2754

u32 mpll_dq_func_cntl = pi->clock_registers.mpll_dq_func_cntl;

sys/dev/pci/drm/radeon/ci_dpm.c

2755

u32 mpll_func_cntl = pi->clock_registers.mpll_func_cntl;

sys/dev/pci/drm/radeon/ci_dpm.c

2756

u32 mpll_func_cntl_1 = pi->clock_registers.mpll_func_cntl_1;

sys/dev/pci/drm/radeon/ci_dpm.c

2757

u32 mpll_func_cntl_2 = pi->clock_registers.mpll_func_cntl_2;

sys/dev/pci/drm/radeon/ci_dpm.c

2758

u32 mpll_ss1 = pi->clock_registers.mpll_ss1;

sys/dev/pci/drm/radeon/ci_dpm.c

2759

u32 mpll_ss2 = pi->clock_registers.mpll_ss2;

sys/dev/pci/drm/radeon/ci_dpm.c

277

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

2777

if (pi->mem_gddr5) {

sys/dev/pci/drm/radeon/ci_dpm.c

278

u8 *vid = pi->smc_powertune_table.VddCVid;

sys/dev/pci/drm/radeon/ci_dpm.c

2783

if (pi->caps_mclk_ss_support) {

sys/dev/pci/drm/radeon/ci_dpm.c

281

if (pi->vddc_voltage_table.count > 8)

sys/dev/pci/drm/radeon/ci_dpm.c

2835

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

284

for (i = 0; i < pi->vddc_voltage_table.count; i++)

sys/dev/pci/drm/radeon/ci_dpm.c

285

vid[i] = ci_convert_to_vid(pi->vddc_voltage_table.entries[i].value);

sys/dev/pci/drm/radeon/ci_dpm.c

2865

if (pi->vddc_phase_shed_control)

sys/dev/pci/drm/radeon/ci_dpm.c

2875

memory_level->ActivityLevel = (u16)pi->mclk_activity_target;

sys/dev/pci/drm/radeon/ci_dpm.c

2885

if (pi->mclk_stutter_mode_threshold &&

sys/dev/pci/drm/radeon/ci_dpm.c

2886

(memory_clock <= pi->mclk_stutter_mode_threshold) &&

sys/dev/pci/drm/radeon/ci_dpm.c

2887

(pi->uvd_enabled == false) &&

sys/dev/pci/drm/radeon/ci_dpm.c

2892

if (pi->mclk_strobe_mode_threshold &&

sys/dev/pci/drm/radeon/ci_dpm.c

2893

(memory_clock <= pi->mclk_strobe_mode_threshold))

sys/dev/pci/drm/radeon/ci_dpm.c

2896

if (pi->mem_gddr5) {

sys/dev/pci/drm/radeon/ci_dpm.c

2899

if (pi->mclk_edc_enable_threshold &&

sys/dev/pci/drm/radeon/ci_dpm.c

2900

(memory_clock > pi->mclk_edc_enable_threshold))

sys/dev/pci/drm/radeon/ci_dpm.c

2903

if (pi->mclk_edc_wr_enable_threshold &&

sys/dev/pci/drm/radeon/ci_dpm.c

2904

(memory_clock > pi->mclk_edc_wr_enable_threshold))

sys/dev/pci/drm/radeon/ci_dpm.c

2914

dll_state_on = pi->dll_default_on;

sys/dev/pci/drm/radeon/ci_dpm.c

292

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

293

const struct ci_pt_defaults *pt_defaults = pi->powertune_defaults;

sys/dev/pci/drm/radeon/ci_dpm.c

2948

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

295

pi->smc_powertune_table.SviLoadLineEn = pt_defaults->svi_load_line_en;

sys/dev/pci/drm/radeon/ci_dpm.c

2951

u32 spll_func_cntl = pi->clock_registers.cg_spll_func_cntl;

sys/dev/pci/drm/radeon/ci_dpm.c

2952

u32 spll_func_cntl_2 = pi->clock_registers.cg_spll_func_cntl_2;

sys/dev/pci/drm/radeon/ci_dpm.c

2953

u32 dll_cntl = pi->clock_registers.dll_cntl;

sys/dev/pci/drm/radeon/ci_dpm.c

2954

u32 mclk_pwrmgt_cntl = pi->clock_registers.mclk_pwrmgt_cntl;

sys/dev/pci/drm/radeon/ci_dpm.c

2959

if (pi->acpi_vddc)

sys/dev/pci/drm/radeon/ci_dpm.c

296

pi->smc_powertune_table.SviLoadLineVddC = pt_defaults->svi_load_line_vddc;

sys/dev/pci/drm/radeon/ci_dpm.c

2960

table->ACPILevel.MinVddc = cpu_to_be32(pi->acpi_vddc * VOLTAGE_SCALE);

sys/dev/pci/drm/radeon/ci_dpm.c

2962

table->ACPILevel.MinVddc = cpu_to_be32(pi->min_vddc_in_pp_table * VOLTAGE_SCALE);

sys/dev/pci/drm/radeon/ci_dpm.c

2964

table->ACPILevel.MinVddcPhases = pi->vddc_phase_shed_control ? 0 : 1;

sys/dev/pci/drm/radeon/ci_dpm.c

297

pi->smc_powertune_table.SviLoadLineTrimVddC = 3;

sys/dev/pci/drm/radeon/ci_dpm.c

298

pi->smc_powertune_table.SviLoadLineOffsetVddC = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

2986

table->ACPILevel.CgSpllFuncCntl3 = pi->clock_registers.cg_spll_func_cntl_3;

sys/dev/pci/drm/radeon/ci_dpm.c

2987

table->ACPILevel.CgSpllFuncCntl4 = pi->clock_registers.cg_spll_func_cntl_4;

sys/dev/pci/drm/radeon/ci_dpm.c

2988

table->ACPILevel.SpllSpreadSpectrum = pi->clock_registers.cg_spll_spread_spectrum;

sys/dev/pci/drm/radeon/ci_dpm.c

2989

table->ACPILevel.SpllSpreadSpectrum2 = pi->clock_registers.cg_spll_spread_spectrum_2;

sys/dev/pci/drm/radeon/ci_dpm.c

3008

if (pi->vddci_control != CISLANDS_VOLTAGE_CONTROL_NONE) {

sys/dev/pci/drm/radeon/ci_dpm.c

3009

if (pi->acpi_vddci)

sys/dev/pci/drm/radeon/ci_dpm.c

3011

cpu_to_be32(pi->acpi_vddci * VOLTAGE_SCALE);

sys/dev/pci/drm/radeon/ci_dpm.c

3014

cpu_to_be32(pi->min_vddci_in_pp_table * VOLTAGE_SCALE);

sys/dev/pci/drm/radeon/ci_dpm.c

3031

cpu_to_be32(pi->clock_registers.mpll_ad_func_cntl);

sys/dev/pci/drm/radeon/ci_dpm.c

3033

cpu_to_be32(pi->clock_registers.mpll_dq_func_cntl);

sys/dev/pci/drm/radeon/ci_dpm.c

3035

cpu_to_be32(pi->clock_registers.mpll_func_cntl);

sys/dev/pci/drm/radeon/ci_dpm.c

3037

cpu_to_be32(pi->clock_registers.mpll_func_cntl_1);

sys/dev/pci/drm/radeon/ci_dpm.c

3039

cpu_to_be32(pi->clock_registers.mpll_func_cntl_2);

sys/dev/pci/drm/radeon/ci_dpm.c

3040

table->MemoryACPILevel.MpllSs1 = cpu_to_be32(pi->clock_registers.mpll_ss1);

sys/dev/pci/drm/radeon/ci_dpm.c

3041

table->MemoryACPILevel.MpllSs2 = cpu_to_be32(pi->clock_registers.mpll_ss2);

sys/dev/pci/drm/radeon/ci_dpm.c

3049

cpu_to_be16((u16)pi->mclk_activity_target);

sys/dev/pci/drm/radeon/ci_dpm.c

305

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

306

const struct ci_pt_defaults *pt_defaults = pi->powertune_defaults;

sys/dev/pci/drm/radeon/ci_dpm.c

3063

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

3064

struct ci_ulv_parm *ulv = &pi->ulv;

sys/dev/pci/drm/radeon/ci_dpm.c

3081

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

3088

pi->ulv.supported = false;

sys/dev/pci/drm/radeon/ci_dpm.c

3092

if (pi->voltage_control != CISLANDS_VOLTAGE_CONTROL_BY_SVID2) {

sys/dev/pci/drm/radeon/ci_dpm.c

310

pi->smc_powertune_table.TDC_VDDC_PkgLimit = cpu_to_be16(tdc_limit);

sys/dev/pci/drm/radeon/ci_dpm.c

3106

state->VddcPhase = pi->vddc_phase_shed_control ? 0 : 1;

sys/dev/pci/drm/radeon/ci_dpm.c

311

pi->smc_powertune_table.TDC_VDDC_ThrottleReleaseLimitPerc =

sys/dev/pci/drm/radeon/ci_dpm.c

3119

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

3121

u32 spll_func_cntl_3 = pi->clock_registers.cg_spll_func_cntl_3;

sys/dev/pci/drm/radeon/ci_dpm.c

3122

u32 spll_func_cntl_4 = pi->clock_registers.cg_spll_func_cntl_4;

sys/dev/pci/drm/radeon/ci_dpm.c

3123

u32 cg_spll_spread_spectrum = pi->clock_registers.cg_spll_spread_spectrum;

sys/dev/pci/drm/radeon/ci_dpm.c

3124

u32 cg_spll_spread_spectrum_2 = pi->clock_registers.cg_spll_spread_spectrum_2;

sys/dev/pci/drm/radeon/ci_dpm.c

313

pi->smc_powertune_table.TDC_MAWt = pt_defaults->tdc_mawt;

sys/dev/pci/drm/radeon/ci_dpm.c

3143

if (pi->caps_sclk_ss_support) {

sys/dev/pci/drm/radeon/ci_dpm.c

3176

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

3194

if (pi->vddc_phase_shed_control)

sys/dev/pci/drm/radeon/ci_dpm.c

320

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

321

const struct ci_pt_defaults *pt_defaults = pi->powertune_defaults;

sys/dev/pci/drm/radeon/ci_dpm.c

3210

if (pi->caps_sclk_ds)

sys/dev/pci/drm/radeon/ci_dpm.c

3234

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

3235

struct ci_dpm_table *dpm_table = &pi->dpm_table;

sys/dev/pci/drm/radeon/ci_dpm.c

3236

u32 level_array_address = pi->dpm_table_start +

sys/dev/pci/drm/radeon/ci_dpm.c

3240

SMU7_Discrete_GraphicsLevel *levels = pi->smc_state_table.GraphicsLevel;

sys/dev/pci/drm/radeon/ci_dpm.c

3249

(u16)pi->activity_target[i],

sys/dev/pci/drm/radeon/ci_dpm.c

3250

&pi->smc_state_table.GraphicsLevel[i]);

sys/dev/pci/drm/radeon/ci_dpm.c

3254

pi->smc_state_table.GraphicsLevel[i].DeepSleepDivId = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

3256

pi->smc_state_table.GraphicsLevel[i].DisplayWatermark =

sys/dev/pci/drm/radeon/ci_dpm.c

3259

pi->smc_state_table.GraphicsLevel[0].EnabledForActivity = 1;

sys/dev/pci/drm/radeon/ci_dpm.c

3261

pi->smc_state_table.GraphicsDpmLevelCount = (u8)dpm_table->sclk_table.count;

sys/dev/pci/drm/radeon/ci_dpm.c

3262

pi->dpm_level_enable_mask.sclk_dpm_enable_mask =

sys/dev/pci/drm/radeon/ci_dpm.c

3267

pi->sram_end);

sys/dev/pci/drm/radeon/ci_dpm.c

328

(u32 *)&pi->smc_powertune_table.TdcWaterfallCtl,

sys/dev/pci/drm/radeon/ci_dpm.c

3282

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

3283

struct ci_dpm_table *dpm_table = &pi->dpm_table;

sys/dev/pci/drm/radeon/ci_dpm.c

3284

u32 level_array_address = pi->dpm_table_start +

sys/dev/pci/drm/radeon/ci_dpm.c

3288

SMU7_Discrete_MemoryLevel *levels = pi->smc_state_table.MemoryLevel;

sys/dev/pci/drm/radeon/ci_dpm.c

329

pi->sram_end);

sys/dev/pci/drm/radeon/ci_dpm.c

3299

&pi->smc_state_table.MemoryLevel[i]);

sys/dev/pci/drm/radeon/ci_dpm.c

3304

pi->smc_state_table.MemoryLevel[0].EnabledForActivity = 1;

sys/dev/pci/drm/radeon/ci_dpm.c

3308

pi->smc_state_table.MemoryLevel[1].MinVddc =

sys/dev/pci/drm/radeon/ci_dpm.c

3309

pi->smc_state_table.MemoryLevel[0].MinVddc;

sys/dev/pci/drm/radeon/ci_dpm.c

3310

pi->smc_state_table.MemoryLevel[1].MinVddcPhases =

sys/dev/pci/drm/radeon/ci_dpm.c

3311

pi->smc_state_table.MemoryLevel[0].MinVddcPhases;

sys/dev/pci/drm/radeon/ci_dpm.c

3314

pi->smc_state_table.MemoryLevel[0].ActivityLevel = cpu_to_be16(0x1F);

sys/dev/pci/drm/radeon/ci_dpm.c

3316

pi->smc_state_table.MemoryDpmLevelCount = (u8)dpm_table->mclk_table.count;

sys/dev/pci/drm/radeon/ci_dpm.c

3317

pi->dpm_level_enable_mask.mclk_dpm_enable_mask =

sys/dev/pci/drm/radeon/ci_dpm.c

3320

pi->smc_state_table.MemoryLevel[dpm_table->mclk_table.count - 1].DisplayWatermark =

sys/dev/pci/drm/radeon/ci_dpm.c

3325

pi->sram_end);

sys/dev/pci/drm/radeon/ci_dpm.c

333

pi->smc_powertune_table.TdcWaterfallCtl = pt_defaults->tdc_waterfall_ctl;

sys/dev/pci/drm/radeon/ci_dpm.c

3353

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

3355

if (!pi->use_pcie_performance_levels && !pi->use_pcie_powersaving_levels)

sys/dev/pci/drm/radeon/ci_dpm.c

3358

if (pi->use_pcie_performance_levels && !pi->use_pcie_powersaving_levels) {

sys/dev/pci/drm/radeon/ci_dpm.c

3359

pi->pcie_gen_powersaving = pi->pcie_gen_performance;

sys/dev/pci/drm/radeon/ci_dpm.c

3360

pi->pcie_lane_powersaving = pi->pcie_lane_performance;

sys/dev/pci/drm/radeon/ci_dpm.c

3361

} else if (!pi->use_pcie_performance_levels && pi->use_pcie_powersaving_levels) {

sys/dev/pci/drm/radeon/ci_dpm.c

3362

pi->pcie_gen_performance = pi->pcie_gen_powersaving;

sys/dev/pci/drm/radeon/ci_dpm.c

3363

pi->pcie_lane_performance = pi->pcie_lane_powersaving;

sys/dev/pci/drm/radeon/ci_dpm.c

3367

&pi->dpm_table.pcie_speed_table,

sys/dev/pci/drm/radeon/ci_dpm.c

3371

ci_setup_pcie_table_entry(&pi->dpm_table.pcie_speed_table, 0,

sys/dev/pci/drm/radeon/ci_dpm.c

3372

pi->pcie_gen_powersaving.min,

sys/dev/pci/drm/radeon/ci_dpm.c

3373

pi->pcie_lane_powersaving.max);

sys/dev/pci/drm/radeon/ci_dpm.c

3375

ci_setup_pcie_table_entry(&pi->dpm_table.pcie_speed_table, 0,

sys/dev/pci/drm/radeon/ci_dpm.c

3376

pi->pcie_gen_powersaving.min,

sys/dev/pci/drm/radeon/ci_dpm.c

3377

pi->pcie_lane_powersaving.min);

sys/dev/pci/drm/radeon/ci_dpm.c

3378

ci_setup_pcie_table_entry(&pi->dpm_table.pcie_speed_table, 1,

sys/dev/pci/drm/radeon/ci_dpm.c

3379

pi->pcie_gen_performance.min,

sys/dev/pci/drm/radeon/ci_dpm.c

3380

pi->pcie_lane_performance.min);

sys/dev/pci/drm/radeon/ci_dpm.c

3381

ci_setup_pcie_table_entry(&pi->dpm_table.pcie_speed_table, 2,

sys/dev/pci/drm/radeon/ci_dpm.c

3382

pi->pcie_gen_powersaving.min,

sys/dev/pci/drm/radeon/ci_dpm.c

3383

pi->pcie_lane_powersaving.max);

sys/dev/pci/drm/radeon/ci_dpm.c

3384

ci_setup_pcie_table_entry(&pi->dpm_table.pcie_speed_table, 3,

sys/dev/pci/drm/radeon/ci_dpm.c

3385

pi->pcie_gen_performance.min,

sys/dev/pci/drm/radeon/ci_dpm.c

3386

pi->pcie_lane_performance.max);

sys/dev/pci/drm/radeon/ci_dpm.c

3387

ci_setup_pcie_table_entry(&pi->dpm_table.pcie_speed_table, 4,

sys/dev/pci/drm/radeon/ci_dpm.c

3388

pi->pcie_gen_powersaving.max,

sys/dev/pci/drm/radeon/ci_dpm.c

3389

pi->pcie_lane_powersaving.max);

sys/dev/pci/drm/radeon/ci_dpm.c

3390

ci_setup_pcie_table_entry(&pi->dpm_table.pcie_speed_table, 5,

sys/dev/pci/drm/radeon/ci_dpm.c

3391

pi->pcie_gen_performance.max,

sys/dev/pci/drm/radeon/ci_dpm.c

3392

pi->pcie_lane_performance.max);

sys/dev/pci/drm/radeon/ci_dpm.c

3394

pi->dpm_table.pcie_speed_table.count = 6;

sys/dev/pci/drm/radeon/ci_dpm.c

340

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

3401

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

3415

memset(&pi->dpm_table, 0, sizeof(struct ci_dpm_table));

sys/dev/pci/drm/radeon/ci_dpm.c

3418

&pi->dpm_table.sclk_table,

sys/dev/pci/drm/radeon/ci_dpm.c

3421

&pi->dpm_table.mclk_table,

sys/dev/pci/drm/radeon/ci_dpm.c

3424

&pi->dpm_table.vddc_table,

sys/dev/pci/drm/radeon/ci_dpm.c

3427

&pi->dpm_table.vddci_table,

sys/dev/pci/drm/radeon/ci_dpm.c

3430

&pi->dpm_table.mvdd_table,

sys/dev/pci/drm/radeon/ci_dpm.c

3433

pi->dpm_table.sclk_table.count = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

3436

(pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count-1].value !=

sys/dev/pci/drm/radeon/ci_dpm.c

3438

pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].value =

sys/dev/pci/drm/radeon/ci_dpm.c

3440

pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].enabled =

sys/dev/pci/drm/radeon/ci_dpm.c

3442

pi->dpm_table.sclk_table.count++;

sys/dev/pci/drm/radeon/ci_dpm.c

3446

pi->dpm_table.mclk_table.count = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

3449

(pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count-1].value !=

sys/dev/pci/drm/radeon/ci_dpm.c

3451

pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].value =

sys/dev/pci/drm/radeon/ci_dpm.c

3453

pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].enabled =

sys/dev/pci/drm/radeon/ci_dpm.c

3455

pi->dpm_table.mclk_table.count++;

sys/dev/pci/drm/radeon/ci_dpm.c

3460

pi->dpm_table.vddc_table.dpm_levels[i].value =

sys/dev/pci/drm/radeon/ci_dpm.c

3462

pi->dpm_table.vddc_table.dpm_levels[i].param1 =

sys/dev/pci/drm/radeon/ci_dpm.c

3464

pi->dpm_table.vddc_table.dpm_levels[i].enabled = true;

sys/dev/pci/drm/radeon/ci_dpm.c

3466

pi->dpm_table.vddc_table.count = allowed_sclk_vddc_table->count;

sys/dev/pci/drm/radeon/ci_dpm.c

347

pi->smc_powertune_table.FuzzyFan_PwmSetDelta =

sys/dev/pci/drm/radeon/ci_dpm.c

3470

pi->dpm_table.vddci_table.dpm_levels[i].value =

sys/dev/pci/drm/radeon/ci_dpm.c

3472

pi->dpm_table.vddci_table.dpm_levels[i].enabled = true;

sys/dev/pci/drm/radeon/ci_dpm.c

3474

pi->dpm_table.vddci_table.count = allowed_mclk_table->count;

sys/dev/pci/drm/radeon/ci_dpm.c

3478

pi->dpm_table.mvdd_table.dpm_levels[i].value =

sys/dev/pci/drm/radeon/ci_dpm.c

3480

pi->dpm_table.mvdd_table.dpm_levels[i].enabled = true;

sys/dev/pci/drm/radeon/ci_dpm.c

3482

pi->dpm_table.mvdd_table.count = allowed_mclk_table->count;

sys/dev/pci/drm/radeon/ci_dpm.c

3507

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

3508

struct ci_ulv_parm *ulv = &pi->ulv;

sys/dev/pci/drm/radeon/ci_dpm.c

3510

SMU7_Discrete_DpmTable *table = &pi->smc_state_table;

sys/dev/pci/drm/radeon/ci_dpm.c

3517

if (pi->voltage_control != CISLANDS_VOLTAGE_CONTROL_NONE)

sys/dev/pci/drm/radeon/ci_dpm.c

3528

if (pi->mem_gddr5)

sys/dev/pci/drm/radeon/ci_dpm.c

3532

ret = ci_populate_ulv_state(rdev, &pi->smc_state_table.Ulv);

sys/dev/pci/drm/radeon/ci_dpm.c

355

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

356

u8 *hi_vid = pi->smc_powertune_table.BapmVddCVidHiSidd;

sys/dev/pci/drm/radeon/ci_dpm.c

357

u8 *lo_vid = pi->smc_powertune_table.BapmVddCVidLoSidd;

sys/dev/pci/drm/radeon/ci_dpm.c

3579

ret = ci_find_boot_level(&pi->dpm_table.sclk_table,

sys/dev/pci/drm/radeon/ci_dpm.c

3580

pi->vbios_boot_state.sclk_bootup_value,

sys/dev/pci/drm/radeon/ci_dpm.c

3581

(u32 *)&pi->smc_state_table.GraphicsBootLevel);

sys/dev/pci/drm/radeon/ci_dpm.c

3583

ret = ci_find_boot_level(&pi->dpm_table.mclk_table,

sys/dev/pci/drm/radeon/ci_dpm.c

3584

pi->vbios_boot_state.mclk_bootup_value,

sys/dev/pci/drm/radeon/ci_dpm.c

3585

(u32 *)&pi->smc_state_table.MemoryBootLevel);

sys/dev/pci/drm/radeon/ci_dpm.c

3587

table->BootVddc = pi->vbios_boot_state.vddc_bootup_value;

sys/dev/pci/drm/radeon/ci_dpm.c

3588

table->BootVddci = pi->vbios_boot_state.vddci_bootup_value;

sys/dev/pci/drm/radeon/ci_dpm.c

3589

table->BootMVdd = pi->vbios_boot_state.mvdd_bootup_value;

sys/dev/pci/drm/radeon/ci_dpm.c

3606

table->TemperatureLimitHigh = (u16)((pi->thermal_temp_setting.temperature_high *

sys/dev/pci/drm/radeon/ci_dpm.c

3608

table->TemperatureLimitLow = (u16)((pi->thermal_temp_setting.temperature_low *

sys/dev/pci/drm/radeon/ci_dpm.c

3616

table->PCIeBootLinkLevel = pi->dpm_table.pcie_speed_table.count - 1;

sys/dev/pci/drm/radeon/ci_dpm.c

3618

if (pi->voltage_control == CISLANDS_VOLTAGE_CONTROL_BY_SVID2)

sys/dev/pci/drm/radeon/ci_dpm.c

3642

pi->dpm_table_start +

sys/dev/pci/drm/radeon/ci_dpm.c

3646

pi->sram_end);

sys/dev/pci/drm/radeon/ci_dpm.c

3672

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

3673

struct ci_single_dpm_table *pcie_table = &pi->dpm_table.pcie_speed_table;

sys/dev/pci/drm/radeon/ci_dpm.c

3703

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

3715

&pi->dpm_table.sclk_table,

sys/dev/pci/drm/radeon/ci_dpm.c

3720

&pi->dpm_table.mclk_table,

sys/dev/pci/drm/radeon/ci_dpm.c

3767

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

3772

if (!pi->sclk_dpm_key_disabled) {

sys/dev/pci/drm/radeon/ci_dpm.c

3773

if (pi->dpm_level_enable_mask.sclk_dpm_enable_mask) {

sys/dev/pci/drm/radeon/ci_dpm.c

3776

pi->dpm_level_enable_mask.sclk_dpm_enable_mask);

sys/dev/pci/drm/radeon/ci_dpm.c

3782

if (!pi->mclk_dpm_key_disabled) {

sys/dev/pci/drm/radeon/ci_dpm.c

3783

if (pi->dpm_level_enable_mask.mclk_dpm_enable_mask) {

sys/dev/pci/drm/radeon/ci_dpm.c

3786

pi->dpm_level_enable_mask.mclk_dpm_enable_mask);

sys/dev/pci/drm/radeon/ci_dpm.c

379

pi->smc_powertune_table.GnbLPMLMaxVid = (u8)max;

sys/dev/pci/drm/radeon/ci_dpm.c

3792

if (!pi->pcie_dpm_key_disabled) {

sys/dev/pci/drm/radeon/ci_dpm.c

3793

if (pi->dpm_level_enable_mask.pcie_dpm_enable_mask) {

sys/dev/pci/drm/radeon/ci_dpm.c

3796

pi->dpm_level_enable_mask.pcie_dpm_enable_mask);

sys/dev/pci/drm/radeon/ci_dpm.c

380

pi->smc_powertune_table.GnbLPMLMinVid = (u8)min;

sys/dev/pci/drm/radeon/ci_dpm.c

3808

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

3810

struct ci_single_dpm_table *sclk_table = &pi->dpm_table.sclk_table;

sys/dev/pci/drm/radeon/ci_dpm.c

3812

struct ci_single_dpm_table *mclk_table = &pi->dpm_table.mclk_table;

sys/dev/pci/drm/radeon/ci_dpm.c

3816

pi->need_update_smu7_dpm_table = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

3824

pi->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_SCLK;

sys/dev/pci/drm/radeon/ci_dpm.c

3831

pi->need_update_smu7_dpm_table |= DPMTABLE_UPDATE_SCLK;

sys/dev/pci/drm/radeon/ci_dpm.c

3840

pi->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_MCLK;

sys/dev/pci/drm/radeon/ci_dpm.c

3844

pi->need_update_smu7_dpm_table |= DPMTABLE_UPDATE_MCLK;

sys/dev/pci/drm/radeon/ci_dpm.c

3850

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

3854

struct ci_dpm_table *dpm_table = &pi->dpm_table;

sys/dev/pci/drm/radeon/ci_dpm.c

3857

if (!pi->need_update_smu7_dpm_table)

sys/dev/pci/drm/radeon/ci_dpm.c

3860

if (pi->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_SCLK)

sys/dev/pci/drm/radeon/ci_dpm.c

3863

if (pi->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK)

sys/dev/pci/drm/radeon/ci_dpm.c

3866

if (pi->need_update_smu7_dpm_table & (DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_UPDATE_SCLK)) {

sys/dev/pci/drm/radeon/ci_dpm.c

387

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

3872

if (pi->need_update_smu7_dpm_table & (DPMTABLE_OD_UPDATE_MCLK | DPMTABLE_UPDATE_MCLK)) {

sys/dev/pci/drm/radeon/ci_dpm.c

3883

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

3893

pi->dpm_level_enable_mask.uvd_dpm_enable_mask = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

3897

pi->dpm_level_enable_mask.uvd_dpm_enable_mask |= 1 << i;

sys/dev/pci/drm/radeon/ci_dpm.c

3899

if (!pi->caps_uvd_dpm)

sys/dev/pci/drm/radeon/ci_dpm.c

3906

pi->dpm_level_enable_mask.uvd_dpm_enable_mask);

sys/dev/pci/drm/radeon/ci_dpm.c

3908

if (pi->last_mclk_dpm_enable_mask & 0x1) {

sys/dev/pci/drm/radeon/ci_dpm.c

3909

pi->uvd_enabled = true;

sys/dev/pci/drm/radeon/ci_dpm.c

3910

pi->dpm_level_enable_mask.mclk_dpm_enable_mask &= 0xFFFFFFFE;

sys/dev/pci/drm/radeon/ci_dpm.c

3913

pi->dpm_level_enable_mask.mclk_dpm_enable_mask);

sys/dev/pci/drm/radeon/ci_dpm.c

3916

if (pi->last_mclk_dpm_enable_mask & 0x1) {

sys/dev/pci/drm/radeon/ci_dpm.c

3917

pi->uvd_enabled = false;

sys/dev/pci/drm/radeon/ci_dpm.c

3918

pi->dpm_level_enable_mask.mclk_dpm_enable_mask |= 1;

sys/dev/pci/drm/radeon/ci_dpm.c

3921

pi->dpm_level_enable_mask.mclk_dpm_enable_mask);

sys/dev/pci/drm/radeon/ci_dpm.c

3932

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

3942

pi->dpm_level_enable_mask.vce_dpm_enable_mask = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

3945

pi->dpm_level_enable_mask.vce_dpm_enable_mask |= 1 << i;

sys/dev/pci/drm/radeon/ci_dpm.c

3947

if (!pi->caps_vce_dpm)

sys/dev/pci/drm/radeon/ci_dpm.c

395

pi->smc_powertune_table.BapmVddCBaseLeakageHiSidd = cpu_to_be16(hi_sidd);

sys/dev/pci/drm/radeon/ci_dpm.c

3954

pi->dpm_level_enable_mask.vce_dpm_enable_mask);

sys/dev/pci/drm/radeon/ci_dpm.c

396

pi->smc_powertune_table.BapmVddCBaseLeakageLoSidd = cpu_to_be16(lo_sidd);

sys/dev/pci/drm/radeon/ci_dpm.c

3965

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

3975

pi->dpm_level_enable_mask.samu_dpm_enable_mask = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

3978

pi->dpm_level_enable_mask.samu_dpm_enable_mask |= 1 << i;

sys/dev/pci/drm/radeon/ci_dpm.c

3980

if (!pi->caps_samu_dpm)

sys/dev/pci/drm/radeon/ci_dpm.c

3987

pi->dpm_level_enable_mask.samu_dpm_enable_mask);

sys/dev/pci/drm/radeon/ci_dpm.c

3996

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

4006

pi->dpm_level_enable_mask.acp_dpm_enable_mask = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

4009

pi->dpm_level_enable_mask.acp_dpm_enable_mask |= 1 << i;

sys/dev/pci/drm/radeon/ci_dpm.c

4011

if (!pi->caps_acp_dpm)

sys/dev/pci/drm/radeon/ci_dpm.c

4018

pi->dpm_level_enable_mask.acp_dpm_enable_mask);

sys/dev/pci/drm/radeon/ci_dpm.c

4029

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

403

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

4033

if (pi->caps_uvd_dpm ||

sys/dev/pci/drm/radeon/ci_dpm.c

4035

pi->smc_state_table.UvdBootLevel = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

4037

pi->smc_state_table.UvdBootLevel =

sys/dev/pci/drm/radeon/ci_dpm.c

404

const struct ci_pt_defaults *pt_defaults = pi->powertune_defaults;

sys/dev/pci/drm/radeon/ci_dpm.c

4042

tmp |= UvdBootLevel(pi->smc_state_table.UvdBootLevel);

sys/dev/pci/drm/radeon/ci_dpm.c

405

SMU7_Discrete_DpmTable *dpm_table = &pi->smc_state_table;

sys/dev/pci/drm/radeon/ci_dpm.c

4068

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

4077

pi->smc_state_table.VceBootLevel = ci_get_vce_boot_level(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

4080

tmp |= VceBootLevel(pi->smc_state_table.VceBootLevel);

sys/dev/pci/drm/radeon/ci_dpm.c

4102

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

4106

pi->smc_state_table.AcpBootLevel = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

4110

tmp |= AcpBootLevel(pi->smc_state_table.AcpBootLevel);

sys/dev/pci/drm/radeon/ci_dpm.c

4121

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

4128

pi->dpm_level_enable_mask.sclk_dpm_enable_mask =

sys/dev/pci/drm/radeon/ci_dpm.c

4129

ci_get_dpm_level_enable_mask_value(&pi->dpm_table.sclk_table);

sys/dev/pci/drm/radeon/ci_dpm.c

4130

pi->dpm_level_enable_mask.mclk_dpm_enable_mask =

sys/dev/pci/drm/radeon/ci_dpm.c

4131

ci_get_dpm_level_enable_mask_value(&pi->dpm_table.mclk_table);

sys/dev/pci/drm/radeon/ci_dpm.c

4132

pi->last_mclk_dpm_enable_mask =

sys/dev/pci/drm/radeon/ci_dpm.c

4133

pi->dpm_level_enable_mask.mclk_dpm_enable_mask;

sys/dev/pci/drm/radeon/ci_dpm.c

4134

if (pi->uvd_enabled) {

sys/dev/pci/drm/radeon/ci_dpm.c

4135

if (pi->dpm_level_enable_mask.mclk_dpm_enable_mask & 1)

sys/dev/pci/drm/radeon/ci_dpm.c

4136

pi->dpm_level_enable_mask.mclk_dpm_enable_mask &= 0xFFFFFFFE;

sys/dev/pci/drm/radeon/ci_dpm.c

4138

pi->dpm_level_enable_mask.pcie_dpm_enable_mask =

sys/dev/pci/drm/radeon/ci_dpm.c

4139

ci_get_dpm_level_enable_mask_value(&pi->dpm_table.pcie_speed_table);

sys/dev/pci/drm/radeon/ci_dpm.c

4159

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

416

dpm_table->DTETjOffset = (u8)pi->dte_tj_offset;

sys/dev/pci/drm/radeon/ci_dpm.c

4164

if ((!pi->pcie_dpm_key_disabled) &&

sys/dev/pci/drm/radeon/ci_dpm.c

4165

pi->dpm_level_enable_mask.pcie_dpm_enable_mask) {

sys/dev/pci/drm/radeon/ci_dpm.c

4167

tmp = pi->dpm_level_enable_mask.pcie_dpm_enable_mask;

sys/dev/pci/drm/radeon/ci_dpm.c

418

(u8)(pi->thermal_temp_setting.temperature_high / 1000);

sys/dev/pci/drm/radeon/ci_dpm.c

4183

if ((!pi->sclk_dpm_key_disabled) &&

sys/dev/pci/drm/radeon/ci_dpm.c

4184

pi->dpm_level_enable_mask.sclk_dpm_enable_mask) {

sys/dev/pci/drm/radeon/ci_dpm.c

4186

tmp = pi->dpm_level_enable_mask.sclk_dpm_enable_mask;

sys/dev/pci/drm/radeon/ci_dpm.c

4202

if ((!pi->mclk_dpm_key_disabled) &&

sys/dev/pci/drm/radeon/ci_dpm.c

4203

pi->dpm_level_enable_mask.mclk_dpm_enable_mask) {

sys/dev/pci/drm/radeon/ci_dpm.c

4205

tmp = pi->dpm_level_enable_mask.mclk_dpm_enable_mask;

sys/dev/pci/drm/radeon/ci_dpm.c

4222

if ((!pi->sclk_dpm_key_disabled) &&

sys/dev/pci/drm/radeon/ci_dpm.c

4223

pi->dpm_level_enable_mask.sclk_dpm_enable_mask) {

sys/dev/pci/drm/radeon/ci_dpm.c

4225

pi->dpm_level_enable_mask.sclk_dpm_enable_mask);

sys/dev/pci/drm/radeon/ci_dpm.c

4237

if ((!pi->mclk_dpm_key_disabled) &&

sys/dev/pci/drm/radeon/ci_dpm.c

4238

pi->dpm_level_enable_mask.mclk_dpm_enable_mask) {

sys/dev/pci/drm/radeon/ci_dpm.c

4240

pi->dpm_level_enable_mask.mclk_dpm_enable_mask);

sys/dev/pci/drm/radeon/ci_dpm.c

4252

if ((!pi->pcie_dpm_key_disabled) &&

sys/dev/pci/drm/radeon/ci_dpm.c

4253

pi->dpm_level_enable_mask.pcie_dpm_enable_mask) {

sys/dev/pci/drm/radeon/ci_dpm.c

4255

pi->dpm_level_enable_mask.pcie_dpm_enable_mask);

sys/dev/pci/drm/radeon/ci_dpm.c

4268

if (!pi->pcie_dpm_key_disabled) {

sys/dev/pci/drm/radeon/ci_dpm.c

4289

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

4315

if (!pi->mem_gddr5)

sys/dev/pci/drm/radeon/ci_dpm.c

4322

if (!pi->mem_gddr5) {

sys/dev/pci/drm/radeon/ci_dpm.c

451

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

455

if (pi->caps_power_containment) {

sys/dev/pci/drm/radeon/ci_dpm.c

4576

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

4578

struct ci_mc_reg_table *ci_table = &pi->mc_reg_table;

sys/dev/pci/drm/radeon/ci_dpm.c

459

&pm_fuse_table_offset, pi->sram_end);

sys/dev/pci/drm/radeon/ci_dpm.c

4636

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

4639

for (i = 0, j = 0; j < pi->mc_reg_table.last; j++) {

sys/dev/pci/drm/radeon/ci_dpm.c

4640

if (pi->mc_reg_table.valid_flag & (1 << j)) {

sys/dev/pci/drm/radeon/ci_dpm.c

4643

mc_reg_table->address[i].s0 = cpu_to_be16(pi->mc_reg_table.mc_reg_address[j].s0);

sys/dev/pci/drm/radeon/ci_dpm.c

4644

mc_reg_table->address[i].s1 = cpu_to_be16(pi->mc_reg_table.mc_reg_address[j].s1);

sys/dev/pci/drm/radeon/ci_dpm.c

4672

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

4675

for (i = 0; i < pi->mc_reg_table.num_entries; i++) {

sys/dev/pci/drm/radeon/ci_dpm.c

4676

if (memory_clock <= pi->mc_reg_table.mc_reg_table_entry[i].mclk_max)

sys/dev/pci/drm/radeon/ci_dpm.c

4680

if ((i == pi->mc_reg_table.num_entries) && (i > 0))

sys/dev/pci/drm/radeon/ci_dpm.c

4683

ci_convert_mc_registers(&pi->mc_reg_table.mc_reg_table_entry[i],

sys/dev/pci/drm/radeon/ci_dpm.c

4684

mc_reg_table_data, pi->mc_reg_table.last,

sys/dev/pci/drm/radeon/ci_dpm.c

4685

pi->mc_reg_table.valid_flag);

sys/dev/pci/drm/radeon/ci_dpm.c

4691

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

4694

for (i = 0; i < pi->dpm_table.mclk_table.count; i++)

sys/dev/pci/drm/radeon/ci_dpm.c

4696

pi->dpm_table.mclk_table.dpm_levels[i].value,

sys/dev/pci/drm/radeon/ci_dpm.c

4702

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

4705

memset(&pi->smc_mc_reg_table, 0, sizeof(SMU7_Discrete_MCRegisters));

sys/dev/pci/drm/radeon/ci_dpm.c

4707

ret = ci_populate_mc_reg_addresses(rdev, &pi->smc_mc_reg_table);

sys/dev/pci/drm/radeon/ci_dpm.c

4710

ci_convert_mc_reg_table_to_smc(rdev, &pi->smc_mc_reg_table);

sys/dev/pci/drm/radeon/ci_dpm.c

4713

pi->mc_reg_table_start,

sys/dev/pci/drm/radeon/ci_dpm.c

4714

(u8 *)&pi->smc_mc_reg_table,

sys/dev/pci/drm/radeon/ci_dpm.c

4716

pi->sram_end);

sys/dev/pci/drm/radeon/ci_dpm.c

4721

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

4723

if (!(pi->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK))

sys/dev/pci/drm/radeon/ci_dpm.c

4726

memset(&pi->smc_mc_reg_table, 0, sizeof(SMU7_Discrete_MCRegisters));

sys/dev/pci/drm/radeon/ci_dpm.c

4728

ci_convert_mc_reg_table_to_smc(rdev, &pi->smc_mc_reg_table);

sys/dev/pci/drm/radeon/ci_dpm.c

4731

pi->mc_reg_table_start +

sys/dev/pci/drm/radeon/ci_dpm.c

4733

(u8 *)&pi->smc_mc_reg_table.data[0],

sys/dev/pci/drm/radeon/ci_dpm.c

4735

pi->dpm_table.mclk_table.count,

sys/dev/pci/drm/radeon/ci_dpm.c

4736

pi->sram_end);

sys/dev/pci/drm/radeon/ci_dpm.c

4803

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

4808

if (pi->force_pcie_gen == RADEON_PCIE_GEN_INVALID)

sys/dev/pci/drm/radeon/ci_dpm.c

4811

current_link_speed = pi->force_pcie_gen;

sys/dev/pci/drm/radeon/ci_dpm.c

4813

pi->force_pcie_gen = RADEON_PCIE_GEN_INVALID;

sys/dev/pci/drm/radeon/ci_dpm.c

4814

pi->pspp_notify_required = false;

sys/dev/pci/drm/radeon/ci_dpm.c

4821

pi->force_pcie_gen = RADEON_PCIE_GEN2;

sys/dev/pci/drm/radeon/ci_dpm.c

4831

pi->force_pcie_gen = ci_get_current_pcie_speed(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

4836

pi->pspp_notify_required = true;

sys/dev/pci/drm/radeon/ci_dpm.c

4844

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

4849

if (pi->pspp_notify_required) {

sys/dev/pci/drm/radeon/ci_dpm.c

4869

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

487

(u8 *)&pi->smc_powertune_table,

sys/dev/pci/drm/radeon/ci_dpm.c

488

sizeof(SMU7_Discrete_PmFuses), pi->sram_end);

sys/dev/pci/drm/radeon/ci_dpm.c

4884

pi->min_vddc_in_pp_table = allowed_sclk_vddc_table->entries[0].v;

sys/dev/pci/drm/radeon/ci_dpm.c

4885

pi->max_vddc_in_pp_table =

sys/dev/pci/drm/radeon/ci_dpm.c

4888

pi->min_vddci_in_pp_table = allowed_mclk_vddci_table->entries[0].v;

sys/dev/pci/drm/radeon/ci_dpm.c

4889

pi->max_vddci_in_pp_table =

sys/dev/pci/drm/radeon/ci_dpm.c

4906

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

4907

struct ci_leakage_voltage *leakage_table = &pi->vddc_leakage;

sys/dev/pci/drm/radeon/ci_dpm.c

4920

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

4921

struct ci_leakage_voltage *leakage_table = &pi->vddci_leakage;

sys/dev/pci/drm/radeon/ci_dpm.c

498

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

501

if (pi->caps_sq_ramping) {

sys/dev/pci/drm/radeon/ci_dpm.c

5039

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

5046

pi->mem_gddr5 = true;

sys/dev/pci/drm/radeon/ci_dpm.c

5048

pi->mem_gddr5 = false;

sys/dev/pci/drm/radeon/ci_dpm.c

5056

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

5058

pi->current_rps = *rps;

sys/dev/pci/drm/radeon/ci_dpm.c

5059

pi->current_ps = *new_ps;

sys/dev/pci/drm/radeon/ci_dpm.c

5060

pi->current_rps.ps_priv = &pi->current_ps;

sys/dev/pci/drm/radeon/ci_dpm.c

5067

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

5069

pi->requested_rps = *rps;

sys/dev/pci/drm/radeon/ci_dpm.c

5070

pi->requested_ps = *new_ps;

sys/dev/pci/drm/radeon/ci_dpm.c

5071

pi->requested_rps.ps_priv = &pi->requested_ps;

sys/dev/pci/drm/radeon/ci_dpm.c

5076

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

5082

ci_apply_state_adjust_rules(rdev, &pi->requested_rps);

sys/dev/pci/drm/radeon/ci_dpm.c

5089

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

5090

struct radeon_ps *new_ps = &pi->requested_rps;

sys/dev/pci/drm/radeon/ci_dpm.c

510

if (pi->caps_db_ramping) {

sys/dev/pci/drm/radeon/ci_dpm.c

5111

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

5117

if (pi->voltage_control != CISLANDS_VOLTAGE_CONTROL_NONE) {

sys/dev/pci/drm/radeon/ci_dpm.c

5125

if (pi->caps_dynamic_ac_timing) {

sys/dev/pci/drm/radeon/ci_dpm.c

5128

pi->caps_dynamic_ac_timing = false;

sys/dev/pci/drm/radeon/ci_dpm.c

5130

if (pi->dynamic_ss)

sys/dev/pci/drm/radeon/ci_dpm.c

5132

if (pi->thermal_protection)

sys/dev/pci/drm/radeon/ci_dpm.c

5162

if (pi->caps_dynamic_ac_timing) {

sys/dev/pci/drm/radeon/ci_dpm.c

519

if (pi->caps_td_ramping) {

sys/dev/pci/drm/radeon/ci_dpm.c

5266

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

5276

if (pi->thermal_protection)

sys/dev/pci/drm/radeon/ci_dpm.c

528

if (pi->caps_tcp_ramping) {

sys/dev/pci/drm/radeon/ci_dpm.c

5297

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

5298

struct radeon_ps *new_ps = &pi->requested_rps;

sys/dev/pci/drm/radeon/ci_dpm.c

5299

struct radeon_ps *old_ps = &pi->current_rps;

sys/dev/pci/drm/radeon/ci_dpm.c

5303

if (pi->pcie_performance_request)

sys/dev/pci/drm/radeon/ci_dpm.c

5332

if (pi->caps_dynamic_ac_timing) {

sys/dev/pci/drm/radeon/ci_dpm.c

5354

if (pi->pcie_performance_request)

sys/dev/pci/drm/radeon/ci_dpm.c

5422

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

5434

pi->sys_pcie_mask,

sys/dev/pci/drm/radeon/ci_dpm.c

5435

pi->vbios_boot_state.pcie_gen_bootup_value,

sys/dev/pci/drm/radeon/ci_dpm.c

5438

pi->vbios_boot_state.pcie_lane_bootup_value,

sys/dev/pci/drm/radeon/ci_dpm.c

5442

pi->acpi_pcie_gen = pl->pcie_gen;

sys/dev/pci/drm/radeon/ci_dpm.c

5446

pi->ulv.supported = true;

sys/dev/pci/drm/radeon/ci_dpm.c

5447

pi->ulv.pl = *pl;

sys/dev/pci/drm/radeon/ci_dpm.c

5448

pi->ulv.cg_ulv_parameter = CISLANDS_CGULVPARAMETER_DFLT;

sys/dev/pci/drm/radeon/ci_dpm.c

5453

pl->mclk = pi->vbios_boot_state.mclk_bootup_value;

sys/dev/pci/drm/radeon/ci_dpm.c

5454

pl->sclk = pi->vbios_boot_state.sclk_bootup_value;

sys/dev/pci/drm/radeon/ci_dpm.c

5455

pl->pcie_gen = pi->vbios_boot_state.pcie_gen_bootup_value;

sys/dev/pci/drm/radeon/ci_dpm.c

5456

pl->pcie_lane = pi->vbios_boot_state.pcie_lane_bootup_value;

sys/dev/pci/drm/radeon/ci_dpm.c

5461

pi->use_pcie_powersaving_levels = true;

sys/dev/pci/drm/radeon/ci_dpm.c

5462

if (pi->pcie_gen_powersaving.max < pl->pcie_gen)

sys/dev/pci/drm/radeon/ci_dpm.c

5463

pi->pcie_gen_powersaving.max = pl->pcie_gen;

sys/dev/pci/drm/radeon/ci_dpm.c

5464

if (pi->pcie_gen_powersaving.min > pl->pcie_gen)

sys/dev/pci/drm/radeon/ci_dpm.c

5465

pi->pcie_gen_powersaving.min = pl->pcie_gen;

sys/dev/pci/drm/radeon/ci_dpm.c

5466

if (pi->pcie_lane_powersaving.max < pl->pcie_lane)

sys/dev/pci/drm/radeon/ci_dpm.c

5467

pi->pcie_lane_powersaving.max = pl->pcie_lane;

sys/dev/pci/drm/radeon/ci_dpm.c

5468

if (pi->pcie_lane_powersaving.min > pl->pcie_lane)

sys/dev/pci/drm/radeon/ci_dpm.c

5469

pi->pcie_lane_powersaving.min = pl->pcie_lane;

sys/dev/pci/drm/radeon/ci_dpm.c

5472

pi->use_pcie_performance_levels = true;

sys/dev/pci/drm/radeon/ci_dpm.c

5473

if (pi->pcie_gen_performance.max < pl->pcie_gen)

sys/dev/pci/drm/radeon/ci_dpm.c

5474

pi->pcie_gen_performance.max = pl->pcie_gen;

sys/dev/pci/drm/radeon/ci_dpm.c

5475

if (pi->pcie_gen_performance.min > pl->pcie_gen)

sys/dev/pci/drm/radeon/ci_dpm.c

5476

pi->pcie_gen_performance.min = pl->pcie_gen;

sys/dev/pci/drm/radeon/ci_dpm.c

5477

if (pi->pcie_lane_performance.max < pl->pcie_lane)

sys/dev/pci/drm/radeon/ci_dpm.c

5478

pi->pcie_lane_performance.max = pl->pcie_lane;

sys/dev/pci/drm/radeon/ci_dpm.c

5479

if (pi->pcie_lane_performance.min > pl->pcie_lane)

sys/dev/pci/drm/radeon/ci_dpm.c

5480

pi->pcie_lane_performance.min = pl->pcie_lane;

sys/dev/pci/drm/radeon/ci_dpm.c

5636

struct ci_power_info *pi;

sys/dev/pci/drm/radeon/ci_dpm.c

5641

pi = kzalloc(sizeof(struct ci_power_info), GFP_KERNEL);

sys/dev/pci/drm/radeon/ci_dpm.c

5642

if (pi == NULL)

sys/dev/pci/drm/radeon/ci_dpm.c

5644

rdev->pm.dpm.priv = pi;

sys/dev/pci/drm/radeon/ci_dpm.c

5649

pi->sys_pcie_mask = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

5652

pi->sys_pcie_mask = RADEON_PCIE_SPEED_25 |

sys/dev/pci/drm/radeon/ci_dpm.c

5656

pi->sys_pcie_mask = RADEON_PCIE_SPEED_25 |

sys/dev/pci/drm/radeon/ci_dpm.c

5659

pi->sys_pcie_mask = RADEON_PCIE_SPEED_25;

sys/dev/pci/drm/radeon/ci_dpm.c

5661

pi->force_pcie_gen = RADEON_PCIE_GEN_INVALID;

sys/dev/pci/drm/radeon/ci_dpm.c

5663

pi->pcie_gen_performance.max = RADEON_PCIE_GEN1;

sys/dev/pci/drm/radeon/ci_dpm.c

5664

pi->pcie_gen_performance.min = RADEON_PCIE_GEN3;

sys/dev/pci/drm/radeon/ci_dpm.c

5665

pi->pcie_gen_powersaving.max = RADEON_PCIE_GEN1;

sys/dev/pci/drm/radeon/ci_dpm.c

5666

pi->pcie_gen_powersaving.min = RADEON_PCIE_GEN3;

sys/dev/pci/drm/radeon/ci_dpm.c

5668

pi->pcie_lane_performance.max = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

5669

pi->pcie_lane_performance.min = 16;

sys/dev/pci/drm/radeon/ci_dpm.c

5670

pi->pcie_lane_powersaving.max = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

5671

pi->pcie_lane_powersaving.min = 16;

sys/dev/pci/drm/radeon/ci_dpm.c

5673

ret = ci_get_vbios_boot_values(rdev, &pi->vbios_boot_state);

sys/dev/pci/drm/radeon/ci_dpm.c

5698

pi->dll_default_on = false;

sys/dev/pci/drm/radeon/ci_dpm.c

5699

pi->sram_end = SMC_RAM_END;

sys/dev/pci/drm/radeon/ci_dpm.c

5701

pi->activity_target[0] = CISLAND_TARGETACTIVITY_DFLT;

sys/dev/pci/drm/radeon/ci_dpm.c

5702

pi->activity_target[1] = CISLAND_TARGETACTIVITY_DFLT;

sys/dev/pci/drm/radeon/ci_dpm.c

5703

pi->activity_target[2] = CISLAND_TARGETACTIVITY_DFLT;

sys/dev/pci/drm/radeon/ci_dpm.c

5704

pi->activity_target[3] = CISLAND_TARGETACTIVITY_DFLT;

sys/dev/pci/drm/radeon/ci_dpm.c

5705

pi->activity_target[4] = CISLAND_TARGETACTIVITY_DFLT;

sys/dev/pci/drm/radeon/ci_dpm.c

5706

pi->activity_target[5] = CISLAND_TARGETACTIVITY_DFLT;

sys/dev/pci/drm/radeon/ci_dpm.c

5707

pi->activity_target[6] = CISLAND_TARGETACTIVITY_DFLT;

sys/dev/pci/drm/radeon/ci_dpm.c

5708

pi->activity_target[7] = CISLAND_TARGETACTIVITY_DFLT;

sys/dev/pci/drm/radeon/ci_dpm.c

5710

pi->mclk_activity_target = CISLAND_MCLK_TARGETACTIVITY_DFLT;

sys/dev/pci/drm/radeon/ci_dpm.c

5712

pi->sclk_dpm_key_disabled = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

5713

pi->mclk_dpm_key_disabled = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

5714

pi->pcie_dpm_key_disabled = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

5715

pi->thermal_sclk_dpm_enabled = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

5720

pi->mclk_dpm_key_disabled = 1;

sys/dev/pci/drm/radeon/ci_dpm.c

5723

pi->caps_sclk_ds = true;

sys/dev/pci/drm/radeon/ci_dpm.c

5725

pi->mclk_strobe_mode_threshold = 40000;

sys/dev/pci/drm/radeon/ci_dpm.c

5726

pi->mclk_stutter_mode_threshold = 40000;

sys/dev/pci/drm/radeon/ci_dpm.c

5727

pi->mclk_edc_enable_threshold = 40000;

sys/dev/pci/drm/radeon/ci_dpm.c

5728

pi->mclk_edc_wr_enable_threshold = 40000;

sys/dev/pci/drm/radeon/ci_dpm.c

5732

pi->caps_fps = false;

sys/dev/pci/drm/radeon/ci_dpm.c

5734

pi->caps_sclk_throttle_low_notification = false;

sys/dev/pci/drm/radeon/ci_dpm.c

5736

pi->caps_uvd_dpm = true;

sys/dev/pci/drm/radeon/ci_dpm.c

5737

pi->caps_vce_dpm = true;

sys/dev/pci/drm/radeon/ci_dpm.c

5771

pi->thermal_temp_setting.temperature_low = 94500;

sys/dev/pci/drm/radeon/ci_dpm.c

5772

pi->thermal_temp_setting.temperature_high = 95000;

sys/dev/pci/drm/radeon/ci_dpm.c

5773

pi->thermal_temp_setting.temperature_shutdown = 104000;

sys/dev/pci/drm/radeon/ci_dpm.c

5775

pi->thermal_temp_setting.temperature_low = 99500;

sys/dev/pci/drm/radeon/ci_dpm.c

5776

pi->thermal_temp_setting.temperature_high = 100000;

sys/dev/pci/drm/radeon/ci_dpm.c

5777

pi->thermal_temp_setting.temperature_shutdown = 104000;

sys/dev/pci/drm/radeon/ci_dpm.c

5780

pi->uvd_enabled = false;

sys/dev/pci/drm/radeon/ci_dpm.c

5782

dpm_table = &pi->smc_state_table;

sys/dev/pci/drm/radeon/ci_dpm.c

5831

pi->voltage_control = CISLANDS_VOLTAGE_CONTROL_NONE;

sys/dev/pci/drm/radeon/ci_dpm.c

5832

pi->vddci_control = CISLANDS_VOLTAGE_CONTROL_NONE;

sys/dev/pci/drm/radeon/ci_dpm.c

5833

pi->mvdd_control = CISLANDS_VOLTAGE_CONTROL_NONE;

sys/dev/pci/drm/radeon/ci_dpm.c

5835

pi->voltage_control = CISLANDS_VOLTAGE_CONTROL_BY_GPIO;

sys/dev/pci/drm/radeon/ci_dpm.c

5837

pi->voltage_control = CISLANDS_VOLTAGE_CONTROL_BY_SVID2;

sys/dev/pci/drm/radeon/ci_dpm.c

5841

pi->vddci_control = CISLANDS_VOLTAGE_CONTROL_BY_GPIO;

sys/dev/pci/drm/radeon/ci_dpm.c

5843

pi->vddci_control = CISLANDS_VOLTAGE_CONTROL_BY_SVID2;

sys/dev/pci/drm/radeon/ci_dpm.c

5850

pi->mvdd_control = CISLANDS_VOLTAGE_CONTROL_BY_GPIO;

sys/dev/pci/drm/radeon/ci_dpm.c

5852

pi->mvdd_control = CISLANDS_VOLTAGE_CONTROL_BY_SVID2;

sys/dev/pci/drm/radeon/ci_dpm.c

5857

pi->vddc_phase_shed_control = true;

sys/dev/pci/drm/radeon/ci_dpm.c

5860

pi->pcie_performance_request =

sys/dev/pci/drm/radeon/ci_dpm.c

5863

pi->pcie_performance_request = false;

sys/dev/pci/drm/radeon/ci_dpm.c

5868

pi->caps_sclk_ss_support = true;

sys/dev/pci/drm/radeon/ci_dpm.c

5869

pi->caps_mclk_ss_support = true;

sys/dev/pci/drm/radeon/ci_dpm.c

5870

pi->dynamic_ss = true;

sys/dev/pci/drm/radeon/ci_dpm.c

5872

pi->caps_sclk_ss_support = false;

sys/dev/pci/drm/radeon/ci_dpm.c

5873

pi->caps_mclk_ss_support = false;

sys/dev/pci/drm/radeon/ci_dpm.c

5874

pi->dynamic_ss = true;

sys/dev/pci/drm/radeon/ci_dpm.c

5878

pi->thermal_protection = true;

sys/dev/pci/drm/radeon/ci_dpm.c

588

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

5880

pi->thermal_protection = false;

sys/dev/pci/drm/radeon/ci_dpm.c

5882

pi->caps_dynamic_ac_timing = true;

sys/dev/pci/drm/radeon/ci_dpm.c

5884

pi->uvd_power_gated = false;

sys/dev/pci/drm/radeon/ci_dpm.c

5892

pi->fan_ctrl_is_in_default_mode = true;

sys/dev/pci/drm/radeon/ci_dpm.c

5900

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

5901

struct radeon_ps *rps = &pi->current_rps;

sys/dev/pci/drm/radeon/ci_dpm.c

5905

seq_printf(m, "uvd %sabled\n", pi->uvd_enabled ? "en" : "dis");

sys/dev/pci/drm/radeon/ci_dpm.c

591

if (pi->caps_sq_ramping || pi->caps_db_ramping ||

sys/dev/pci/drm/radeon/ci_dpm.c

592

pi->caps_td_ramping || pi->caps_tcp_ramping) {

sys/dev/pci/drm/radeon/ci_dpm.c

5945

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

5946

struct ci_ps *requested_state = ci_get_ps(&pi->requested_rps);

sys/dev/pci/drm/radeon/ci_dpm.c

5956

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

5957

struct ci_ps *requested_state = ci_get_ps(&pi->requested_rps);

sys/dev/pci/drm/radeon/ci_dpm.c

613

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

618

pi->power_containment_features = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

619

if (pi->caps_power_containment) {

sys/dev/pci/drm/radeon/ci_dpm.c

620

if (pi->enable_bapm_feature) {

sys/dev/pci/drm/radeon/ci_dpm.c

625

pi->power_containment_features |= POWERCONTAINMENT_FEATURE_BAPM;

sys/dev/pci/drm/radeon/ci_dpm.c

628

if (pi->enable_tdc_limit_feature) {

sys/dev/pci/drm/radeon/ci_dpm.c

633

pi->power_containment_features |= POWERCONTAINMENT_FEATURE_TDCLimit;

sys/dev/pci/drm/radeon/ci_dpm.c

636

if (pi->enable_pkg_pwr_tracking_feature) {

sys/dev/pci/drm/radeon/ci_dpm.c

646

pi->power_containment_features |= POWERCONTAINMENT_FEATURE_PkgPwrLimit;

sys/dev/pci/drm/radeon/ci_dpm.c

653

if (pi->caps_power_containment && pi->power_containment_features) {

sys/dev/pci/drm/radeon/ci_dpm.c

654

if (pi->power_containment_features & POWERCONTAINMENT_FEATURE_TDCLimit)

sys/dev/pci/drm/radeon/ci_dpm.c

657

if (pi->power_containment_features & POWERCONTAINMENT_FEATURE_BAPM)

sys/dev/pci/drm/radeon/ci_dpm.c

660

if (pi->power_containment_features & POWERCONTAINMENT_FEATURE_PkgPwrLimit)

sys/dev/pci/drm/radeon/ci_dpm.c

662

pi->power_containment_features = 0;

sys/dev/pci/drm/radeon/ci_dpm.c

671

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

675

if (pi->caps_cac) {

sys/dev/pci/drm/radeon/ci_dpm.c

680

pi->cac_enabled = false;

sys/dev/pci/drm/radeon/ci_dpm.c

682

pi->cac_enabled = true;

sys/dev/pci/drm/radeon/ci_dpm.c

684

} else if (pi->cac_enabled) {

sys/dev/pci/drm/radeon/ci_dpm.c

686

pi->cac_enabled = false;

sys/dev/pci/drm/radeon/ci_dpm.c

696

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

699

if (pi->thermal_sclk_dpm_enabled) {

sys/dev/pci/drm/radeon/ci_dpm.c

714

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

722

if (pi->caps_power_containment) {

sys/dev/pci/drm/radeon/ci_dpm.c

736

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

738

if (pi->uvd_power_gated == gate)

sys/dev/pci/drm/radeon/ci_dpm.c

741

pi->uvd_power_gated = gate;

sys/dev/pci/drm/radeon/ci_dpm.c

748

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

750

u32 switch_limit = pi->mem_gddr5 ? 450 : 300;

sys/dev/pci/drm/radeon/ci_dpm.c

769

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

790

pi->battery_state = true;

sys/dev/pci/drm/radeon/ci_dpm.c

792

pi->battery_state = false;

sys/dev/pci/drm/radeon/ci_dpm.c

907

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

910

if (pi->fan_ctrl_is_in_default_mode) {

sys/dev/pci/drm/radeon/ci_dpm.c

912

pi->fan_ctrl_default_mode = tmp;

sys/dev/pci/drm/radeon/ci_dpm.c

914

pi->t_min = tmp;

sys/dev/pci/drm/radeon/ci_dpm.c

915

pi->fan_ctrl_is_in_default_mode = false;

sys/dev/pci/drm/radeon/ci_dpm.c

929

struct ci_power_info *pi = ci_get_pi(rdev);

sys/dev/pci/drm/radeon/ci_dpm.c

938

if (!pi->fan_table_start) {

sys/dev/pci/drm/radeon/ci_dpm.c

991

pi->fan_table_start,

sys/dev/pci/drm/radeon/ci_dpm.c

994

pi->sram_end);

sys/dev/pci/drm/radeon/cypress_dpm.c

101

if (pi->gfx_clock_gating) {

sys/dev/pci/drm/radeon/cypress_dpm.c

1075

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/cypress_dpm.c

1081

pi->mem_gddr5,

sys/dev/pci/drm/radeon/cypress_dpm.c

1242

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/cypress_dpm.c

1247

cpu_to_be32(pi->clk_regs.rv770.mpll_ad_func_cntl);

sys/dev/pci/drm/radeon/cypress_dpm.c

1249

cpu_to_be32(pi->clk_regs.rv770.mpll_ad_func_cntl_2);

sys/dev/pci/drm/radeon/cypress_dpm.c

1251

cpu_to_be32(pi->clk_regs.rv770.mpll_dq_func_cntl);

sys/dev/pci/drm/radeon/cypress_dpm.c

1253

cpu_to_be32(pi->clk_regs.rv770.mpll_dq_func_cntl_2);

sys/dev/pci/drm/radeon/cypress_dpm.c

1255

cpu_to_be32(pi->clk_regs.rv770.mclk_pwrmgt_cntl);

sys/dev/pci/drm/radeon/cypress_dpm.c

1257

cpu_to_be32(pi->clk_regs.rv770.dll_cntl);

sys/dev/pci/drm/radeon/cypress_dpm.c

1260

cpu_to_be32(pi->clk_regs.rv770.mpll_ss1);

sys/dev/pci/drm/radeon/cypress_dpm.c

1262

cpu_to_be32(pi->clk_regs.rv770.mpll_ss2);

sys/dev/pci/drm/radeon/cypress_dpm.c

1268

cpu_to_be32(pi->clk_regs.rv770.cg_spll_func_cntl);

sys/dev/pci/drm/radeon/cypress_dpm.c

1270

cpu_to_be32(pi->clk_regs.rv770.cg_spll_func_cntl_2);

sys/dev/pci/drm/radeon/cypress_dpm.c

1272

cpu_to_be32(pi->clk_regs.rv770.cg_spll_func_cntl_3);

sys/dev/pci/drm/radeon/cypress_dpm.c

1274

cpu_to_be32(pi->clk_regs.rv770.cg_spll_spread_spectrum);

sys/dev/pci/drm/radeon/cypress_dpm.c

1276

cpu_to_be32(pi->clk_regs.rv770.cg_spll_spread_spectrum_2);

sys/dev/pci/drm/radeon/cypress_dpm.c

1302

table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp);

sys/dev/pci/drm/radeon/cypress_dpm.c

1305

if (pi->boot_in_gen2)

sys/dev/pci/drm/radeon/cypress_dpm.c

1314

if (pi->mem_gddr5) {

sys/dev/pci/drm/radeon/cypress_dpm.c

1319

if (initial_state->low.mclk > pi->mclk_edc_enable_threshold)

sys/dev/pci/drm/radeon/cypress_dpm.c

1336

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/cypress_dpm.c

1339

pi->clk_regs.rv770.mpll_ad_func_cntl;

sys/dev/pci/drm/radeon/cypress_dpm.c

1341

pi->clk_regs.rv770.mpll_ad_func_cntl_2;

sys/dev/pci/drm/radeon/cypress_dpm.c

1343

pi->clk_regs.rv770.mpll_dq_func_cntl;

sys/dev/pci/drm/radeon/cypress_dpm.c

1345

pi->clk_regs.rv770.mpll_dq_func_cntl_2;

sys/dev/pci/drm/radeon/cypress_dpm.c

1347

pi->clk_regs.rv770.cg_spll_func_cntl;

sys/dev/pci/drm/radeon/cypress_dpm.c

1349

pi->clk_regs.rv770.cg_spll_func_cntl_2;

sys/dev/pci/drm/radeon/cypress_dpm.c

1351

pi->clk_regs.rv770.cg_spll_func_cntl_3;

sys/dev/pci/drm/radeon/cypress_dpm.c

1353

pi->clk_regs.rv770.mclk_pwrmgt_cntl;

sys/dev/pci/drm/radeon/cypress_dpm.c

1355

pi->clk_regs.rv770.dll_cntl;

sys/dev/pci/drm/radeon/cypress_dpm.c

1361

if (pi->acpi_vddc) {

sys/dev/pci/drm/radeon/cypress_dpm.c

1364

pi->acpi_vddc,

sys/dev/pci/drm/radeon/cypress_dpm.c

1366

if (pi->pcie_gen2) {

sys/dev/pci/drm/radeon/cypress_dpm.c

1367

if (pi->acpi_pcie_gen2)

sys/dev/pci/drm/radeon/cypress_dpm.c

1373

if (pi->acpi_pcie_gen2)

sys/dev/pci/drm/radeon/cypress_dpm.c

1380

pi->min_vddc_in_table,

sys/dev/pci/drm/radeon/cypress_dpm.c

1398

if (pi->mem_gddr5)

sys/dev/pci/drm/radeon/cypress_dpm.c

1529

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/cypress_dpm.c

1543

if (pi->max_vddc_in_table <=

sys/dev/pci/drm/radeon/cypress_dpm.c

1575

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/cypress_dpm.c

1584

pi->mvdd_control = false;

sys/dev/pci/drm/radeon/cypress_dpm.c

1599

pi->mvdd_control = false;

sys/dev/pci/drm/radeon/cypress_dpm.c

1603

pi->mvdd_split_frequency =

sys/dev/pci/drm/radeon/cypress_dpm.c

1606

if (pi->mvdd_split_frequency == 0) {

sys/dev/pci/drm/radeon/cypress_dpm.c

1607

pi->mvdd_control = false;

sys/dev/pci/drm/radeon/cypress_dpm.c

1617

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/cypress_dpm.c

1618

RV770_SMC_STATETABLE *table = &pi->smc_statetable;

sys/dev/pci/drm/radeon/cypress_dpm.c

1647

if (pi->mem_gddr5)

sys/dev/pci/drm/radeon/cypress_dpm.c

1661

pi->state_table_start,

sys/dev/pci/drm/radeon/cypress_dpm.c

1663

pi->sram_end);

sys/dev/pci/drm/radeon/cypress_dpm.c

1669

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/cypress_dpm.c

1691

pi->sram_end);

sys/dev/pci/drm/radeon/cypress_dpm.c

1696

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/cypress_dpm.c

1704

&tmp, pi->sram_end);

sys/dev/pci/drm/radeon/cypress_dpm.c

1708

pi->state_table_start = (u16)tmp;

sys/dev/pci/drm/radeon/cypress_dpm.c

1713

&tmp, pi->sram_end);

sys/dev/pci/drm/radeon/cypress_dpm.c

1717

pi->soft_regs_start = (u16)tmp;

sys/dev/pci/drm/radeon/cypress_dpm.c

1722

&tmp, pi->sram_end);

sys/dev/pci/drm/radeon/cypress_dpm.c

173

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/cypress_dpm.c

1808

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/cypress_dpm.c

1813

if (pi->gfx_clock_gating)

sys/dev/pci/drm/radeon/cypress_dpm.c

1819

if (pi->voltage_control) {

sys/dev/pci/drm/radeon/cypress_dpm.c

1828

if (pi->mvdd_control) {

sys/dev/pci/drm/radeon/cypress_dpm.c

1848

if (pi->dynamic_ss)

sys/dev/pci/drm/radeon/cypress_dpm.c

1851

if (pi->thermal_protection)

sys/dev/pci/drm/radeon/cypress_dpm.c

1863

if (pi->dynamic_pcie_gen2)

sys/dev/pci/drm/radeon/cypress_dpm.c

1906

if (pi->gfx_clock_gating)

sys/dev/pci/drm/radeon/cypress_dpm.c

1909

if (pi->mg_clock_gating)

sys/dev/pci/drm/radeon/cypress_dpm.c

1919

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/cypress_dpm.c

1928

if (pi->thermal_protection)

sys/dev/pci/drm/radeon/cypress_dpm.c

193

if (pi->mgcgtssm)

sys/dev/pci/drm/radeon/cypress_dpm.c

1931

if (pi->dynamic_pcie_gen2)

sys/dev/pci/drm/radeon/cypress_dpm.c

1940

if (pi->gfx_clock_gating)

sys/dev/pci/drm/radeon/cypress_dpm.c

1943

if (pi->mg_clock_gating)

sys/dev/pci/drm/radeon/cypress_dpm.c

2026

struct rv7xx_power_info *pi;

sys/dev/pci/drm/radeon/cypress_dpm.c

2035

pi = &eg_pi->rv7xx;

sys/dev/pci/drm/radeon/cypress_dpm.c

2040

pi->acpi_vddc = 0;

sys/dev/pci/drm/radeon/cypress_dpm.c

2042

pi->min_vddc_in_table = 0;

sys/dev/pci/drm/radeon/cypress_dpm.c

2043

pi->max_vddc_in_table = 0;

sys/dev/pci/drm/radeon/cypress_dpm.c

2061

pi->ref_div = dividers.ref_div + 1;

sys/dev/pci/drm/radeon/cypress_dpm.c

2063

pi->ref_div = R600_REFERENCEDIVIDER_DFLT;

sys/dev/pci/drm/radeon/cypress_dpm.c

2065

pi->mclk_strobe_mode_threshold = 40000;

sys/dev/pci/drm/radeon/cypress_dpm.c

2066

pi->mclk_edc_enable_threshold = 40000;

sys/dev/pci/drm/radeon/cypress_dpm.c

2069

pi->rlp = RV770_RLP_DFLT;

sys/dev/pci/drm/radeon/cypress_dpm.c

2070

pi->rmp = RV770_RMP_DFLT;

sys/dev/pci/drm/radeon/cypress_dpm.c

2071

pi->lhp = RV770_LHP_DFLT;

sys/dev/pci/drm/radeon/cypress_dpm.c

2072

pi->lmp = RV770_LMP_DFLT;

sys/dev/pci/drm/radeon/cypress_dpm.c

2074

pi->voltage_control =

sys/dev/pci/drm/radeon/cypress_dpm.c

2077

pi->mvdd_control =

sys/dev/pci/drm/radeon/cypress_dpm.c

2085

pi->asi = RV770_ASI_DFLT;

sys/dev/pci/drm/radeon/cypress_dpm.c

2086

pi->pasi = CYPRESS_HASI_DFLT;

sys/dev/pci/drm/radeon/cypress_dpm.c

2087

pi->vrc = CYPRESS_VRC_DFLT;

sys/dev/pci/drm/radeon/cypress_dpm.c

2089

pi->power_gating = false;

sys/dev/pci/drm/radeon/cypress_dpm.c

2093

pi->gfx_clock_gating = false;

sys/dev/pci/drm/radeon/cypress_dpm.c

2095

pi->gfx_clock_gating = true;

sys/dev/pci/drm/radeon/cypress_dpm.c

2097

pi->mg_clock_gating = true;

sys/dev/pci/drm/radeon/cypress_dpm.c

2098

pi->mgcgtssm = true;

sys/dev/pci/drm/radeon/cypress_dpm.c

2102

pi->dynamic_pcie_gen2 = true;

sys/dev/pci/drm/radeon/cypress_dpm.c

2105

pi->thermal_protection = true;

sys/dev/pci/drm/radeon/cypress_dpm.c

2107

pi->thermal_protection = false;

sys/dev/pci/drm/radeon/cypress_dpm.c

2109

pi->display_gap = true;

sys/dev/pci/drm/radeon/cypress_dpm.c

2112

pi->dcodt = true;

sys/dev/pci/drm/radeon/cypress_dpm.c

2114

pi->dcodt = false;

sys/dev/pci/drm/radeon/cypress_dpm.c

2116

pi->ulps = true;

sys/dev/pci/drm/radeon/cypress_dpm.c

2138

pi->mclk_stutter_mode_threshold = 0;

sys/dev/pci/drm/radeon/cypress_dpm.c

214

if (pi->mgcgtssm)

sys/dev/pci/drm/radeon/cypress_dpm.c

2140

pi->sram_end = SMC_RAM_END;

sys/dev/pci/drm/radeon/cypress_dpm.c

2158

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/cypress_dpm.c

2161

u32 switch_limit = pi->mem_gddr5 ? 450 : 0;

sys/dev/pci/drm/radeon/cypress_dpm.c

222

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/cypress_dpm.c

225

if (pi->sclk_ss)

sys/dev/pci/drm/radeon/cypress_dpm.c

228

if (pi->mclk_ss)

sys/dev/pci/drm/radeon/cypress_dpm.c

329

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/cypress_dpm.c

340

pi->pcie_gen2 = true;

sys/dev/pci/drm/radeon/cypress_dpm.c

342

pi->pcie_gen2 = false;

sys/dev/pci/drm/radeon/cypress_dpm.c

344

if (!pi->pcie_gen2)

sys/dev/pci/drm/radeon/cypress_dpm.c

424

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/cypress_dpm.c

428

if (pi->mem_gddr5) {

sys/dev/pci/drm/radeon/cypress_dpm.c

429

if (mclk <= pi->mclk_strobe_mode_threshold)

sys/dev/pci/drm/radeon/cypress_dpm.c

477

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/cypress_dpm.c

480

pi->clk_regs.rv770.mpll_ad_func_cntl;

sys/dev/pci/drm/radeon/cypress_dpm.c

482

pi->clk_regs.rv770.mpll_ad_func_cntl_2;

sys/dev/pci/drm/radeon/cypress_dpm.c

484

pi->clk_regs.rv770.mpll_dq_func_cntl;

sys/dev/pci/drm/radeon/cypress_dpm.c

486

pi->clk_regs.rv770.mpll_dq_func_cntl_2;

sys/dev/pci/drm/radeon/cypress_dpm.c

488

pi->clk_regs.rv770.mclk_pwrmgt_cntl;

sys/dev/pci/drm/radeon/cypress_dpm.c

490

pi->clk_regs.rv770.dll_cntl;

sys/dev/pci/drm/radeon/cypress_dpm.c

491

u32 mpll_ss1 = pi->clk_regs.rv770.mpll_ss1;

sys/dev/pci/drm/radeon/cypress_dpm.c

492

u32 mpll_ss2 = pi->clk_regs.rv770.mpll_ss2;

sys/dev/pci/drm/radeon/cypress_dpm.c

51

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/cypress_dpm.c

529

if (pi->mem_gddr5) {

sys/dev/pci/drm/radeon/cypress_dpm.c

552

if (pi->mclk_ss) {

sys/dev/pci/drm/radeon/cypress_dpm.c

576

dll_speed = rv740_get_dll_speed(pi->mem_gddr5,

sys/dev/pci/drm/radeon/cypress_dpm.c

58

if (!pi->boot_in_gen2) {

sys/dev/pci/drm/radeon/cypress_dpm.c

658

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/cypress_dpm.c

661

if (!pi->mvdd_control) {

sys/dev/pci/drm/radeon/cypress_dpm.c

667

if (mclk <= pi->mvdd_split_frequency) {

sys/dev/pci/drm/radeon/cypress_dpm.c

683

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/cypress_dpm.c

688

level->gen2PCIE = pi->pcie_gen2 ?

sys/dev/pci/drm/radeon/cypress_dpm.c

699

if (pi->mclk_stutter_mode_threshold &&

sys/dev/pci/drm/radeon/cypress_dpm.c

700

(pl->mclk <= pi->mclk_stutter_mode_threshold) &&

sys/dev/pci/drm/radeon/cypress_dpm.c

709

if (pi->mem_gddr5) {

sys/dev/pci/drm/radeon/cypress_dpm.c

710

if (pl->mclk > pi->mclk_edc_enable_threshold)

sys/dev/pci/drm/radeon/cypress_dpm.c

75

if (!pi->boot_in_gen2) {

sys/dev/pci/drm/radeon/cypress_dpm.c

872

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/cypress_dpm.c

873

u16 address = pi->state_table_start +

sys/dev/pci/drm/radeon/cypress_dpm.c

884

pi->sram_end);

sys/dev/pci/drm/radeon/cypress_dpm.c

890

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/cypress_dpm.c

903

pi->sram_end);

sys/dev/pci/drm/radeon/cypress_dpm.c

909

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/cypress_dpm.c

910

u32 multiplier = pi->mem_gddr5 ? 1 : 2;

sys/dev/pci/drm/radeon/cypress_dpm.c

99

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1004

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1007

if (pi->bapm_enable) {

sys/dev/pci/drm/radeon/kv_dpm.c

1029

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1073

if (pi->enable_auto_thermal_throttling) {

sys/dev/pci/drm/radeon/kv_dpm.c

1174

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1176

pi->low_sclk_interrupt_t = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

1181

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1184

if (pi->caps_fps) {

sys/dev/pci/drm/radeon/kv_dpm.c

1188

pi->fps_high_t = cpu_to_be16(tmp);

sys/dev/pci/drm/radeon/kv_dpm.c

1190

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

1192

(u8 *)&pi->fps_high_t,

sys/dev/pci/drm/radeon/kv_dpm.c

1193

sizeof(u16), pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

1196

pi->fps_low_t = cpu_to_be16(tmp);

sys/dev/pci/drm/radeon/kv_dpm.c

1199

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

1201

(u8 *)&pi->fps_low_t,

sys/dev/pci/drm/radeon/kv_dpm.c

1202

sizeof(u16), pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

1210

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1212

pi->uvd_power_gated = false;

sys/dev/pci/drm/radeon/kv_dpm.c

1213

pi->vce_power_gated = false;

sys/dev/pci/drm/radeon/kv_dpm.c

1214

pi->samu_power_gated = false;

sys/dev/pci/drm/radeon/kv_dpm.c

1215

pi->acp_power_gated = false;

sys/dev/pci/drm/radeon/kv_dpm.c

1245

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1253

pi->uvd_boot_level = table->count - 1;

sys/dev/pci/drm/radeon/kv_dpm.c

1255

pi->uvd_boot_level = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

1257

if (!pi->caps_uvd_dpm || pi->caps_stable_p_state) {

sys/dev/pci/drm/radeon/kv_dpm.c

1258

mask = 1 << pi->uvd_boot_level;

sys/dev/pci/drm/radeon/kv_dpm.c

1264

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

1266

(uint8_t *)&pi->uvd_boot_level,

sys/dev/pci/drm/radeon/kv_dpm.c

1267

sizeof(u8), pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

1297

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1306

if (pi->caps_stable_p_state)

sys/dev/pci/drm/radeon/kv_dpm.c

1307

pi->vce_boot_level = table->count - 1;

sys/dev/pci/drm/radeon/kv_dpm.c

1309

pi->vce_boot_level = kv_get_vce_boot_level(rdev, radeon_new_state->evclk);

sys/dev/pci/drm/radeon/kv_dpm.c

1312

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

1314

(u8 *)&pi->vce_boot_level,

sys/dev/pci/drm/radeon/kv_dpm.c

1316

pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

1320

if (pi->caps_stable_p_state)

sys/dev/pci/drm/radeon/kv_dpm.c

1323

(1 << pi->vce_boot_level));

sys/dev/pci/drm/radeon/kv_dpm.c

1338

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1344

if (pi->caps_stable_p_state)

sys/dev/pci/drm/radeon/kv_dpm.c

1345

pi->samu_boot_level = table->count - 1;

sys/dev/pci/drm/radeon/kv_dpm.c

1347

pi->samu_boot_level = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

1350

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

1352

(u8 *)&pi->samu_boot_level,

sys/dev/pci/drm/radeon/kv_dpm.c

1354

pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

1358

if (pi->caps_stable_p_state)

sys/dev/pci/drm/radeon/kv_dpm.c

1361

(1 << pi->samu_boot_level));

sys/dev/pci/drm/radeon/kv_dpm.c

1386

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1389

if (!pi->caps_stable_p_state) {

sys/dev/pci/drm/radeon/kv_dpm.c

1391

if (acp_boot_level != pi->acp_boot_level) {

sys/dev/pci/drm/radeon/kv_dpm.c

1392

pi->acp_boot_level = acp_boot_level;

sys/dev/pci/drm/radeon/kv_dpm.c

1395

(1 << pi->acp_boot_level));

sys/dev/pci/drm/radeon/kv_dpm.c

1402

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1408

if (pi->caps_stable_p_state)

sys/dev/pci/drm/radeon/kv_dpm.c

1409

pi->acp_boot_level = table->count - 1;

sys/dev/pci/drm/radeon/kv_dpm.c

1411

pi->acp_boot_level = kv_get_acp_boot_level(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1414

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

1416

(u8 *)&pi->acp_boot_level,

sys/dev/pci/drm/radeon/kv_dpm.c

1418

pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

1422

if (pi->caps_stable_p_state)

sys/dev/pci/drm/radeon/kv_dpm.c

1425

(1 << pi->acp_boot_level));

sys/dev/pci/drm/radeon/kv_dpm.c

1433

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1435

if (pi->uvd_power_gated == gate)

sys/dev/pci/drm/radeon/kv_dpm.c

1438

pi->uvd_power_gated = gate;

sys/dev/pci/drm/radeon/kv_dpm.c

1441

if (pi->caps_uvd_pg) {

sys/dev/pci/drm/radeon/kv_dpm.c

1446

if (pi->caps_uvd_pg)

sys/dev/pci/drm/radeon/kv_dpm.c

1449

if (pi->caps_uvd_pg) {

sys/dev/pci/drm/radeon/kv_dpm.c

1461

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1463

if (pi->vce_power_gated == gate)

sys/dev/pci/drm/radeon/kv_dpm.c

1466

pi->vce_power_gated = gate;

sys/dev/pci/drm/radeon/kv_dpm.c

1469

if (pi->caps_vce_pg) {

sys/dev/pci/drm/radeon/kv_dpm.c

1474

if (pi->caps_vce_pg) {

sys/dev/pci/drm/radeon/kv_dpm.c

1484

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1486

if (pi->samu_power_gated == gate)

sys/dev/pci/drm/radeon/kv_dpm.c

1489

pi->samu_power_gated = gate;

sys/dev/pci/drm/radeon/kv_dpm.c

1493

if (pi->caps_samu_pg)

sys/dev/pci/drm/radeon/kv_dpm.c

1496

if (pi->caps_samu_pg)

sys/dev/pci/drm/radeon/kv_dpm.c

1504

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1506

if (pi->acp_power_gated == gate)

sys/dev/pci/drm/radeon/kv_dpm.c

1512

pi->acp_power_gated = gate;

sys/dev/pci/drm/radeon/kv_dpm.c

1516

if (pi->caps_acp_pg)

sys/dev/pci/drm/radeon/kv_dpm.c

1519

if (pi->caps_acp_pg)

sys/dev/pci/drm/radeon/kv_dpm.c

152

struct kv_power_info *pi = rdev->pm.dpm.priv;

sys/dev/pci/drm/radeon/kv_dpm.c

1529

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1535

for (i = 0; i < pi->graphics_dpm_level_count; i++) {

sys/dev/pci/drm/radeon/kv_dpm.c

1537

(i == (pi->graphics_dpm_level_count - 1))) {

sys/dev/pci/drm/radeon/kv_dpm.c

1538

pi->lowest_valid = i;

sys/dev/pci/drm/radeon/kv_dpm.c

154

return pi;

sys/dev/pci/drm/radeon/kv_dpm.c

1543

for (i = pi->graphics_dpm_level_count - 1; i > 0; i--) {

sys/dev/pci/drm/radeon/kv_dpm.c

1547

pi->highest_valid = i;

sys/dev/pci/drm/radeon/kv_dpm.c

1549

if (pi->lowest_valid > pi->highest_valid) {

sys/dev/pci/drm/radeon/kv_dpm.c

1550

if ((new_ps->levels[0].sclk - table->entries[pi->highest_valid].clk) >

sys/dev/pci/drm/radeon/kv_dpm.c

1551

(table->entries[pi->lowest_valid].clk - new_ps->levels[new_ps->num_levels - 1].sclk))

sys/dev/pci/drm/radeon/kv_dpm.c

1552

pi->highest_valid = pi->lowest_valid;

sys/dev/pci/drm/radeon/kv_dpm.c

1554

pi->lowest_valid = pi->highest_valid;

sys/dev/pci/drm/radeon/kv_dpm.c

1558

&pi->sys_info.sclk_voltage_mapping_table;

sys/dev/pci/drm/radeon/kv_dpm.c

1560

for (i = 0; i < (int)pi->graphics_dpm_level_count; i++) {

sys/dev/pci/drm/radeon/kv_dpm.c

1562

i == (int)(pi->graphics_dpm_level_count - 1)) {

sys/dev/pci/drm/radeon/kv_dpm.c

1563

pi->lowest_valid = i;

sys/dev/pci/drm/radeon/kv_dpm.c

1568

for (i = pi->graphics_dpm_level_count - 1; i > 0; i--) {

sys/dev/pci/drm/radeon/kv_dpm.c

1573

pi->highest_valid = i;

sys/dev/pci/drm/radeon/kv_dpm.c

1575

if (pi->lowest_valid > pi->highest_valid) {

sys/dev/pci/drm/radeon/kv_dpm.c

1577

table->entries[pi->highest_valid].sclk_frequency) >

sys/dev/pci/drm/radeon/kv_dpm.c

1578

(table->entries[pi->lowest_valid].sclk_frequency -

sys/dev/pci/drm/radeon/kv_dpm.c

1580

pi->highest_valid = pi->lowest_valid;

sys/dev/pci/drm/radeon/kv_dpm.c

1582

pi->lowest_valid = pi->highest_valid;

sys/dev/pci/drm/radeon/kv_dpm.c

1591

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1595

if (pi->caps_enable_dfs_bypass) {

sys/dev/pci/drm/radeon/kv_dpm.c

1597

pi->graphics_level[pi->graphics_boot_level].ClkBypassCntl : 0;

sys/dev/pci/drm/radeon/kv_dpm.c

1599

(pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

1601

(pi->graphics_boot_level * sizeof(SMU7_Fusion_GraphicsLevel)) +

sys/dev/pci/drm/radeon/kv_dpm.c

1604

sizeof(u8), pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

1613

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1617

if (pi->enable_nb_dpm && !pi->nb_dpm_enabled) {

sys/dev/pci/drm/radeon/kv_dpm.c

1620

pi->nb_dpm_enabled = true;

sys/dev/pci/drm/radeon/kv_dpm.c

1623

if (pi->enable_nb_dpm && pi->nb_dpm_enabled) {

sys/dev/pci/drm/radeon/kv_dpm.c

1626

pi->nb_dpm_enabled = false;

sys/dev/pci/drm/radeon/kv_dpm.c

1659

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1666

&pi->requested_rps,

sys/dev/pci/drm/radeon/kv_dpm.c

1667

&pi->current_rps);

sys/dev/pci/drm/radeon/kv_dpm.c

1674

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1675

struct radeon_ps *new_ps = &pi->requested_rps;

sys/dev/pci/drm/radeon/kv_dpm.c

1676

struct radeon_ps *old_ps = &pi->current_rps;

sys/dev/pci/drm/radeon/kv_dpm.c

1679

if (pi->bapm_enable) {

sys/dev/pci/drm/radeon/kv_dpm.c

1688

if (pi->enable_dpm) {

sys/dev/pci/drm/radeon/kv_dpm.c

1717

if (pi->enable_dpm) {

sys/dev/pci/drm/radeon/kv_dpm.c

1748

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1749

struct radeon_ps *new_ps = &pi->requested_rps;

sys/dev/pci/drm/radeon/kv_dpm.c

1766

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1768

if (pi->sys_info.sclk_voltage_mapping_table.num_max_dpm_entries > 0) {

sys/dev/pci/drm/radeon/kv_dpm.c

1769

int idx = pi->sys_info.sclk_voltage_mapping_table.num_max_dpm_entries - 1;

sys/dev/pci/drm/radeon/kv_dpm.c

1771

pi->sys_info.sclk_voltage_mapping_table.entries[idx].sclk_frequency;

sys/dev/pci/drm/radeon/kv_dpm.c

1774

pi->sys_info.sclk_voltage_mapping_table.entries[idx].vid_2bit);

sys/dev/pci/drm/radeon/kv_dpm.c

1777

table->mclk = pi->sys_info.nbp_memory_clock[0];

sys/dev/pci/drm/radeon/kv_dpm.c

1824

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1826

pi->boot_pl.sclk = pi->sys_info.bootup_sclk;

sys/dev/pci/drm/radeon/kv_dpm.c

1827

pi->boot_pl.vddc_index = pi->sys_info.bootup_nb_voltage_index;

sys/dev/pci/drm/radeon/kv_dpm.c

1828

pi->boot_pl.ds_divider_index = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

1829

pi->boot_pl.ss_divider_index = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

1830

pi->boot_pl.allow_gnb_slow = 1;

sys/dev/pci/drm/radeon/kv_dpm.c

1831

pi->boot_pl.force_nbp_state = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

1832

pi->boot_pl.display_wm = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

1833

pi->boot_pl.vce_wm = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

1879

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1888

if (!pi->caps_sclk_ds)

sys/dev/pci/drm/radeon/kv_dpm.c

1902

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1909

if (pi->high_voltage_t &&

sys/dev/pci/drm/radeon/kv_dpm.c

1911

pi->high_voltage_t)) {

sys/dev/pci/drm/radeon/kv_dpm.c

1918

&pi->sys_info.sclk_voltage_mapping_table;

sys/dev/pci/drm/radeon/kv_dpm.c

1921

if (pi->high_voltage_t &&

sys/dev/pci/drm/radeon/kv_dpm.c

1923

pi->high_voltage_t)) {

sys/dev/pci/drm/radeon/kv_dpm.c

1939

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

1961

if (pi->caps_stable_p_state) {

sys/dev/pci/drm/radeon/kv_dpm.c

1991

if (pi->high_voltage_t &&

sys/dev/pci/drm/radeon/kv_dpm.c

1992

(pi->high_voltage_t <

sys/dev/pci/drm/radeon/kv_dpm.c

2000

&pi->sys_info.sclk_voltage_mapping_table;

sys/dev/pci/drm/radeon/kv_dpm.c

2003

if (pi->high_voltage_t &&

sys/dev/pci/drm/radeon/kv_dpm.c

2004

(pi->high_voltage_t <

sys/dev/pci/drm/radeon/kv_dpm.c

2012

if (pi->caps_stable_p_state) {

sys/dev/pci/drm/radeon/kv_dpm.c

2018

pi->video_start = new_rps->dclk || new_rps->vclk ||

sys/dev/pci/drm/radeon/kv_dpm.c

2023

pi->battery_state = true;

sys/dev/pci/drm/radeon/kv_dpm.c

2025

pi->battery_state = false;

sys/dev/pci/drm/radeon/kv_dpm.c

2038

if (pi->sys_info.nb_dpm_enable) {

sys/dev/pci/drm/radeon/kv_dpm.c

2039

force_high = (mclk >= pi->sys_info.nbp_memory_clock[3]) ||

sys/dev/pci/drm/radeon/kv_dpm.c

2040

pi->video_start || (rdev->pm.dpm.new_active_crtc_count >= 3) ||

sys/dev/pci/drm/radeon/kv_dpm.c

2041

pi->disable_nb_ps3_in_battery;

sys/dev/pci/drm/radeon/kv_dpm.c

2053

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

2055

pi->graphics_level[index].EnabledForThrottle = enable ? 1 : 0;

sys/dev/pci/drm/radeon/kv_dpm.c

2060

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

2064

if (pi->lowest_valid > pi->highest_valid)

sys/dev/pci/drm/radeon/kv_dpm.c

2067

for (i = pi->lowest_valid; i <= pi->highest_valid; i++) {

sys/dev/pci/drm/radeon/kv_dpm.c

2068

pi->graphics_level[i].DeepSleepDivId =

sys/dev/pci/drm/radeon/kv_dpm.c

2070

be32_to_cpu(pi->graphics_level[i].SclkFrequency),

sys/dev/pci/drm/radeon/kv_dpm.c

2078

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

208

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

2085

if (pi->lowest_valid > pi->highest_valid)

sys/dev/pci/drm/radeon/kv_dpm.c

2089

for (i = pi->lowest_valid; i <= pi->highest_valid; i++) {

sys/dev/pci/drm/radeon/kv_dpm.c

2090

pi->graphics_level[i].GnbSlow = 1;

sys/dev/pci/drm/radeon/kv_dpm.c

2091

pi->graphics_level[i].ForceNbPs1 = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

2092

pi->graphics_level[i].UpH = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

2095

if (!pi->sys_info.nb_dpm_enable)

sys/dev/pci/drm/radeon/kv_dpm.c

2098

force_high = ((mclk >= pi->sys_info.nbp_memory_clock[3]) ||

sys/dev/pci/drm/radeon/kv_dpm.c

2099

(rdev->pm.dpm.new_active_crtc_count >= 3) || pi->video_start);

sys/dev/pci/drm/radeon/kv_dpm.c

2102

for (i = pi->lowest_valid; i <= pi->highest_valid; i++)

sys/dev/pci/drm/radeon/kv_dpm.c

2103

pi->graphics_level[i].GnbSlow = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

2105

if (pi->battery_state)

sys/dev/pci/drm/radeon/kv_dpm.c

2106

pi->graphics_level[0].ForceNbPs1 = 1;

sys/dev/pci/drm/radeon/kv_dpm.c

2108

pi->graphics_level[1].GnbSlow = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

2109

pi->graphics_level[2].GnbSlow = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

211

if (pi->caps_sq_ramping) {

sys/dev/pci/drm/radeon/kv_dpm.c

2110

pi->graphics_level[3].GnbSlow = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

2111

pi->graphics_level[4].GnbSlow = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

2114

for (i = pi->lowest_valid; i <= pi->highest_valid; i++) {

sys/dev/pci/drm/radeon/kv_dpm.c

2115

pi->graphics_level[i].GnbSlow = 1;

sys/dev/pci/drm/radeon/kv_dpm.c

2116

pi->graphics_level[i].ForceNbPs1 = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

2117

pi->graphics_level[i].UpH = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

2120

if (pi->sys_info.nb_dpm_enable && pi->battery_state) {

sys/dev/pci/drm/radeon/kv_dpm.c

2121

pi->graphics_level[pi->lowest_valid].UpH = 0x28;

sys/dev/pci/drm/radeon/kv_dpm.c

2122

pi->graphics_level[pi->lowest_valid].GnbSlow = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

2123

if (pi->lowest_valid != pi->highest_valid)

sys/dev/pci/drm/radeon/kv_dpm.c

2124

pi->graphics_level[pi->lowest_valid].ForceNbPs1 = 1;

sys/dev/pci/drm/radeon/kv_dpm.c

2132

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

2135

if (pi->lowest_valid > pi->highest_valid)

sys/dev/pci/drm/radeon/kv_dpm.c

2138

for (i = pi->lowest_valid; i <= pi->highest_valid; i++)

sys/dev/pci/drm/radeon/kv_dpm.c

2139

pi->graphics_level[i].DisplayWatermark = (i == pi->highest_valid) ? 1 : 0;

sys/dev/pci/drm/radeon/kv_dpm.c

2146

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

2154

pi->graphics_dpm_level_count = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

2156

if (pi->high_voltage_t &&

sys/dev/pci/drm/radeon/kv_dpm.c

2157

(pi->high_voltage_t <

sys/dev/pci/drm/radeon/kv_dpm.c

2163

&pi->sys_info.vid_mapping_table,

sys/dev/pci/drm/radeon/kv_dpm.c

2166

kv_set_at(rdev, i, pi->at[i]);

sys/dev/pci/drm/radeon/kv_dpm.c

2168

pi->graphics_dpm_level_count++;

sys/dev/pci/drm/radeon/kv_dpm.c

2172

&pi->sys_info.sclk_voltage_mapping_table;

sys/dev/pci/drm/radeon/kv_dpm.c

2174

pi->graphics_dpm_level_count = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

2176

if (pi->high_voltage_t &&

sys/dev/pci/drm/radeon/kv_dpm.c

2177

pi->high_voltage_t <

sys/dev/pci/drm/radeon/kv_dpm.c

2183

kv_set_at(rdev, i, pi->at[i]);

sys/dev/pci/drm/radeon/kv_dpm.c

2185

pi->graphics_dpm_level_count++;

sys/dev/pci/drm/radeon/kv_dpm.c

2195

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

2199

if (i >= pi->lowest_valid && i <= pi->highest_valid)

sys/dev/pci/drm/radeon/kv_dpm.c

220

if (pi->caps_db_ramping) {

sys/dev/pci/drm/radeon/kv_dpm.c

2215

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

2218

for (i = pi->lowest_valid; i <= pi->highest_valid; i++)

sys/dev/pci/drm/radeon/kv_dpm.c

2230

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

2236

if (pi->sys_info.nb_dpm_enable) {

sys/dev/pci/drm/radeon/kv_dpm.c

2287

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

229

if (pi->caps_td_ramping) {

sys/dev/pci/drm/radeon/kv_dpm.c

2304

pi->sys_info.bootup_sclk = le32_to_cpu(igp_info->info_8.ulBootUpEngineClock);

sys/dev/pci/drm/radeon/kv_dpm.c

2305

pi->sys_info.bootup_uma_clk = le32_to_cpu(igp_info->info_8.ulBootUpUMAClock);

sys/dev/pci/drm/radeon/kv_dpm.c

2306

pi->sys_info.bootup_nb_voltage_index =

sys/dev/pci/drm/radeon/kv_dpm.c

2309

pi->sys_info.htc_tmp_lmt = 203;

sys/dev/pci/drm/radeon/kv_dpm.c

2311

pi->sys_info.htc_tmp_lmt = igp_info->info_8.ucHtcTmpLmt;

sys/dev/pci/drm/radeon/kv_dpm.c

2313

pi->sys_info.htc_hyst_lmt = 5;

sys/dev/pci/drm/radeon/kv_dpm.c

2315

pi->sys_info.htc_hyst_lmt = igp_info->info_8.ucHtcHystLmt;

sys/dev/pci/drm/radeon/kv_dpm.c

2316

if (pi->sys_info.htc_tmp_lmt <= pi->sys_info.htc_hyst_lmt) {

sys/dev/pci/drm/radeon/kv_dpm.c

2321

pi->sys_info.nb_dpm_enable = true;

sys/dev/pci/drm/radeon/kv_dpm.c

2323

pi->sys_info.nb_dpm_enable = false;

sys/dev/pci/drm/radeon/kv_dpm.c

2326

pi->sys_info.nbp_memory_clock[i] =

sys/dev/pci/drm/radeon/kv_dpm.c

2328

pi->sys_info.nbp_n_clock[i] =

sys/dev/pci/drm/radeon/kv_dpm.c

2333

pi->caps_enable_dfs_bypass = true;

sys/dev/pci/drm/radeon/kv_dpm.c

2336

&pi->sys_info.sclk_voltage_mapping_table,

sys/dev/pci/drm/radeon/kv_dpm.c

2340

&pi->sys_info.vid_mapping_table,

sys/dev/pci/drm/radeon/kv_dpm.c

2373

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

2376

ps->levels[0] = pi->boot_pl;

sys/dev/pci/drm/radeon/kv_dpm.c

238

if (pi->caps_tcp_ramping) {

sys/dev/pci/drm/radeon/kv_dpm.c

2410

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

2422

if (pi->caps_sclk_ds) {

sys/dev/pci/drm/radeon/kv_dpm.c

250

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

2520

struct kv_power_info *pi;

sys/dev/pci/drm/radeon/kv_dpm.c

2523

pi = kzalloc(sizeof(struct kv_power_info), GFP_KERNEL);

sys/dev/pci/drm/radeon/kv_dpm.c

2524

if (pi == NULL)

sys/dev/pci/drm/radeon/kv_dpm.c

2526

rdev->pm.dpm.priv = pi;

sys/dev/pci/drm/radeon/kv_dpm.c

253

if (pi->caps_sq_ramping ||

sys/dev/pci/drm/radeon/kv_dpm.c

2537

pi->at[i] = TRINITY_AT_DFLT;

sys/dev/pci/drm/radeon/kv_dpm.c

2539

pi->sram_end = SMC_RAM_END;

sys/dev/pci/drm/radeon/kv_dpm.c

254

pi->caps_db_ramping ||

sys/dev/pci/drm/radeon/kv_dpm.c

2543

pi->enable_nb_dpm = false;

sys/dev/pci/drm/radeon/kv_dpm.c

2545

pi->enable_nb_dpm = true;

sys/dev/pci/drm/radeon/kv_dpm.c

2547

pi->caps_power_containment = true;

sys/dev/pci/drm/radeon/kv_dpm.c

2548

pi->caps_cac = true;

sys/dev/pci/drm/radeon/kv_dpm.c

2549

pi->enable_didt = false;

sys/dev/pci/drm/radeon/kv_dpm.c

255

pi->caps_td_ramping ||

sys/dev/pci/drm/radeon/kv_dpm.c

2550

if (pi->enable_didt) {

sys/dev/pci/drm/radeon/kv_dpm.c

2551

pi->caps_sq_ramping = true;

sys/dev/pci/drm/radeon/kv_dpm.c

2552

pi->caps_db_ramping = true;

sys/dev/pci/drm/radeon/kv_dpm.c

2553

pi->caps_td_ramping = true;

sys/dev/pci/drm/radeon/kv_dpm.c

2554

pi->caps_tcp_ramping = true;

sys/dev/pci/drm/radeon/kv_dpm.c

2557

pi->caps_sclk_ds = true;

sys/dev/pci/drm/radeon/kv_dpm.c

2558

pi->enable_auto_thermal_throttling = true;

sys/dev/pci/drm/radeon/kv_dpm.c

2559

pi->disable_nb_ps3_in_battery = false;

sys/dev/pci/drm/radeon/kv_dpm.c

256

pi->caps_tcp_ramping) {

sys/dev/pci/drm/radeon/kv_dpm.c

2563

pi->bapm_enable = true;

sys/dev/pci/drm/radeon/kv_dpm.c

2565

pi->bapm_enable = false;

sys/dev/pci/drm/radeon/kv_dpm.c

2567

pi->bapm_enable = false;

sys/dev/pci/drm/radeon/kv_dpm.c

2569

pi->bapm_enable = true;

sys/dev/pci/drm/radeon/kv_dpm.c

2571

pi->voltage_drop_t = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

2572

pi->caps_sclk_throttle_low_notification = false;

sys/dev/pci/drm/radeon/kv_dpm.c

2573

pi->caps_fps = false; /* true? */

sys/dev/pci/drm/radeon/kv_dpm.c

2574

pi->caps_uvd_pg = true;

sys/dev/pci/drm/radeon/kv_dpm.c

2575

pi->caps_uvd_dpm = true;

sys/dev/pci/drm/radeon/kv_dpm.c

2576

pi->caps_vce_pg = false; /* XXX true */

sys/dev/pci/drm/radeon/kv_dpm.c

2577

pi->caps_samu_pg = false;

sys/dev/pci/drm/radeon/kv_dpm.c

2578

pi->caps_acp_pg = false;

sys/dev/pci/drm/radeon/kv_dpm.c

2579

pi->caps_stable_p_state = false;

sys/dev/pci/drm/radeon/kv_dpm.c

2592

pi->enable_dpm = true;

sys/dev/pci/drm/radeon/kv_dpm.c

2600

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

2610

sclk = be32_to_cpu(pi->graphics_level[current_index].SclkFrequency);

sys/dev/pci/drm/radeon/kv_dpm.c

2614

seq_printf(m, "uvd %sabled\n", pi->uvd_power_gated ? "dis" : "en");

sys/dev/pci/drm/radeon/kv_dpm.c

2615

seq_printf(m, "vce %sabled\n", pi->vce_power_gated ? "dis" : "en");

sys/dev/pci/drm/radeon/kv_dpm.c

2623

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

2632

sclk = be32_to_cpu(pi->graphics_level[current_index].SclkFrequency);

sys/dev/pci/drm/radeon/kv_dpm.c

2639

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

2641

return pi->sys_info.bootup_uma_clk;

sys/dev/pci/drm/radeon/kv_dpm.c

2681

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

2682

struct kv_ps *requested_state = kv_get_ps(&pi->requested_rps);

sys/dev/pci/drm/radeon/kv_dpm.c

2692

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

2694

return pi->sys_info.bootup_uma_clk;

sys/dev/pci/drm/radeon/kv_dpm.c

277

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

280

if (pi->caps_cac) {

sys/dev/pci/drm/radeon/kv_dpm.c

284

pi->cac_enabled = false;

sys/dev/pci/drm/radeon/kv_dpm.c

286

pi->cac_enabled = true;

sys/dev/pci/drm/radeon/kv_dpm.c

287

} else if (pi->cac_enabled) {

sys/dev/pci/drm/radeon/kv_dpm.c

289

pi->cac_enabled = false;

sys/dev/pci/drm/radeon/kv_dpm.c

298

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

304

&tmp, pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

307

pi->dpm_table_start = tmp;

sys/dev/pci/drm/radeon/kv_dpm.c

311

&tmp, pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

314

pi->soft_regs_start = tmp;

sys/dev/pci/drm/radeon/kv_dpm.c

321

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

324

pi->graphics_voltage_change_enable = 1;

sys/dev/pci/drm/radeon/kv_dpm.c

327

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

329

&pi->graphics_voltage_change_enable,

sys/dev/pci/drm/radeon/kv_dpm.c

330

sizeof(u8), pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

337

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

340

pi->graphics_interval = 1;

sys/dev/pci/drm/radeon/kv_dpm.c

343

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

345

&pi->graphics_interval,

sys/dev/pci/drm/radeon/kv_dpm.c

346

sizeof(u8), pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

353

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

357

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

359

&pi->graphics_boot_level,

sys/dev/pci/drm/radeon/kv_dpm.c

360

sizeof(u8), pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

378

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

387

pi->graphics_level[index].SclkDid = (u8)dividers.post_div;

sys/dev/pci/drm/radeon/kv_dpm.c

388

pi->graphics_level[index].SclkFrequency = cpu_to_be32(sclk);

sys/dev/pci/drm/radeon/kv_dpm.c

448

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

450

&pi->sys_info.vid_mapping_table,

sys/dev/pci/drm/radeon/kv_dpm.c

459

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

461

pi->graphics_level[index].VoltageDownH = (u8)pi->voltage_drop_t;

sys/dev/pci/drm/radeon/kv_dpm.c

462

pi->graphics_level[index].MinVddNb =

sys/dev/pci/drm/radeon/kv_dpm.c

470

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

472

pi->graphics_level[index].AT = cpu_to_be16((u16)at);

sys/dev/pci/drm/radeon/kv_dpm.c

480

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

482

pi->graphics_level[index].EnabledForActivity = enable ? 1 : 0;

sys/dev/pci/drm/radeon/kv_dpm.c

540

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

544

if (pi->caps_sclk_throttle_low_notification) {

sys/dev/pci/drm/radeon/kv_dpm.c

545

low_sclk_interrupt_t = cpu_to_be32(pi->low_sclk_interrupt_t);

sys/dev/pci/drm/radeon/kv_dpm.c

548

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

551

sizeof(u32), pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

558

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

564

for (i = pi->graphics_dpm_level_count - 1; i > 0; i--) {

sys/dev/pci/drm/radeon/kv_dpm.c

565

if (table->entries[i].clk == pi->boot_pl.sclk)

sys/dev/pci/drm/radeon/kv_dpm.c

569

pi->graphics_boot_level = (u8)i;

sys/dev/pci/drm/radeon/kv_dpm.c

573

&pi->sys_info.sclk_voltage_mapping_table;

sys/dev/pci/drm/radeon/kv_dpm.c

578

for (i = pi->graphics_dpm_level_count - 1; i > 0; i--) {

sys/dev/pci/drm/radeon/kv_dpm.c

579

if (table->entries[i].sclk_frequency == pi->boot_pl.sclk)

sys/dev/pci/drm/radeon/kv_dpm.c

583

pi->graphics_boot_level = (u8)i;

sys/dev/pci/drm/radeon/kv_dpm.c

591

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

594

pi->graphics_therm_throttle_enable = 1;

sys/dev/pci/drm/radeon/kv_dpm.c

597

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

599

&pi->graphics_therm_throttle_enable,

sys/dev/pci/drm/radeon/kv_dpm.c

600

sizeof(u8), pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

607

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

611

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

613

(u8 *)&pi->graphics_level,

sys/dev/pci/drm/radeon/kv_dpm.c

615

pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

621

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

623

&pi->graphics_dpm_level_count,

sys/dev/pci/drm/radeon/kv_dpm.c

624

sizeof(u8), pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

636

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

639

if (pi->caps_enable_dfs_bypass) {

sys/dev/pci/drm/radeon/kv_dpm.c

661

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

671

pi->uvd_level_count = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

673

if (pi->high_voltage_t &&

sys/dev/pci/drm/radeon/kv_dpm.c

674

(pi->high_voltage_t < table->entries[i].v))

sys/dev/pci/drm/radeon/kv_dpm.c

677

pi->uvd_level[i].VclkFrequency = cpu_to_be32(table->entries[i].vclk);

sys/dev/pci/drm/radeon/kv_dpm.c

678

pi->uvd_level[i].DclkFrequency = cpu_to_be32(table->entries[i].dclk);

sys/dev/pci/drm/radeon/kv_dpm.c

679

pi->uvd_level[i].MinVddNb = cpu_to_be16(table->entries[i].v);

sys/dev/pci/drm/radeon/kv_dpm.c

681

pi->uvd_level[i].VClkBypassCntl =

sys/dev/pci/drm/radeon/kv_dpm.c

683

pi->uvd_level[i].DClkBypassCntl =

sys/dev/pci/drm/radeon/kv_dpm.c

690

pi->uvd_level[i].VclkDivider = (u8)dividers.post_div;

sys/dev/pci/drm/radeon/kv_dpm.c

696

pi->uvd_level[i].DclkDivider = (u8)dividers.post_div;

sys/dev/pci/drm/radeon/kv_dpm.c

698

pi->uvd_level_count++;

sys/dev/pci/drm/radeon/kv_dpm.c

702

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

704

(u8 *)&pi->uvd_level_count,

sys/dev/pci/drm/radeon/kv_dpm.c

705

sizeof(u8), pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

709

pi->uvd_interval = 1;

sys/dev/pci/drm/radeon/kv_dpm.c

712

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

714

&pi->uvd_interval,

sys/dev/pci/drm/radeon/kv_dpm.c

715

sizeof(u8), pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

720

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

722

(u8 *)&pi->uvd_level,

sys/dev/pci/drm/radeon/kv_dpm.c

724

pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

732

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

742

pi->vce_level_count = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

744

if (pi->high_voltage_t &&

sys/dev/pci/drm/radeon/kv_dpm.c

745

pi->high_voltage_t < table->entries[i].v)

sys/dev/pci/drm/radeon/kv_dpm.c

748

pi->vce_level[i].Frequency = cpu_to_be32(table->entries[i].evclk);

sys/dev/pci/drm/radeon/kv_dpm.c

749

pi->vce_level[i].MinVoltage = cpu_to_be16(table->entries[i].v);

sys/dev/pci/drm/radeon/kv_dpm.c

751

pi->vce_level[i].ClkBypassCntl =

sys/dev/pci/drm/radeon/kv_dpm.c

758

pi->vce_level[i].Divider = (u8)dividers.post_div;

sys/dev/pci/drm/radeon/kv_dpm.c

760

pi->vce_level_count++;

sys/dev/pci/drm/radeon/kv_dpm.c

764

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

766

(u8 *)&pi->vce_level_count,

sys/dev/pci/drm/radeon/kv_dpm.c

768

pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

772

pi->vce_interval = 1;

sys/dev/pci/drm/radeon/kv_dpm.c

775

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

777

(u8 *)&pi->vce_interval,

sys/dev/pci/drm/radeon/kv_dpm.c

779

pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

784

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

786

(u8 *)&pi->vce_level,

sys/dev/pci/drm/radeon/kv_dpm.c

788

pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

795

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

805

pi->samu_level_count = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

807

if (pi->high_voltage_t &&

sys/dev/pci/drm/radeon/kv_dpm.c

808

pi->high_voltage_t < table->entries[i].v)

sys/dev/pci/drm/radeon/kv_dpm.c

811

pi->samu_level[i].Frequency = cpu_to_be32(table->entries[i].clk);

sys/dev/pci/drm/radeon/kv_dpm.c

812

pi->samu_level[i].MinVoltage = cpu_to_be16(table->entries[i].v);

sys/dev/pci/drm/radeon/kv_dpm.c

814

pi->samu_level[i].ClkBypassCntl =

sys/dev/pci/drm/radeon/kv_dpm.c

821

pi->samu_level[i].Divider = (u8)dividers.post_div;

sys/dev/pci/drm/radeon/kv_dpm.c

823

pi->samu_level_count++;

sys/dev/pci/drm/radeon/kv_dpm.c

827

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

829

(u8 *)&pi->samu_level_count,

sys/dev/pci/drm/radeon/kv_dpm.c

831

pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

835

pi->samu_interval = 1;

sys/dev/pci/drm/radeon/kv_dpm.c

838

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

840

(u8 *)&pi->samu_interval,

sys/dev/pci/drm/radeon/kv_dpm.c

842

pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

847

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

849

(u8 *)&pi->samu_level,

sys/dev/pci/drm/radeon/kv_dpm.c

851

pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

861

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

871

pi->acp_level_count = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

873

pi->acp_level[i].Frequency = cpu_to_be32(table->entries[i].clk);

sys/dev/pci/drm/radeon/kv_dpm.c

874

pi->acp_level[i].MinVoltage = cpu_to_be16(table->entries[i].v);

sys/dev/pci/drm/radeon/kv_dpm.c

880

pi->acp_level[i].Divider = (u8)dividers.post_div;

sys/dev/pci/drm/radeon/kv_dpm.c

882

pi->acp_level_count++;

sys/dev/pci/drm/radeon/kv_dpm.c

886

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

888

(u8 *)&pi->acp_level_count,

sys/dev/pci/drm/radeon/kv_dpm.c

890

pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

894

pi->acp_interval = 1;

sys/dev/pci/drm/radeon/kv_dpm.c

897

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

899

(u8 *)&pi->acp_interval,

sys/dev/pci/drm/radeon/kv_dpm.c

901

pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

906

pi->dpm_table_start +

sys/dev/pci/drm/radeon/kv_dpm.c

908

(u8 *)&pi->acp_level,

sys/dev/pci/drm/radeon/kv_dpm.c

910

pi->sram_end);

sys/dev/pci/drm/radeon/kv_dpm.c

919

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

925

for (i = 0; i < pi->graphics_dpm_level_count; i++) {

sys/dev/pci/drm/radeon/kv_dpm.c

926

if (pi->caps_enable_dfs_bypass) {

sys/dev/pci/drm/radeon/kv_dpm.c

928

pi->graphics_level[i].ClkBypassCntl = 3;

sys/dev/pci/drm/radeon/kv_dpm.c

930

pi->graphics_level[i].ClkBypassCntl = 2;

sys/dev/pci/drm/radeon/kv_dpm.c

932

pi->graphics_level[i].ClkBypassCntl = 7;

sys/dev/pci/drm/radeon/kv_dpm.c

934

pi->graphics_level[i].ClkBypassCntl = 6;

sys/dev/pci/drm/radeon/kv_dpm.c

936

pi->graphics_level[i].ClkBypassCntl = 8;

sys/dev/pci/drm/radeon/kv_dpm.c

938

pi->graphics_level[i].ClkBypassCntl = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

940

pi->graphics_level[i].ClkBypassCntl = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

945

&pi->sys_info.sclk_voltage_mapping_table;

sys/dev/pci/drm/radeon/kv_dpm.c

946

for (i = 0; i < pi->graphics_dpm_level_count; i++) {

sys/dev/pci/drm/radeon/kv_dpm.c

947

if (pi->caps_enable_dfs_bypass) {

sys/dev/pci/drm/radeon/kv_dpm.c

949

pi->graphics_level[i].ClkBypassCntl = 3;

sys/dev/pci/drm/radeon/kv_dpm.c

951

pi->graphics_level[i].ClkBypassCntl = 2;

sys/dev/pci/drm/radeon/kv_dpm.c

953

pi->graphics_level[i].ClkBypassCntl = 7;

sys/dev/pci/drm/radeon/kv_dpm.c

955

pi->graphics_level[i].ClkBypassCntl = 6;

sys/dev/pci/drm/radeon/kv_dpm.c

957

pi->graphics_level[i].ClkBypassCntl = 8;

sys/dev/pci/drm/radeon/kv_dpm.c

959

pi->graphics_level[i].ClkBypassCntl = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

961

pi->graphics_level[i].ClkBypassCntl = 0;

sys/dev/pci/drm/radeon/kv_dpm.c

975

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

977

pi->acp_boot_level = 0xff;

sys/dev/pci/drm/radeon/kv_dpm.c

984

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

986

pi->current_rps = *rps;

sys/dev/pci/drm/radeon/kv_dpm.c

987

pi->current_ps = *new_ps;

sys/dev/pci/drm/radeon/kv_dpm.c

988

pi->current_rps.ps_priv = &pi->current_ps;

sys/dev/pci/drm/radeon/kv_dpm.c

995

struct kv_power_info *pi = kv_get_pi(rdev);

sys/dev/pci/drm/radeon/kv_dpm.c

997

pi->requested_rps = *rps;

sys/dev/pci/drm/radeon/kv_dpm.c

998

pi->requested_ps = *new_ps;

sys/dev/pci/drm/radeon/kv_dpm.c

999

pi->requested_rps.ps_priv = &pi->requested_ps;

sys/dev/pci/drm/radeon/ni_dpm.c

1000

table->entries[i].v = pi->max_vddc;

sys/dev/pci/drm/radeon/ni_dpm.c

1099

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

1108

&tmp, pi->sram_end);

sys/dev/pci/drm/radeon/ni_dpm.c

1113

pi->state_table_start = (u16)tmp;

sys/dev/pci/drm/radeon/ni_dpm.c

1118

&tmp, pi->sram_end);

sys/dev/pci/drm/radeon/ni_dpm.c

1123

pi->soft_regs_start = (u16)tmp;

sys/dev/pci/drm/radeon/ni_dpm.c

1128

&tmp, pi->sram_end);

sys/dev/pci/drm/radeon/ni_dpm.c

1138

&tmp, pi->sram_end);

sys/dev/pci/drm/radeon/ni_dpm.c

1148

&tmp, pi->sram_end);

sys/dev/pci/drm/radeon/ni_dpm.c

1158

&tmp, pi->sram_end);

sys/dev/pci/drm/radeon/ni_dpm.c

1168

&tmp, pi->sram_end);

sys/dev/pci/drm/radeon/ni_dpm.c

1202

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

1204

if (pi->gfx_clock_gating) {

sys/dev/pci/drm/radeon/ni_dpm.c

1272

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

1283

if (pi->max_vddc_in_table <= eg_pi->vddc_voltage_table.entries[i].value) {

sys/dev/pci/drm/radeon/ni_dpm.c

1324

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

1327

if (!pi->mvdd_control) {

sys/dev/pci/drm/radeon/ni_dpm.c

1333

if (mclk <= pi->mvdd_split_frequency) {

sys/dev/pci/drm/radeon/ni_dpm.c

1455

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

1493

(u16)(pi->state_table_start + offsetof(NISLANDS_SMC_STATETABLE, dpm2Params) +

sys/dev/pci/drm/radeon/ni_dpm.c

1496

sizeof(u32) * 4, pi->sram_end);

sys/dev/pci/drm/radeon/ni_dpm.c

1571

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

1577

&tmp, pi->sram_end);

sys/dev/pci/drm/radeon/ni_dpm.c

1585

tmp, pi->sram_end);

sys/dev/pci/drm/radeon/ni_dpm.c

1595

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

1601

&tmp, pi->sram_end);

sys/dev/pci/drm/radeon/ni_dpm.c

1639

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

1656

pi->sram_end);

sys/dev/pci/drm/radeon/ni_dpm.c

1684

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

1754

table->initialState.level.bSP = cpu_to_be32(pi->dsp);

sys/dev/pci/drm/radeon/ni_dpm.c

1756

if (pi->boot_in_gen2)

sys/dev/pci/drm/radeon/ni_dpm.c

1761

if (pi->mem_gddr5) {

sys/dev/pci/drm/radeon/ni_dpm.c

1766

if (initial_state->performance_levels[0].mclk > pi->mclk_edc_enable_threshold)

sys/dev/pci/drm/radeon/ni_dpm.c

1793

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

1813

if (pi->acpi_vddc) {

sys/dev/pci/drm/radeon/ni_dpm.c

1816

pi->acpi_vddc, &table->ACPIState.level.vddc);

sys/dev/pci/drm/radeon/ni_dpm.c

1828

if (pi->pcie_gen2) {

sys/dev/pci/drm/radeon/ni_dpm.c

1829

if (pi->acpi_pcie_gen2)

sys/dev/pci/drm/radeon/ni_dpm.c

1839

pi->min_vddc_in_table,

sys/dev/pci/drm/radeon/ni_dpm.c

1868

if (pi->mem_gddr5)

sys/dev/pci/drm/radeon/ni_dpm.c

1940

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

1972

if (pi->mem_gddr5)

sys/dev/pci/drm/radeon/ni_dpm.c

1994

return rv770_copy_bytes_to_smc(rdev, pi->state_table_start, (u8 *)table,

sys/dev/pci/drm/radeon/ni_dpm.c

1995

sizeof(NISLANDS_SMC_STATETABLE), pi->sram_end);

sys/dev/pci/drm/radeon/ni_dpm.c

2002

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

2040

if (pi->sclk_ss) {

sys/dev/pci/drm/radeon/ni_dpm.c

2092

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

2153

sizeof(SMC_NISLANDS_SPLL_DIV_TABLE), pi->sram_end);

sys/dev/pci/drm/radeon/ni_dpm.c

2167

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

2213

if (pi->mem_gddr5) {

sys/dev/pci/drm/radeon/ni_dpm.c

2236

if (pi->mclk_ss) {

sys/dev/pci/drm/radeon/ni_dpm.c

2260

dll_speed = rv740_get_dll_speed(pi->mem_gddr5,

sys/dev/pci/drm/radeon/ni_dpm.c

2303

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

2307

smc_state->levels[i].bSP = cpu_to_be32(pi->dsp);

sys/dev/pci/drm/radeon/ni_dpm.c

2310

cpu_to_be32(pi->psp);

sys/dev/pci/drm/radeon/ni_dpm.c

2317

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

2325

level->gen2PCIE = pi->pcie_gen2 ?

sys/dev/pci/drm/radeon/ni_dpm.c

2333

if (pi->mclk_stutter_mode_threshold &&

sys/dev/pci/drm/radeon/ni_dpm.c

2334

(pl->mclk <= pi->mclk_stutter_mode_threshold) &&

sys/dev/pci/drm/radeon/ni_dpm.c

2340

if (pi->mem_gddr5) {

sys/dev/pci/drm/radeon/ni_dpm.c

2341

if (pl->mclk > pi->mclk_edc_enable_threshold)

sys/dev/pci/drm/radeon/ni_dpm.c

2398

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

2441

a_t |= CG_R(t_l * pi->bsp / 20000);

sys/dev/pci/drm/radeon/ni_dpm.c

2445

pi->pbsp : pi->bsp;

sys/dev/pci/drm/radeon/ni_dpm.c

2458

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

2491

pi->state_table_start +

sys/dev/pci/drm/radeon/ni_dpm.c

2495

pi->sram_end);

sys/dev/pci/drm/radeon/ni_dpm.c

2690

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

2691

u16 address = pi->state_table_start +

sys/dev/pci/drm/radeon/ni_dpm.c

2706

ret = rv770_copy_bytes_to_smc(rdev, address, (u8 *)smc_state, state_size, pi->sram_end);

sys/dev/pci/drm/radeon/ni_dpm.c

2717

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

2744

if (!pi->mem_gddr5)

sys/dev/pci/drm/radeon/ni_dpm.c

2998

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

3023

pi->sram_end);

sys/dev/pci/drm/radeon/ni_dpm.c

3029

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

3046

pi->sram_end);

sys/dev/pci/drm/radeon/ni_dpm.c

3141

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

3195

sizeof(PP_NIslands_CACTABLES), pi->sram_end);

sys/dev/pci/drm/radeon/ni_dpm.c

3441

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

3448

pi->pcie_gen2 = true;

sys/dev/pci/drm/radeon/ni_dpm.c

3450

pi->pcie_gen2 = false;

sys/dev/pci/drm/radeon/ni_dpm.c

3452

if (!pi->pcie_gen2)

sys/dev/pci/drm/radeon/ni_dpm.c

3461

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

3469

if (!pi->boot_in_gen2) {

sys/dev/pci/drm/radeon/ni_dpm.c

3484

if (!pi->boot_in_gen2) {

sys/dev/pci/drm/radeon/ni_dpm.c

3587

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

3592

if (pi->gfx_clock_gating)

sys/dev/pci/drm/radeon/ni_dpm.c

3596

if (pi->mg_clock_gating)

sys/dev/pci/drm/radeon/ni_dpm.c

3600

if (pi->voltage_control) {

sys/dev/pci/drm/radeon/ni_dpm.c

3613

if (pi->dynamic_ss)

sys/dev/pci/drm/radeon/ni_dpm.c

3615

if (pi->thermal_protection)

sys/dev/pci/drm/radeon/ni_dpm.c

3624

if (pi->dynamic_pcie_gen2)

sys/dev/pci/drm/radeon/ni_dpm.c

3689

if (pi->gfx_clock_gating)

sys/dev/pci/drm/radeon/ni_dpm.c

3691

if (pi->mg_clock_gating)

sys/dev/pci/drm/radeon/ni_dpm.c

3705

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

3712

if (pi->thermal_protection)

sys/dev/pci/drm/radeon/ni_dpm.c

3718

if (pi->dynamic_pcie_gen2)

sys/dev/pci/drm/radeon/ni_dpm.c

3727

if (pi->gfx_clock_gating)

sys/dev/pci/drm/radeon/ni_dpm.c

3729

if (pi->mg_clock_gating)

sys/dev/pci/drm/radeon/ni_dpm.c

3924

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

3942

if (pi->max_vddc)

sys/dev/pci/drm/radeon/ni_dpm.c

3943

pl->vddc = pi->max_vddc;

sys/dev/pci/drm/radeon/ni_dpm.c

3947

pi->acpi_vddc = pl->vddc;

sys/dev/pci/drm/radeon/ni_dpm.c

3950

pi->acpi_pcie_gen2 = true;

sys/dev/pci/drm/radeon/ni_dpm.c

3952

pi->acpi_pcie_gen2 = false;

sys/dev/pci/drm/radeon/ni_dpm.c

3960

if (pi->min_vddc_in_table > pl->vddc)

sys/dev/pci/drm/radeon/ni_dpm.c

3961

pi->min_vddc_in_table = pl->vddc;

sys/dev/pci/drm/radeon/ni_dpm.c

3963

if (pi->max_vddc_in_table < pl->vddc)

sys/dev/pci/drm/radeon/ni_dpm.c

3964

pi->max_vddc_in_table = pl->vddc;

sys/dev/pci/drm/radeon/ni_dpm.c

4048

struct rv7xx_power_info *pi;

sys/dev/pci/drm/radeon/ni_dpm.c

4059

pi = &eg_pi->rv7xx;

sys/dev/pci/drm/radeon/ni_dpm.c

4064

pi->acpi_vddc = 0;

sys/dev/pci/drm/radeon/ni_dpm.c

4066

pi->min_vddc_in_table = 0;

sys/dev/pci/drm/radeon/ni_dpm.c

4067

pi->max_vddc_in_table = 0;

sys/dev/pci/drm/radeon/ni_dpm.c

4108

pi->ref_div = dividers.ref_div + 1;

sys/dev/pci/drm/radeon/ni_dpm.c

4110

pi->ref_div = R600_REFERENCEDIVIDER_DFLT;

sys/dev/pci/drm/radeon/ni_dpm.c

4112

pi->rlp = RV770_RLP_DFLT;

sys/dev/pci/drm/radeon/ni_dpm.c

4113

pi->rmp = RV770_RMP_DFLT;

sys/dev/pci/drm/radeon/ni_dpm.c

4114

pi->lhp = RV770_LHP_DFLT;

sys/dev/pci/drm/radeon/ni_dpm.c

4115

pi->lmp = RV770_LMP_DFLT;

sys/dev/pci/drm/radeon/ni_dpm.c

4130

pi->mclk_strobe_mode_threshold = 55000;

sys/dev/pci/drm/radeon/ni_dpm.c

4131

pi->mclk_edc_enable_threshold = 55000;

sys/dev/pci/drm/radeon/ni_dpm.c

4134

pi->mclk_strobe_mode_threshold = 40000;

sys/dev/pci/drm/radeon/ni_dpm.c

4135

pi->mclk_edc_enable_threshold = 40000;

sys/dev/pci/drm/radeon/ni_dpm.c

4140

pi->voltage_control =

sys/dev/pci/drm/radeon/ni_dpm.c

4143

pi->mvdd_control =

sys/dev/pci/drm/radeon/ni_dpm.c

4151

pi->asi = RV770_ASI_DFLT;

sys/dev/pci/drm/radeon/ni_dpm.c

4152

pi->pasi = CYPRESS_HASI_DFLT;

sys/dev/pci/drm/radeon/ni_dpm.c

4153

pi->vrc = CYPRESS_VRC_DFLT;

sys/dev/pci/drm/radeon/ni_dpm.c

4155

pi->power_gating = false;

sys/dev/pci/drm/radeon/ni_dpm.c

4157

pi->gfx_clock_gating = true;

sys/dev/pci/drm/radeon/ni_dpm.c

4159

pi->mg_clock_gating = true;

sys/dev/pci/drm/radeon/ni_dpm.c

4160

pi->mgcgtssm = true;

sys/dev/pci/drm/radeon/ni_dpm.c

4164

pi->dynamic_pcie_gen2 = true;

sys/dev/pci/drm/radeon/ni_dpm.c

4167

pi->thermal_protection = true;

sys/dev/pci/drm/radeon/ni_dpm.c

4169

pi->thermal_protection = false;

sys/dev/pci/drm/radeon/ni_dpm.c

4171

pi->display_gap = true;

sys/dev/pci/drm/radeon/ni_dpm.c

4173

pi->dcodt = true;

sys/dev/pci/drm/radeon/ni_dpm.c

4175

pi->ulps = true;

sys/dev/pci/drm/radeon/ni_dpm.c

4193

pi->mclk_stutter_mode_threshold = 0;

sys/dev/pci/drm/radeon/ni_dpm.c

4195

pi->sram_end = SMC_RAM_END;

sys/dev/pci/drm/radeon/ni_dpm.c

728

struct ni_power_info *pi = rdev->pm.dpm.priv;

sys/dev/pci/drm/radeon/ni_dpm.c

730

return pi;

sys/dev/pci/drm/radeon/ni_dpm.c

773

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

776

u32 switch_limit = pi->mem_gddr5 ? 450 : 0;

sys/dev/pci/drm/radeon/ni_dpm.c

992

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/ni_dpm.c

998

if (pi->max_vddc == 0)

sys/dev/pci/drm/radeon/rs780_dpm.c

1022

struct igp_power_info *pi = rs780_get_pi(rdev);

sys/dev/pci/drm/radeon/rs780_dpm.c

1024

return pi->bootup_uma_clk;

sys/dev/pci/drm/radeon/rs780_dpm.c

1030

struct igp_power_info *pi = rs780_get_pi(rdev);

sys/dev/pci/drm/radeon/rs780_dpm.c

1040

if (pi->voltage_control)

sys/dev/pci/drm/radeon/rs780_dpm.c

1041

rs780_force_voltage(rdev, pi->max_voltage);

sys/dev/pci/drm/radeon/rs780_dpm.c

1057

if (pi->voltage_control)

sys/dev/pci/drm/radeon/rs780_dpm.c

1058

rs780_force_voltage(rdev, pi->min_voltage);

sys/dev/pci/drm/radeon/rs780_dpm.c

1060

if (pi->voltage_control)

sys/dev/pci/drm/radeon/rs780_dpm.c

1061

rs780_force_voltage(rdev, pi->max_voltage);

sys/dev/pci/drm/radeon/rs780_dpm.c

1068

if (pi->voltage_control) {

sys/dev/pci/drm/radeon/rs780_dpm.c

225

struct igp_power_info *pi = rs780_get_pi(rdev);

sys/dev/pci/drm/radeon/rs780_dpm.c

244

if (pi->pwm_voltage_control) {

sys/dev/pci/drm/radeon/rs780_dpm.c

245

fv_throt_pwm_range[0] = pi->min_voltage;

sys/dev/pci/drm/radeon/rs780_dpm.c

246

fv_throt_pwm_range[1] = pi->min_voltage;

sys/dev/pci/drm/radeon/rs780_dpm.c

247

fv_throt_pwm_range[2] = pi->max_voltage;

sys/dev/pci/drm/radeon/rs780_dpm.c

248

fv_throt_pwm_range[3] = pi->max_voltage;

sys/dev/pci/drm/radeon/rs780_dpm.c

250

fv_throt_pwm_range[0] = pi->invert_pwm_required ?

sys/dev/pci/drm/radeon/rs780_dpm.c

252

fv_throt_pwm_range[1] = pi->invert_pwm_required ?

sys/dev/pci/drm/radeon/rs780_dpm.c

254

fv_throt_pwm_range[2] = pi->invert_pwm_required ?

sys/dev/pci/drm/radeon/rs780_dpm.c

256

fv_throt_pwm_range[3] = pi->invert_pwm_required ?

sys/dev/pci/drm/radeon/rs780_dpm.c

261

STARTING_PWM_HIGHTIME(pi->max_voltage),

sys/dev/pci/drm/radeon/rs780_dpm.c

265

NUMBER_OF_CYCLES_IN_PERIOD(pi->num_of_cycles_in_period),

sys/dev/pci/drm/radeon/rs780_dpm.c

271

if (pi->invert_pwm_required)

sys/dev/pci/drm/radeon/rs780_dpm.c

279

(MIN_PWM_HIGHTIME(pi->min_voltage) |

sys/dev/pci/drm/radeon/rs780_dpm.c

280

MAX_PWM_HIGHTIME(pi->max_voltage)));

sys/dev/pci/drm/radeon/rs780_dpm.c

364

struct igp_power_info *pi = rs780_get_pi(rdev);

sys/dev/pci/drm/radeon/rs780_dpm.c

366

WREG32(FVTHROT_TARGET_REG, 30000000 / pi->refresh_rate);

sys/dev/pci/drm/radeon/rs780_dpm.c

367

WREG32(FVTHROT_CB1, 1000000 * 5 / pi->refresh_rate);

sys/dev/pci/drm/radeon/rs780_dpm.c

368

WREG32(FVTHROT_CB2, 1000000 * 10 / pi->refresh_rate);

sys/dev/pci/drm/radeon/rs780_dpm.c

369

WREG32(FVTHROT_CB3, 1000000 * 30 / pi->refresh_rate);

sys/dev/pci/drm/radeon/rs780_dpm.c

370

WREG32(FVTHROT_CB4, 1000000 * 50 / pi->refresh_rate);

sys/dev/pci/drm/radeon/rs780_dpm.c

44

struct igp_power_info *pi = rdev->pm.dpm.priv;

sys/dev/pci/drm/radeon/rs780_dpm.c

46

return pi;

sys/dev/pci/drm/radeon/rs780_dpm.c

479

struct igp_power_info *pi = rs780_get_pi(rdev);

sys/dev/pci/drm/radeon/rs780_dpm.c

485

if (pi->crtc_id == 0)

sys/dev/pci/drm/radeon/rs780_dpm.c

51

struct igp_power_info *pi = rs780_get_pi(rdev);

sys/dev/pci/drm/radeon/rs780_dpm.c

512

struct igp_power_info *pi = rs780_get_pi(rdev);

sys/dev/pci/drm/radeon/rs780_dpm.c

515

return pi->max_voltage;

sys/dev/pci/drm/radeon/rs780_dpm.c

517

return pi->min_voltage;

sys/dev/pci/drm/radeon/rs780_dpm.c

519

return pi->max_voltage;

sys/dev/pci/drm/radeon/rs780_dpm.c

526

struct igp_power_info *pi = rs780_get_pi(rdev);

sys/dev/pci/drm/radeon/rs780_dpm.c

549

if (pi->max_voltage != vddc_high) {

sys/dev/pci/drm/radeon/rs780_dpm.c

58

pi->crtc_id = 0;

sys/dev/pci/drm/radeon/rs780_dpm.c

59

pi->refresh_rate = 60;

sys/dev/pci/drm/radeon/rs780_dpm.c

599

struct igp_power_info *pi = rs780_get_pi(rdev);

sys/dev/pci/drm/radeon/rs780_dpm.c

615

if (pi->voltage_control)

sys/dev/pci/drm/radeon/rs780_dpm.c

624

if (pi->gfx_clock_gating)

sys/dev/pci/drm/radeon/rs780_dpm.c

632

struct igp_power_info *pi = rs780_get_pi(rdev);

sys/dev/pci/drm/radeon/rs780_dpm.c

639

if (pi->gfx_clock_gating)

sys/dev/pci/drm/radeon/rs780_dpm.c

65

pi->crtc_id = radeon_crtc->crtc_id;

sys/dev/pci/drm/radeon/rs780_dpm.c

651

struct igp_power_info *pi = rs780_get_pi(rdev);

sys/dev/pci/drm/radeon/rs780_dpm.c

660

if (pi->voltage_control) {

sys/dev/pci/drm/radeon/rs780_dpm.c

661

rs780_force_voltage(rdev, pi->max_voltage);

sys/dev/pci/drm/radeon/rs780_dpm.c

67

pi->refresh_rate = drm_mode_vrefresh(&crtc->mode);

sys/dev/pci/drm/radeon/rs780_dpm.c

672

if (pi->voltage_control)

sys/dev/pci/drm/radeon/rs780_dpm.c

849

struct igp_power_info *pi;

sys/dev/pci/drm/radeon/rs780_dpm.c

856

pi = kzalloc(sizeof(struct igp_power_info), GFP_KERNEL);

sys/dev/pci/drm/radeon/rs780_dpm.c

857

if (pi == NULL)

sys/dev/pci/drm/radeon/rs780_dpm.c

859

rdev->pm.dpm.priv = pi;

sys/dev/pci/drm/radeon/rs780_dpm.c

869

pi->voltage_control = false;

sys/dev/pci/drm/radeon/rs780_dpm.c

870

pi->gfx_clock_gating = true;

sys/dev/pci/drm/radeon/rs780_dpm.c

879

pi->num_of_cycles_in_period =

sys/dev/pci/drm/radeon/rs780_dpm.c

881

pi->num_of_cycles_in_period |=

sys/dev/pci/drm/radeon/rs780_dpm.c

883

pi->invert_pwm_required =

sys/dev/pci/drm/radeon/rs780_dpm.c

884

(pi->num_of_cycles_in_period & 0x8000) ? true : false;

sys/dev/pci/drm/radeon/rs780_dpm.c

885

pi->boot_voltage = info->info.ucStartingPWM_HighTime;

sys/dev/pci/drm/radeon/rs780_dpm.c

886

pi->max_voltage = info->info.ucMaxNBVoltage;

sys/dev/pci/drm/radeon/rs780_dpm.c

887

pi->max_voltage |= info->info.ucMaxNBVoltageHigh << 8;

sys/dev/pci/drm/radeon/rs780_dpm.c

888

pi->min_voltage = info->info.ucMinNBVoltage;

sys/dev/pci/drm/radeon/rs780_dpm.c

889

pi->min_voltage |= info->info.ucMinNBVoltageHigh << 8;

sys/dev/pci/drm/radeon/rs780_dpm.c

890

pi->inter_voltage_low =

sys/dev/pci/drm/radeon/rs780_dpm.c

892

pi->inter_voltage_high =

sys/dev/pci/drm/radeon/rs780_dpm.c

894

pi->voltage_control = true;

sys/dev/pci/drm/radeon/rs780_dpm.c

895

pi->bootup_uma_clk = info->info.usK8MemoryClock * 100;

sys/dev/pci/drm/radeon/rs780_dpm.c

898

pi->num_of_cycles_in_period =

sys/dev/pci/drm/radeon/rs780_dpm.c

900

pi->invert_pwm_required =

sys/dev/pci/drm/radeon/rs780_dpm.c

901

(pi->num_of_cycles_in_period & 0x8000) ? true : false;

sys/dev/pci/drm/radeon/rs780_dpm.c

902

pi->boot_voltage =

sys/dev/pci/drm/radeon/rs780_dpm.c

904

pi->max_voltage =

sys/dev/pci/drm/radeon/rs780_dpm.c

906

pi->min_voltage =

sys/dev/pci/drm/radeon/rs780_dpm.c

908

pi->system_config =

sys/dev/pci/drm/radeon/rs780_dpm.c

910

pi->pwm_voltage_control =

sys/dev/pci/drm/radeon/rs780_dpm.c

911

(pi->system_config & 0x4) ? true : false;

sys/dev/pci/drm/radeon/rs780_dpm.c

912

pi->voltage_control = true;

sys/dev/pci/drm/radeon/rs780_dpm.c

913

pi->bootup_uma_clk = le32_to_cpu(info->info_2.ulBootUpUMAClock);

sys/dev/pci/drm/radeon/rs780_dpm.c

919

if (pi->min_voltage > pi->max_voltage)

sys/dev/pci/drm/radeon/rs780_dpm.c

920

pi->voltage_control = false;

sys/dev/pci/drm/radeon/rs780_dpm.c

921

if (pi->pwm_voltage_control) {

sys/dev/pci/drm/radeon/rs780_dpm.c

922

if ((pi->num_of_cycles_in_period == 0) ||

sys/dev/pci/drm/radeon/rs780_dpm.c

923

(pi->max_voltage == 0) ||

sys/dev/pci/drm/radeon/rs780_dpm.c

924

(pi->min_voltage == 0))

sys/dev/pci/drm/radeon/rs780_dpm.c

925

pi->voltage_control = false;

sys/dev/pci/drm/radeon/rs780_dpm.c

927

if ((pi->num_of_cycles_in_period == 0) ||

sys/dev/pci/drm/radeon/rs780_dpm.c

928

(pi->max_voltage == 0))

sys/dev/pci/drm/radeon/rs780_dpm.c

929

pi->voltage_control = false;

sys/dev/pci/drm/radeon/rs780_dpm.c

976

struct igp_power_info *pi = rs780_get_pi(rdev);

sys/dev/pci/drm/radeon/rs780_dpm.c

978

return pi->bootup_uma_clk;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1021

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1023

pi->hw.lp[0] = 0;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1024

pi->hw.rp[R600_PM_NUMBER_OF_ACTIVITY_LEVELS - 1]

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1032

&pi->hw.lp[1],

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1033

&pi->hw.rp[0]);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1040

&pi->hw.lp[2],

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1041

&pi->hw.rp[1]);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1058

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1061

if (pi->voltage_control)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1071

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1074

if (pi->voltage_control)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1082

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1085

pi->hw.low_vddc_index);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1087

pi->hw.low_mclk_index);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1089

pi->hw.low_sclk_index);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1093

pi->hw.pcie_gen2[R600_POWER_LEVEL_LOW]);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1098

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1108

pi->hw.pcie_gen2[R600_POWER_LEVEL_LOW]);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1114

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1117

pi->hw.medium_vddc_index);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1119

pi->hw.medium_mclk_index);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1121

pi->hw.medium_sclk_index);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1125

pi->hw.pcie_gen2[R600_POWER_LEVEL_MEDIUM]);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1130

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1134

pi->hw.mclks[pi->hw.low_mclk_index]);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1141

pi->hw.medium_sclk_index);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1149

pi->hw.pcie_gen2[R600_POWER_LEVEL_LOW]);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1154

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1157

pi->hw.high_vddc_index);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1159

pi->hw.high_mclk_index);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1161

pi->hw.high_sclk_index);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1167

pi->hw.pcie_gen2[R600_POWER_LEVEL_HIGH]);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1336

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1338

if ((pi->restricted_levels < 1) ||

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1339

(pi->restricted_levels == 3))

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1345

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1347

if (pi->restricted_levels < 2)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1353

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1381

if (pi->thermal_protection)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1392

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1395

if (!(pi->active_auto_throttle_sources & (1 << source))) {

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1396

pi->active_auto_throttle_sources |= 1 << source;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1397

rv6xx_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1400

if (pi->active_auto_throttle_sources & (1 << source)) {

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1401

pi->active_auto_throttle_sources &= ~(1 << source);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1402

rv6xx_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1411

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1413

if (pi->active_auto_throttle_sources)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1423

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1428

0, &pi->hw.medium_sclk_index);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1435

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1437

pi->hw.low_sclk_index = 0;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1445

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1448

pi->hw.medium_sclk_index);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1455

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1457

pi->hw.low_sclk_index = 0;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1463

&pi->hw.medium_sclk_index);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1467

pi->hw.medium_sclk_index,

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1468

&pi->hw.high_sclk_index);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1547

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1556

if (pi->dynamic_ss)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1571

if (pi->display_gap == false)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1578

if (pi->voltage_control)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1600

if (pi->voltage_control)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1603

if (pi->dynamic_pcie_gen2)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1606

if (pi->gfx_clock_gating)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1614

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

162

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1626

if (pi->thermal_protection)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1638

if (pi->voltage_control)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1641

if (pi->dynamic_pcie_gen2)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1650

if (pi->gfx_clock_gating)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1658

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1663

pi->restricted_levels = 0;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

167

pi->spll_ref_div,

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1671

if (pi->thermal_protection)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1681

if (pi->voltage_control) {

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1690

if (pi->dynamic_pcie_gen2)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1693

if (pi->voltage_control)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1699

if (pi->voltage_control) {

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1719

if (pi->voltage_control) {

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1731

if (pi->dynamic_pcie_gen2)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1744

if (pi->thermal_protection)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

183

fb_divider = ((step->vco_frequency * pi->spll_ref_div) / ref_clk) >>

sys/dev/pci/drm/radeon/rv6xx_dpm.c

184

pi->fb_div_scale;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

187

pi->spll_ref_div - 1);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1936

struct rv6xx_power_info *pi;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1939

pi = kzalloc(sizeof(struct rv6xx_power_info), GFP_KERNEL);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1940

if (pi == NULL)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1942

rdev->pm.dpm.priv = pi;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1960

pi->spll_ref_div = dividers.ref_div + 1;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1962

pi->spll_ref_div = R600_REFERENCEDIVIDER_DFLT;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1967

pi->mpll_ref_div = dividers.ref_div + 1;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1969

pi->mpll_ref_div = R600_REFERENCEDIVIDER_DFLT;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1972

pi->fb_div_scale = 1;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1974

pi->fb_div_scale = 0;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1976

pi->voltage_control =

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1979

pi->gfx_clock_gating = true;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1981

pi->sclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss,

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1983

pi->mclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss,

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1987

pi->sclk_ss = false;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1989

if (pi->sclk_ss || pi->mclk_ss)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1990

pi->dynamic_ss = true;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1992

pi->dynamic_ss = false;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1994

pi->dynamic_pcie_gen2 = true;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1996

if (pi->gfx_clock_gating &&

sys/dev/pci/drm/radeon/rv6xx_dpm.c

1998

pi->thermal_protection = true;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

2000

pi->thermal_protection = false;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

2002

pi->display_gap = true;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

2133

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

2136

pi->restricted_levels = 3;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

2138

pi->restricted_levels = 2;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

2140

pi->restricted_levels = 0;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

2151

if (pi->restricted_levels == 3)

sys/dev/pci/drm/radeon/rv6xx_dpm.c

436

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

438

pi->hw.sclks[R600_POWER_LEVEL_LOW] =

sys/dev/pci/drm/radeon/rv6xx_dpm.c

440

pi->hw.sclks[R600_POWER_LEVEL_MEDIUM] =

sys/dev/pci/drm/radeon/rv6xx_dpm.c

442

pi->hw.sclks[R600_POWER_LEVEL_HIGH] =

sys/dev/pci/drm/radeon/rv6xx_dpm.c

445

pi->hw.low_sclk_index = R600_POWER_LEVEL_LOW;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

446

pi->hw.medium_sclk_index = R600_POWER_LEVEL_MEDIUM;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

447

pi->hw.high_sclk_index = R600_POWER_LEVEL_HIGH;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

45

struct rv6xx_power_info *pi = rdev->pm.dpm.priv;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

453

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

455

pi->hw.mclks[R600_POWER_LEVEL_CTXSW] =

sys/dev/pci/drm/radeon/rv6xx_dpm.c

457

pi->hw.mclks[R600_POWER_LEVEL_HIGH] =

sys/dev/pci/drm/radeon/rv6xx_dpm.c

459

pi->hw.mclks[R600_POWER_LEVEL_MEDIUM] =

sys/dev/pci/drm/radeon/rv6xx_dpm.c

461

pi->hw.mclks[R600_POWER_LEVEL_LOW] =

sys/dev/pci/drm/radeon/rv6xx_dpm.c

464

pi->hw.high_mclk_index = R600_POWER_LEVEL_HIGH;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

467

pi->hw.medium_mclk_index =

sys/dev/pci/drm/radeon/rv6xx_dpm.c

468

pi->hw.high_mclk_index;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

47

return pi;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

470

pi->hw.medium_mclk_index = R600_POWER_LEVEL_MEDIUM;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

474

pi->hw.low_mclk_index =

sys/dev/pci/drm/radeon/rv6xx_dpm.c

475

pi->hw.medium_mclk_index;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

477

pi->hw.low_mclk_index = R600_POWER_LEVEL_LOW;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

483

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

485

pi->hw.vddc[R600_POWER_LEVEL_CTXSW] = state->high.vddc;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

486

pi->hw.vddc[R600_POWER_LEVEL_HIGH] = state->high.vddc;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

487

pi->hw.vddc[R600_POWER_LEVEL_MEDIUM] = state->medium.vddc;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

488

pi->hw.vddc[R600_POWER_LEVEL_LOW] = state->low.vddc;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

490

pi->hw.backbias[R600_POWER_LEVEL_CTXSW] =

sys/dev/pci/drm/radeon/rv6xx_dpm.c

492

pi->hw.backbias[R600_POWER_LEVEL_HIGH] =

sys/dev/pci/drm/radeon/rv6xx_dpm.c

494

pi->hw.backbias[R600_POWER_LEVEL_MEDIUM] =

sys/dev/pci/drm/radeon/rv6xx_dpm.c

496

pi->hw.backbias[R600_POWER_LEVEL_LOW] =

sys/dev/pci/drm/radeon/rv6xx_dpm.c

499

pi->hw.pcie_gen2[R600_POWER_LEVEL_HIGH] =

sys/dev/pci/drm/radeon/rv6xx_dpm.c

501

pi->hw.pcie_gen2[R600_POWER_LEVEL_MEDIUM] =

sys/dev/pci/drm/radeon/rv6xx_dpm.c

503

pi->hw.pcie_gen2[R600_POWER_LEVEL_LOW] =

sys/dev/pci/drm/radeon/rv6xx_dpm.c

506

pi->hw.high_vddc_index = R600_POWER_LEVEL_HIGH;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

511

pi->hw.medium_vddc_index =

sys/dev/pci/drm/radeon/rv6xx_dpm.c

512

pi->hw.high_vddc_index;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

514

pi->hw.medium_vddc_index = R600_POWER_LEVEL_MEDIUM;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

519

pi->hw.low_vddc_index =

sys/dev/pci/drm/radeon/rv6xx_dpm.c

520

pi->hw.medium_vddc_index;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

522

pi->hw.medium_vddc_index = R600_POWER_LEVEL_LOW;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

552

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

559

if (clock && pi->sclk_ss) {

sys/dev/pci/drm/radeon/rv6xx_dpm.c

562

pi->fb_div_scale);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

570

pi->fb_div_scale);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

585

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

588

pi->hw.sclks[R600_POWER_LEVEL_HIGH],

sys/dev/pci/drm/radeon/rv6xx_dpm.c

592

pi->hw.sclks[R600_POWER_LEVEL_MEDIUM],

sys/dev/pci/drm/radeon/rv6xx_dpm.c

620

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

624

if (pi->hw.mclks[i])

sys/dev/pci/drm/radeon/rv6xx_dpm.c

626

pi->hw.mclks[i]);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

636

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

643

pi->fb_div_scale);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

654

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

662

if (pi->mclk_ss) {

sys/dev/pci/drm/radeon/rv6xx_dpm.c

664

pi->hw.mclks[pi->hw.high_mclk_index],

sys/dev/pci/drm/radeon/rv6xx_dpm.c

670

pi->hw.mclks[pi->hw.medium_mclk_index],

sys/dev/pci/drm/radeon/rv6xx_dpm.c

676

pi->hw.mclks[pi->hw.low_mclk_index],

sys/dev/pci/drm/radeon/rv6xx_dpm.c

688

pi->fb_div_scale);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

720

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

725

pi->hw.vddc[i]);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

731

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

733

if (pi->hw.backbias[1])

sys/dev/pci/drm/radeon/rv6xx_dpm.c

738

if (pi->hw.backbias[2])

sys/dev/pci/drm/radeon/rv6xx_dpm.c

746

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

749

pi->hw.sclks[R600_POWER_LEVEL_LOW],

sys/dev/pci/drm/radeon/rv6xx_dpm.c

755

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

757

if (pi->hw.mclks[0])

sys/dev/pci/drm/radeon/rv6xx_dpm.c

759

pi->hw.mclks[0]);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

764

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

767

pi->hw.vddc[0]);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

773

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

775

if (pi->hw.backbias[0])

sys/dev/pci/drm/radeon/rv6xx_dpm.c

796

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

801

if (pi->hw.sclks[R600_POWER_LEVEL_HIGH] <

sys/dev/pci/drm/radeon/rv6xx_dpm.c

802

(pi->hw.sclks[R600_POWER_LEVEL_LOW] * 0xFF / 0x40))

sys/dev/pci/drm/radeon/rv6xx_dpm.c

803

high_clock = pi->hw.sclks[R600_POWER_LEVEL_HIGH];

sys/dev/pci/drm/radeon/rv6xx_dpm.c

806

pi->hw.sclks[R600_POWER_LEVEL_LOW] * 0xFF / 0x40;

sys/dev/pci/drm/radeon/rv6xx_dpm.c

810

sqm_ratio = (STATE0(64 * high_clock / pi->hw.sclks[R600_POWER_LEVEL_LOW]) |

sys/dev/pci/drm/radeon/rv6xx_dpm.c

811

STATE1(64 * high_clock / pi->hw.sclks[R600_POWER_LEVEL_MEDIUM]) |

sys/dev/pci/drm/radeon/rv6xx_dpm.c

812

STATE2(64 * high_clock / pi->hw.sclks[R600_POWER_LEVEL_HIGH]) |

sys/dev/pci/drm/radeon/rv6xx_dpm.c

813

STATE3(64 * high_clock / pi->hw.sclks[R600_POWER_LEVEL_HIGH]));

sys/dev/pci/drm/radeon/rv6xx_dpm.c

818

pi->hw.sclks[R600_POWER_LEVEL_LOW])) |

sys/dev/pci/drm/radeon/rv6xx_dpm.c

820

pi->hw.sclks[R600_POWER_LEVEL_MEDIUM])) |

sys/dev/pci/drm/radeon/rv6xx_dpm.c

822

pi->hw.sclks[R600_POWER_LEVEL_HIGH])) |

sys/dev/pci/drm/radeon/rv6xx_dpm.c

824

pi->hw.sclks[R600_POWER_LEVEL_HIGH])));

sys/dev/pci/drm/radeon/rv6xx_dpm.c

830

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

833

pi->mpll_ref_div);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

839

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

844

&pi->bsp,

sys/dev/pci/drm/radeon/rv6xx_dpm.c

845

&pi->bsu);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

847

r600_set_bsp(rdev, pi->bsu, pi->bsp);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

852

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

855

(pi->hw.rp[0] * pi->bsp) / 200,

sys/dev/pci/drm/radeon/rv6xx_dpm.c

856

(pi->hw.rp[1] * pi->bsp) / 200,

sys/dev/pci/drm/radeon/rv6xx_dpm.c

857

(pi->hw.lp[2] * pi->bsp) / 200,

sys/dev/pci/drm/radeon/rv6xx_dpm.c

858

(pi->hw.lp[1] * pi->bsp) / 200);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

939

struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);

sys/dev/pci/drm/radeon/rv6xx_dpm.c

948

pi->hw.vddc[i],

sys/dev/pci/drm/radeon/rv730_dpm.c

120

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv730_dpm.c

121

u32 mclk_pwrmgt_cntl = pi->clk_regs.rv730.mclk_pwrmgt_cntl;

sys/dev/pci/drm/radeon/rv730_dpm.c

122

u32 dll_cntl = pi->clk_regs.rv730.dll_cntl;

sys/dev/pci/drm/radeon/rv730_dpm.c

123

u32 mpll_func_cntl = pi->clk_regs.rv730.mpll_func_cntl;

sys/dev/pci/drm/radeon/rv730_dpm.c

124

u32 mpll_func_cntl_2 = pi->clk_regs.rv730.mpll_func_cntl2;

sys/dev/pci/drm/radeon/rv730_dpm.c

125

u32 mpll_func_cntl_3 = pi->clk_regs.rv730.mpll_func_cntl3;

sys/dev/pci/drm/radeon/rv730_dpm.c

126

u32 mpll_ss = pi->clk_regs.rv730.mpll_ss;

sys/dev/pci/drm/radeon/rv730_dpm.c

127

u32 mpll_ss2 = pi->clk_regs.rv730.mpll_ss2;

sys/dev/pci/drm/radeon/rv730_dpm.c

163

if (pi->mclk_ss) {

sys/dev/pci/drm/radeon/rv730_dpm.c

197

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv730_dpm.c

199

pi->clk_regs.rv730.cg_spll_func_cntl =

sys/dev/pci/drm/radeon/rv730_dpm.c

201

pi->clk_regs.rv730.cg_spll_func_cntl_2 =

sys/dev/pci/drm/radeon/rv730_dpm.c

203

pi->clk_regs.rv730.cg_spll_func_cntl_3 =

sys/dev/pci/drm/radeon/rv730_dpm.c

205

pi->clk_regs.rv730.cg_spll_spread_spectrum =

sys/dev/pci/drm/radeon/rv730_dpm.c

207

pi->clk_regs.rv730.cg_spll_spread_spectrum_2 =

sys/dev/pci/drm/radeon/rv730_dpm.c

210

pi->clk_regs.rv730.mclk_pwrmgt_cntl =

sys/dev/pci/drm/radeon/rv730_dpm.c

212

pi->clk_regs.rv730.dll_cntl =

sys/dev/pci/drm/radeon/rv730_dpm.c

214

pi->clk_regs.rv730.mpll_func_cntl =

sys/dev/pci/drm/radeon/rv730_dpm.c

216

pi->clk_regs.rv730.mpll_func_cntl2 =

sys/dev/pci/drm/radeon/rv730_dpm.c

218

pi->clk_regs.rv730.mpll_func_cntl3 =

sys/dev/pci/drm/radeon/rv730_dpm.c

220

pi->clk_regs.rv730.mpll_ss =

sys/dev/pci/drm/radeon/rv730_dpm.c

222

pi->clk_regs.rv730.mpll_ss2 =

sys/dev/pci/drm/radeon/rv730_dpm.c

229

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv730_dpm.c

242

if (pi->acpi_vddc) {

sys/dev/pci/drm/radeon/rv730_dpm.c

243

rv770_populate_vddc_value(rdev, pi->acpi_vddc,

sys/dev/pci/drm/radeon/rv730_dpm.c

245

table->ACPIState.levels[0].gen2PCIE = pi->pcie_gen2 ?

sys/dev/pci/drm/radeon/rv730_dpm.c

246

pi->acpi_pcie_gen2 : 0;

sys/dev/pci/drm/radeon/rv730_dpm.c

248

pi->acpi_pcie_gen2;

sys/dev/pci/drm/radeon/rv730_dpm.c

250

rv770_populate_vddc_value(rdev, pi->min_vddc_in_table,

sys/dev/pci/drm/radeon/rv730_dpm.c

255

mpll_func_cntl = pi->clk_regs.rv730.mpll_func_cntl;

sys/dev/pci/drm/radeon/rv730_dpm.c

256

mpll_func_cntl_2 = pi->clk_regs.rv730.mpll_func_cntl2;

sys/dev/pci/drm/radeon/rv730_dpm.c

257

mpll_func_cntl_3 = pi->clk_regs.rv730.mpll_func_cntl3;

sys/dev/pci/drm/radeon/rv730_dpm.c

284

spll_func_cntl = pi->clk_regs.rv730.cg_spll_func_cntl;

sys/dev/pci/drm/radeon/rv730_dpm.c

285

spll_func_cntl_2 = pi->clk_regs.rv730.cg_spll_func_cntl_2;

sys/dev/pci/drm/radeon/rv730_dpm.c

286

spll_func_cntl_3 = pi->clk_regs.rv730.cg_spll_func_cntl_3;

sys/dev/pci/drm/radeon/rv730_dpm.c

321

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv730_dpm.c

325

cpu_to_be32(pi->clk_regs.rv730.mpll_func_cntl);

sys/dev/pci/drm/radeon/rv730_dpm.c

327

cpu_to_be32(pi->clk_regs.rv730.mpll_func_cntl2);

sys/dev/pci/drm/radeon/rv730_dpm.c

329

cpu_to_be32(pi->clk_regs.rv730.mpll_func_cntl3);

sys/dev/pci/drm/radeon/rv730_dpm.c

331

cpu_to_be32(pi->clk_regs.rv730.mclk_pwrmgt_cntl);

sys/dev/pci/drm/radeon/rv730_dpm.c

333

cpu_to_be32(pi->clk_regs.rv730.dll_cntl);

sys/dev/pci/drm/radeon/rv730_dpm.c

335

cpu_to_be32(pi->clk_regs.rv730.mpll_ss);

sys/dev/pci/drm/radeon/rv730_dpm.c

337

cpu_to_be32(pi->clk_regs.rv730.mpll_ss2);

sys/dev/pci/drm/radeon/rv730_dpm.c

343

cpu_to_be32(pi->clk_regs.rv730.cg_spll_func_cntl);

sys/dev/pci/drm/radeon/rv730_dpm.c

345

cpu_to_be32(pi->clk_regs.rv730.cg_spll_func_cntl_2);

sys/dev/pci/drm/radeon/rv730_dpm.c

347

cpu_to_be32(pi->clk_regs.rv730.cg_spll_func_cntl_3);

sys/dev/pci/drm/radeon/rv730_dpm.c

349

cpu_to_be32(pi->clk_regs.rv730.cg_spll_spread_spectrum);

sys/dev/pci/drm/radeon/rv730_dpm.c

351

cpu_to_be32(pi->clk_regs.rv730.cg_spll_spread_spectrum_2);

sys/dev/pci/drm/radeon/rv730_dpm.c

371

table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp);

sys/dev/pci/drm/radeon/rv730_dpm.c

373

if (pi->boot_in_gen2)

sys/dev/pci/drm/radeon/rv730_dpm.c

41

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv730_dpm.c

43

u32 spll_func_cntl = pi->clk_regs.rv730.cg_spll_func_cntl;

sys/dev/pci/drm/radeon/rv730_dpm.c

44

u32 spll_func_cntl_2 = pi->clk_regs.rv730.cg_spll_func_cntl_2;

sys/dev/pci/drm/radeon/rv730_dpm.c

45

u32 spll_func_cntl_3 = pi->clk_regs.rv730.cg_spll_func_cntl_3;

sys/dev/pci/drm/radeon/rv730_dpm.c

46

u32 cg_spll_spread_spectrum = pi->clk_regs.rv730.cg_spll_spread_spectrum;

sys/dev/pci/drm/radeon/rv730_dpm.c

47

u32 cg_spll_spread_spectrum_2 = pi->clk_regs.rv730.cg_spll_spread_spectrum_2;

sys/dev/pci/drm/radeon/rv730_dpm.c

475

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv730_dpm.c

481

mc4_io_pad_cntl |= pi->odt_value_0[i];

sys/dev/pci/drm/radeon/rv730_dpm.c

487

mc4_io_pad_cntl |= pi->odt_value_1[i];

sys/dev/pci/drm/radeon/rv730_dpm.c

494

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv730_dpm.c

497

pi->odt_value_0[0] = (u8)0;

sys/dev/pci/drm/radeon/rv730_dpm.c

498

pi->odt_value_1[0] = (u8)0x80;

sys/dev/pci/drm/radeon/rv730_dpm.c

501

pi->odt_value_0[1] = (u8)(mc4_io_pad_cntl & 0xff);

sys/dev/pci/drm/radeon/rv730_dpm.c

504

pi->odt_value_1[1] = (u8)(mc4_io_pad_cntl & 0xff);

sys/dev/pci/drm/radeon/rv730_dpm.c

88

if (pi->sclk_ss) {

sys/dev/pci/drm/radeon/rv740_dpm.c

122

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv740_dpm.c

124

u32 spll_func_cntl = pi->clk_regs.rv770.cg_spll_func_cntl;

sys/dev/pci/drm/radeon/rv740_dpm.c

125

u32 spll_func_cntl_2 = pi->clk_regs.rv770.cg_spll_func_cntl_2;

sys/dev/pci/drm/radeon/rv740_dpm.c

126

u32 spll_func_cntl_3 = pi->clk_regs.rv770.cg_spll_func_cntl_3;

sys/dev/pci/drm/radeon/rv740_dpm.c

127

u32 cg_spll_spread_spectrum = pi->clk_regs.rv770.cg_spll_spread_spectrum;

sys/dev/pci/drm/radeon/rv740_dpm.c

128

u32 cg_spll_spread_spectrum_2 = pi->clk_regs.rv770.cg_spll_spread_spectrum_2;

sys/dev/pci/drm/radeon/rv740_dpm.c

157

if (pi->sclk_ss) {

sys/dev/pci/drm/radeon/rv740_dpm.c

189

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv740_dpm.c

190

u32 mpll_ad_func_cntl = pi->clk_regs.rv770.mpll_ad_func_cntl;

sys/dev/pci/drm/radeon/rv740_dpm.c

191

u32 mpll_ad_func_cntl_2 = pi->clk_regs.rv770.mpll_ad_func_cntl_2;

sys/dev/pci/drm/radeon/rv740_dpm.c

192

u32 mpll_dq_func_cntl = pi->clk_regs.rv770.mpll_dq_func_cntl;

sys/dev/pci/drm/radeon/rv740_dpm.c

193

u32 mpll_dq_func_cntl_2 = pi->clk_regs.rv770.mpll_dq_func_cntl_2;

sys/dev/pci/drm/radeon/rv740_dpm.c

194

u32 mclk_pwrmgt_cntl = pi->clk_regs.rv770.mclk_pwrmgt_cntl;

sys/dev/pci/drm/radeon/rv740_dpm.c

195

u32 dll_cntl = pi->clk_regs.rv770.dll_cntl;

sys/dev/pci/drm/radeon/rv740_dpm.c

196

u32 mpll_ss1 = pi->clk_regs.rv770.mpll_ss1;

sys/dev/pci/drm/radeon/rv740_dpm.c

197

u32 mpll_ss2 = pi->clk_regs.rv770.mpll_ss2;

sys/dev/pci/drm/radeon/rv740_dpm.c

226

if (pi->mem_gddr5) {

sys/dev/pci/drm/radeon/rv740_dpm.c

244

if (pi->mclk_ss) {

sys/dev/pci/drm/radeon/rv740_dpm.c

268

dll_speed = rv740_get_dll_speed(pi->mem_gddr5,

sys/dev/pci/drm/radeon/rv740_dpm.c

289

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv740_dpm.c

291

pi->clk_regs.rv770.cg_spll_func_cntl =

sys/dev/pci/drm/radeon/rv740_dpm.c

293

pi->clk_regs.rv770.cg_spll_func_cntl_2 =

sys/dev/pci/drm/radeon/rv740_dpm.c

295

pi->clk_regs.rv770.cg_spll_func_cntl_3 =

sys/dev/pci/drm/radeon/rv740_dpm.c

297

pi->clk_regs.rv770.cg_spll_spread_spectrum =

sys/dev/pci/drm/radeon/rv740_dpm.c

299

pi->clk_regs.rv770.cg_spll_spread_spectrum_2 =

sys/dev/pci/drm/radeon/rv740_dpm.c

302

pi->clk_regs.rv770.mpll_ad_func_cntl =

sys/dev/pci/drm/radeon/rv740_dpm.c

304

pi->clk_regs.rv770.mpll_ad_func_cntl_2 =

sys/dev/pci/drm/radeon/rv740_dpm.c

306

pi->clk_regs.rv770.mpll_dq_func_cntl =

sys/dev/pci/drm/radeon/rv740_dpm.c

308

pi->clk_regs.rv770.mpll_dq_func_cntl_2 =

sys/dev/pci/drm/radeon/rv740_dpm.c

310

pi->clk_regs.rv770.mclk_pwrmgt_cntl =

sys/dev/pci/drm/radeon/rv740_dpm.c

312

pi->clk_regs.rv770.dll_cntl = RREG32(DLL_CNTL);

sys/dev/pci/drm/radeon/rv740_dpm.c

313

pi->clk_regs.rv770.mpll_ss1 = RREG32(MPLL_SS1);

sys/dev/pci/drm/radeon/rv740_dpm.c

314

pi->clk_regs.rv770.mpll_ss2 = RREG32(MPLL_SS2);

sys/dev/pci/drm/radeon/rv740_dpm.c

320

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv740_dpm.c

321

u32 mpll_ad_func_cntl = pi->clk_regs.rv770.mpll_ad_func_cntl;

sys/dev/pci/drm/radeon/rv740_dpm.c

322

u32 mpll_ad_func_cntl_2 = pi->clk_regs.rv770.mpll_ad_func_cntl_2;

sys/dev/pci/drm/radeon/rv740_dpm.c

323

u32 mpll_dq_func_cntl = pi->clk_regs.rv770.mpll_dq_func_cntl;

sys/dev/pci/drm/radeon/rv740_dpm.c

324

u32 mpll_dq_func_cntl_2 = pi->clk_regs.rv770.mpll_dq_func_cntl_2;

sys/dev/pci/drm/radeon/rv740_dpm.c

325

u32 spll_func_cntl = pi->clk_regs.rv770.cg_spll_func_cntl;

sys/dev/pci/drm/radeon/rv740_dpm.c

326

u32 spll_func_cntl_2 = pi->clk_regs.rv770.cg_spll_func_cntl_2;

sys/dev/pci/drm/radeon/rv740_dpm.c

327

u32 spll_func_cntl_3 = pi->clk_regs.rv770.cg_spll_func_cntl_3;

sys/dev/pci/drm/radeon/rv740_dpm.c

328

u32 mclk_pwrmgt_cntl = pi->clk_regs.rv770.mclk_pwrmgt_cntl;

sys/dev/pci/drm/radeon/rv740_dpm.c

329

u32 dll_cntl = pi->clk_regs.rv770.dll_cntl;

sys/dev/pci/drm/radeon/rv740_dpm.c

335

if (pi->acpi_vddc) {

sys/dev/pci/drm/radeon/rv740_dpm.c

336

rv770_populate_vddc_value(rdev, pi->acpi_vddc,

sys/dev/pci/drm/radeon/rv740_dpm.c

339

pi->pcie_gen2 ?

sys/dev/pci/drm/radeon/rv740_dpm.c

340

pi->acpi_pcie_gen2 : 0;

sys/dev/pci/drm/radeon/rv740_dpm.c

342

pi->acpi_pcie_gen2;

sys/dev/pci/drm/radeon/rv740_dpm.c

344

rv770_populate_vddc_value(rdev, pi->min_vddc_in_table,

sys/dev/pci/drm/radeon/rv770_dpm.c

1010

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1012

if ((pi->s0_vid_lower_smio_cntl & pi->mvdd_mask_low) ==

sys/dev/pci/drm/radeon/rv770_dpm.c

1013

(pi->mvdd_low_smio[MVDD_LOW_INDEX] & pi->mvdd_mask_low)) {

sys/dev/pci/drm/radeon/rv770_dpm.c

1029

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1033

cpu_to_be32(pi->clk_regs.rv770.mpll_ad_func_cntl);

sys/dev/pci/drm/radeon/rv770_dpm.c

1035

cpu_to_be32(pi->clk_regs.rv770.mpll_ad_func_cntl_2);

sys/dev/pci/drm/radeon/rv770_dpm.c

1037

cpu_to_be32(pi->clk_regs.rv770.mpll_dq_func_cntl);

sys/dev/pci/drm/radeon/rv770_dpm.c

1039

cpu_to_be32(pi->clk_regs.rv770.mpll_dq_func_cntl_2);

sys/dev/pci/drm/radeon/rv770_dpm.c

1041

cpu_to_be32(pi->clk_regs.rv770.mclk_pwrmgt_cntl);

sys/dev/pci/drm/radeon/rv770_dpm.c

1043

cpu_to_be32(pi->clk_regs.rv770.dll_cntl);

sys/dev/pci/drm/radeon/rv770_dpm.c

1046

cpu_to_be32(pi->clk_regs.rv770.mpll_ss1);

sys/dev/pci/drm/radeon/rv770_dpm.c

1048

cpu_to_be32(pi->clk_regs.rv770.mpll_ss2);

sys/dev/pci/drm/radeon/rv770_dpm.c

1054

cpu_to_be32(pi->clk_regs.rv770.cg_spll_func_cntl);

sys/dev/pci/drm/radeon/rv770_dpm.c

1056

cpu_to_be32(pi->clk_regs.rv770.cg_spll_func_cntl_2);

sys/dev/pci/drm/radeon/rv770_dpm.c

1058

cpu_to_be32(pi->clk_regs.rv770.cg_spll_func_cntl_3);

sys/dev/pci/drm/radeon/rv770_dpm.c

1060

cpu_to_be32(pi->clk_regs.rv770.cg_spll_spread_spectrum);

sys/dev/pci/drm/radeon/rv770_dpm.c

1062

cpu_to_be32(pi->clk_regs.rv770.cg_spll_spread_spectrum_2);

sys/dev/pci/drm/radeon/rv770_dpm.c

1081

table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp);

sys/dev/pci/drm/radeon/rv770_dpm.c

1083

if (pi->boot_in_gen2)

sys/dev/pci/drm/radeon/rv770_dpm.c

1093

if (pi->mem_gddr5) {

sys/dev/pci/drm/radeon/rv770_dpm.c

1094

if (initial_state->low.mclk <= pi->mclk_strobe_mode_threshold)

sys/dev/pci/drm/radeon/rv770_dpm.c

1100

if (initial_state->low.mclk >= pi->mclk_edc_enable_threshold)

sys/dev/pci/drm/radeon/rv770_dpm.c

1118

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1121

for (i = 0; i < pi->valid_vddc_entries; i++) {

sys/dev/pci/drm/radeon/rv770_dpm.c

1122

table->highSMIO[pi->vddc_table[i].vddc_index] =

sys/dev/pci/drm/radeon/rv770_dpm.c

1123

pi->vddc_table[i].high_smio;

sys/dev/pci/drm/radeon/rv770_dpm.c

1124

table->lowSMIO[pi->vddc_table[i].vddc_index] =

sys/dev/pci/drm/radeon/rv770_dpm.c

1125

cpu_to_be32(pi->vddc_table[i].low_smio);

sys/dev/pci/drm/radeon/rv770_dpm.c

1130

cpu_to_be32(pi->vddc_mask_low);

sys/dev/pci/drm/radeon/rv770_dpm.c

1133

((i < pi->valid_vddc_entries) &&

sys/dev/pci/drm/radeon/rv770_dpm.c

1134

(pi->max_vddc_in_table >

sys/dev/pci/drm/radeon/rv770_dpm.c

1135

pi->vddc_table[i].vddc));

sys/dev/pci/drm/radeon/rv770_dpm.c

1139

pi->vddc_table[i].vddc_index;

sys/dev/pci/drm/radeon/rv770_dpm.c

1147

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1149

if (pi->mvdd_control) {

sys/dev/pci/drm/radeon/rv770_dpm.c

1151

cpu_to_be32(pi->mvdd_low_smio[MVDD_HIGH_INDEX]);

sys/dev/pci/drm/radeon/rv770_dpm.c

1153

cpu_to_be32(pi->mvdd_low_smio[MVDD_LOW_INDEX]);

sys/dev/pci/drm/radeon/rv770_dpm.c

1157

cpu_to_be32(pi->mvdd_mask_low);

sys/dev/pci/drm/radeon/rv770_dpm.c

1166

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1168

RV770_SMC_STATETABLE *table = &pi->smc_statetable;

sys/dev/pci/drm/radeon/rv770_dpm.c

1173

pi->boot_sclk = boot_state->low.sclk;

sys/dev/pci/drm/radeon/rv770_dpm.c

1205

if (pi->mem_gddr5)

sys/dev/pci/drm/radeon/rv770_dpm.c

1227

pi->state_table_start,

sys/dev/pci/drm/radeon/rv770_dpm.c

1230

pi->sram_end);

sys/dev/pci/drm/radeon/rv770_dpm.c

1235

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1253

pi->vddc_table[i].vddc = (u16)(min + i * step);

sys/dev/pci/drm/radeon/rv770_dpm.c

1255

pi->vddc_table[i].vddc,

sys/dev/pci/drm/radeon/rv770_dpm.c

1258

pi->vddc_table[i].low_smio = gpio_pins & gpio_mask;

sys/dev/pci/drm/radeon/rv770_dpm.c

1259

pi->vddc_table[i].high_smio = 0;

sys/dev/pci/drm/radeon/rv770_dpm.c

1260

pi->vddc_mask_low = gpio_mask;

sys/dev/pci/drm/radeon/rv770_dpm.c

1262

if ((pi->vddc_table[i].low_smio !=

sys/dev/pci/drm/radeon/rv770_dpm.c

1263

pi->vddc_table[i - 1].low_smio) ||

sys/dev/pci/drm/radeon/rv770_dpm.c

1264

(pi->vddc_table[i].high_smio !=

sys/dev/pci/drm/radeon/rv770_dpm.c

1265

pi->vddc_table[i - 1].high_smio))

sys/dev/pci/drm/radeon/rv770_dpm.c

1268

pi->vddc_table[i].vddc_index = vddc_index;

sys/dev/pci/drm/radeon/rv770_dpm.c

1271

pi->valid_vddc_entries = (u8)steps;

sys/dev/pci/drm/radeon/rv770_dpm.c

1286

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1292

pi->mvdd_mask_low = gpio_mask;

sys/dev/pci/drm/radeon/rv770_dpm.c

1293

pi->mvdd_low_smio[MVDD_HIGH_INDEX] =

sys/dev/pci/drm/radeon/rv770_dpm.c

1299

pi->mvdd_low_smio[MVDD_LOW_INDEX] =

sys/dev/pci/drm/radeon/rv770_dpm.c

1312

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1319

pi->mvdd_control = false;

sys/dev/pci/drm/radeon/rv770_dpm.c

1323

pi->mvdd_split_frequency =

sys/dev/pci/drm/radeon/rv770_dpm.c

1326

if (pi->mvdd_split_frequency == 0) {

sys/dev/pci/drm/radeon/rv770_dpm.c

1327

pi->mvdd_control = false;

sys/dev/pci/drm/radeon/rv770_dpm.c

1386

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1387

u16 address = pi->state_table_start +

sys/dev/pci/drm/radeon/rv770_dpm.c

1398

pi->sram_end);

sys/dev/pci/drm/radeon/rv770_dpm.c

147

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1520

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1522

pi->clk_regs.rv770.cg_spll_func_cntl =

sys/dev/pci/drm/radeon/rv770_dpm.c

1524

pi->clk_regs.rv770.cg_spll_func_cntl_2 =

sys/dev/pci/drm/radeon/rv770_dpm.c

1526

pi->clk_regs.rv770.cg_spll_func_cntl_3 =

sys/dev/pci/drm/radeon/rv770_dpm.c

1528

pi->clk_regs.rv770.cg_spll_spread_spectrum =

sys/dev/pci/drm/radeon/rv770_dpm.c

1530

pi->clk_regs.rv770.cg_spll_spread_spectrum_2 =

sys/dev/pci/drm/radeon/rv770_dpm.c

1532

pi->clk_regs.rv770.mpll_ad_func_cntl =

sys/dev/pci/drm/radeon/rv770_dpm.c

1534

pi->clk_regs.rv770.mpll_ad_func_cntl_2 =

sys/dev/pci/drm/radeon/rv770_dpm.c

1536

pi->clk_regs.rv770.mpll_dq_func_cntl =

sys/dev/pci/drm/radeon/rv770_dpm.c

1538

pi->clk_regs.rv770.mpll_dq_func_cntl_2 =

sys/dev/pci/drm/radeon/rv770_dpm.c

1540

pi->clk_regs.rv770.mclk_pwrmgt_cntl =

sys/dev/pci/drm/radeon/rv770_dpm.c

1542

pi->clk_regs.rv770.dll_cntl = RREG32(DLL_CNTL);

sys/dev/pci/drm/radeon/rv770_dpm.c

1557

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1559

pi->s0_vid_lower_smio_cntl =

sys/dev/pci/drm/radeon/rv770_dpm.c

1565

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1583

vid_smio_cntl = pi->s0_vid_lower_smio_cntl;

sys/dev/pci/drm/radeon/rv770_dpm.c

1593

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

160

if (pi->mgcgtssm)

sys/dev/pci/drm/radeon/rv770_dpm.c

1600

pi->mem_gddr5 = true;

sys/dev/pci/drm/radeon/rv770_dpm.c

1602

pi->mem_gddr5 = false;

sys/dev/pci/drm/radeon/rv770_dpm.c

1608

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1615

pi->pcie_gen2 = true;

sys/dev/pci/drm/radeon/rv770_dpm.c

1617

pi->pcie_gen2 = false;

sys/dev/pci/drm/radeon/rv770_dpm.c

1619

if (pi->pcie_gen2) {

sys/dev/pci/drm/radeon/rv770_dpm.c

1621

pi->boot_in_gen2 = true;

sys/dev/pci/drm/radeon/rv770_dpm.c

1623

pi->boot_in_gen2 = false;

sys/dev/pci/drm/radeon/rv770_dpm.c

1625

pi->boot_in_gen2 = false;

sys/dev/pci/drm/radeon/rv770_dpm.c

1631

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1633

if (pi->gfx_clock_gating) {

sys/dev/pci/drm/radeon/rv770_dpm.c

1650

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1664

if (pi->gfx_clock_gating)

sys/dev/pci/drm/radeon/rv770_dpm.c

1673

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1677

pi->mclk_odt_threshold = 0;

sys/dev/pci/drm/radeon/rv770_dpm.c

1687

pi->mclk_odt_threshold = 30000;

sys/dev/pci/drm/radeon/rv770_dpm.c

1693

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1697

pi->max_vddc = 0;

sys/dev/pci/drm/radeon/rv770_dpm.c

1699

pi->max_vddc = vddc;

sys/dev/pci/drm/radeon/rv770_dpm.c

1749

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1755

if (pi->mclk_odt_threshold == 0)

sys/dev/pci/drm/radeon/rv770_dpm.c

1758

if (current_state->high.mclk <= pi->mclk_odt_threshold)

sys/dev/pci/drm/radeon/rv770_dpm.c

1761

if (new_state->high.mclk <= pi->mclk_odt_threshold)

sys/dev/pci/drm/radeon/rv770_dpm.c

1778

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1784

if (pi->mclk_odt_threshold == 0)

sys/dev/pci/drm/radeon/rv770_dpm.c

1787

if (current_state->high.mclk <= pi->mclk_odt_threshold)

sys/dev/pci/drm/radeon/rv770_dpm.c

1790

if (new_state->high.mclk <= pi->mclk_odt_threshold)

sys/dev/pci/drm/radeon/rv770_dpm.c

1805

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1807

if (pi->mclk_odt_threshold == 0)

sys/dev/pci/drm/radeon/rv770_dpm.c

1816

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1844

if (pi->thermal_protection)

sys/dev/pci/drm/radeon/rv770_dpm.c

1855

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1858

if (!(pi->active_auto_throttle_sources & (1 << source))) {

sys/dev/pci/drm/radeon/rv770_dpm.c

1859

pi->active_auto_throttle_sources |= 1 << source;

sys/dev/pci/drm/radeon/rv770_dpm.c

1860

rv770_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources);

sys/dev/pci/drm/radeon/rv770_dpm.c

1863

if (pi->active_auto_throttle_sources & (1 << source)) {

sys/dev/pci/drm/radeon/rv770_dpm.c

1864

pi->active_auto_throttle_sources &= ~(1 << source);

sys/dev/pci/drm/radeon/rv770_dpm.c

1865

rv770_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources);

sys/dev/pci/drm/radeon/rv770_dpm.c

1897

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

1901

if (pi->gfx_clock_gating)

sys/dev/pci/drm/radeon/rv770_dpm.c

1907

if (pi->voltage_control) {

sys/dev/pci/drm/radeon/rv770_dpm.c

1916

if (pi->dcodt)

sys/dev/pci/drm/radeon/rv770_dpm.c

1919

if (pi->mvdd_control) {

sys/dev/pci/drm/radeon/rv770_dpm.c

1932

if (pi->thermal_protection)

sys/dev/pci/drm/radeon/rv770_dpm.c

1945

if (pi->dynamic_pcie_gen2)

sys/dev/pci/drm/radeon/rv770_dpm.c

1967

if (pi->gfx_clock_gating)

sys/dev/pci/drm/radeon/rv770_dpm.c

1970

if (pi->mg_clock_gating)

sys/dev/pci/drm/radeon/rv770_dpm.c

2002

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

2009

if (pi->thermal_protection)

sys/dev/pci/drm/radeon/rv770_dpm.c

2014

if (pi->dynamic_pcie_gen2)

sys/dev/pci/drm/radeon/rv770_dpm.c

2023

if (pi->gfx_clock_gating)

sys/dev/pci/drm/radeon/rv770_dpm.c

2026

if (pi->mg_clock_gating)

sys/dev/pci/drm/radeon/rv770_dpm.c

2040

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

2062

if (pi->dcodt)

sys/dev/pci/drm/radeon/rv770_dpm.c

2074

if (pi->dcodt)

sys/dev/pci/drm/radeon/rv770_dpm.c

2084

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

2088

if (pi->dcodt)

sys/dev/pci/drm/radeon/rv770_dpm.c

2091

if (pi->dcodt)

sys/dev/pci/drm/radeon/rv770_dpm.c

2098

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

2103

if (pi->dcodt)

sys/dev/pci/drm/radeon/rv770_dpm.c

2179

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

2222

if (pi->max_vddc)

sys/dev/pci/drm/radeon/rv770_dpm.c

2223

pl->vddc = pi->max_vddc;

sys/dev/pci/drm/radeon/rv770_dpm.c

2227

pi->acpi_vddc = pl->vddc;

sys/dev/pci/drm/radeon/rv770_dpm.c

2231

pi->acpi_pcie_gen2 = true;

sys/dev/pci/drm/radeon/rv770_dpm.c

2233

pi->acpi_pcie_gen2 = false;

sys/dev/pci/drm/radeon/rv770_dpm.c

2243

if (pi->min_vddc_in_table > pl->vddc)

sys/dev/pci/drm/radeon/rv770_dpm.c

2244

pi->min_vddc_in_table = pl->vddc;

sys/dev/pci/drm/radeon/rv770_dpm.c

2246

if (pi->max_vddc_in_table < pl->vddc)

sys/dev/pci/drm/radeon/rv770_dpm.c

2247

pi->max_vddc_in_table = pl->vddc;

sys/dev/pci/drm/radeon/rv770_dpm.c

2331

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

2334

pi->sclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss,

sys/dev/pci/drm/radeon/rv770_dpm.c

2336

pi->mclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss,

sys/dev/pci/drm/radeon/rv770_dpm.c

2339

if (pi->sclk_ss || pi->mclk_ss)

sys/dev/pci/drm/radeon/rv770_dpm.c

2340

pi->dynamic_ss = true;

sys/dev/pci/drm/radeon/rv770_dpm.c

2342

pi->dynamic_ss = false;

sys/dev/pci/drm/radeon/rv770_dpm.c

2347

struct rv7xx_power_info *pi;

sys/dev/pci/drm/radeon/rv770_dpm.c

2351

pi = kzalloc(sizeof(struct rv7xx_power_info), GFP_KERNEL);

sys/dev/pci/drm/radeon/rv770_dpm.c

2352

if (pi == NULL)

sys/dev/pci/drm/radeon/rv770_dpm.c

2354

rdev->pm.dpm.priv = pi;

sys/dev/pci/drm/radeon/rv770_dpm.c

2358

pi->acpi_vddc = 0;

sys/dev/pci/drm/radeon/rv770_dpm.c

2359

pi->min_vddc_in_table = 0;

sys/dev/pci/drm/radeon/rv770_dpm.c

2360

pi->max_vddc_in_table = 0;

sys/dev/pci/drm/radeon/rv770_dpm.c

2378

pi->ref_div = dividers.ref_div + 1;

sys/dev/pci/drm/radeon/rv770_dpm.c

2380

pi->ref_div = R600_REFERENCEDIVIDER_DFLT;

sys/dev/pci/drm/radeon/rv770_dpm.c

2382

pi->mclk_strobe_mode_threshold = 30000;

sys/dev/pci/drm/radeon/rv770_dpm.c

2383

pi->mclk_edc_enable_threshold = 30000;

sys/dev/pci/drm/radeon/rv770_dpm.c

2385

pi->rlp = RV770_RLP_DFLT;

sys/dev/pci/drm/radeon/rv770_dpm.c

2386

pi->rmp = RV770_RMP_DFLT;

sys/dev/pci/drm/radeon/rv770_dpm.c

2387

pi->lhp = RV770_LHP_DFLT;

sys/dev/pci/drm/radeon/rv770_dpm.c

2388

pi->lmp = RV770_LMP_DFLT;

sys/dev/pci/drm/radeon/rv770_dpm.c

239

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

2390

pi->voltage_control =

sys/dev/pci/drm/radeon/rv770_dpm.c

2393

pi->mvdd_control =

sys/dev/pci/drm/radeon/rv770_dpm.c

2398

pi->asi = RV770_ASI_DFLT;

sys/dev/pci/drm/radeon/rv770_dpm.c

2399

pi->pasi = RV770_HASI_DFLT;

sys/dev/pci/drm/radeon/rv770_dpm.c

2400

pi->vrc = RV770_VRC_DFLT;

sys/dev/pci/drm/radeon/rv770_dpm.c

2402

pi->power_gating = false;

sys/dev/pci/drm/radeon/rv770_dpm.c

2404

pi->gfx_clock_gating = true;

sys/dev/pci/drm/radeon/rv770_dpm.c

2406

pi->mg_clock_gating = true;

sys/dev/pci/drm/radeon/rv770_dpm.c

2407

pi->mgcgtssm = true;

sys/dev/pci/drm/radeon/rv770_dpm.c

2409

pi->dynamic_pcie_gen2 = true;

sys/dev/pci/drm/radeon/rv770_dpm.c

2412

pi->thermal_protection = true;

sys/dev/pci/drm/radeon/rv770_dpm.c

2414

pi->thermal_protection = false;

sys/dev/pci/drm/radeon/rv770_dpm.c

2416

pi->display_gap = true;

sys/dev/pci/drm/radeon/rv770_dpm.c

2419

pi->dcodt = true;

sys/dev/pci/drm/radeon/rv770_dpm.c

242

pi->soft_regs_start + reg_offset,

sys/dev/pci/drm/radeon/rv770_dpm.c

2421

pi->dcodt = false;

sys/dev/pci/drm/radeon/rv770_dpm.c

2423

pi->ulps = true;

sys/dev/pci/drm/radeon/rv770_dpm.c

2425

pi->mclk_stutter_mode_threshold = 0;

sys/dev/pci/drm/radeon/rv770_dpm.c

2427

pi->sram_end = SMC_RAM_END;

sys/dev/pci/drm/radeon/rv770_dpm.c

2428

pi->state_table_start = RV770_SMC_TABLE_ADDRESS;

sys/dev/pci/drm/radeon/rv770_dpm.c

2429

pi->soft_regs_start = RV770_SMC_SOFT_REGISTERS_START;

sys/dev/pci/drm/radeon/rv770_dpm.c

243

value, pi->sram_end);

sys/dev/pci/drm/radeon/rv770_dpm.c

250

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

253

pi->soft_regs_start + reg_offset,

sys/dev/pci/drm/radeon/rv770_dpm.c

254

value, pi->sram_end);

sys/dev/pci/drm/radeon/rv770_dpm.c

262

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

273

a_n = (int)state->medium.sclk * pi->lmp +

sys/dev/pci/drm/radeon/rv770_dpm.c

274

(int)state->low.sclk * (R600_AH_DFLT - pi->rlp);

sys/dev/pci/drm/radeon/rv770_dpm.c

275

a_d = (int)state->low.sclk * (100 - (int)pi->rlp) +

sys/dev/pci/drm/radeon/rv770_dpm.c

276

(int)state->medium.sclk * pi->lmp;

sys/dev/pci/drm/radeon/rv770_dpm.c

278

l[1] = (u8)(pi->lmp - (int)pi->lmp * a_n / a_d);

sys/dev/pci/drm/radeon/rv770_dpm.c

279

r[0] = (u8)(pi->rlp + (100 - (int)pi->rlp) * a_n / a_d);

sys/dev/pci/drm/radeon/rv770_dpm.c

281

a_n = (int)state->high.sclk * pi->lhp + (int)state->medium.sclk *

sys/dev/pci/drm/radeon/rv770_dpm.c

282

(R600_AH_DFLT - pi->rmp);

sys/dev/pci/drm/radeon/rv770_dpm.c

283

a_d = (int)state->medium.sclk * (100 - (int)pi->rmp) +

sys/dev/pci/drm/radeon/rv770_dpm.c

284

(int)state->high.sclk * pi->lhp;

sys/dev/pci/drm/radeon/rv770_dpm.c

286

l[2] = (u8)(pi->lhp - (int)pi->lhp * a_n / a_d);

sys/dev/pci/drm/radeon/rv770_dpm.c

287

r[1] = (u8)(pi->rmp + (100 - (int)pi->rmp) * a_n / a_d);

sys/dev/pci/drm/radeon/rv770_dpm.c

290

a_t = CG_R(r[i] * pi->bsp / 200) | CG_L(l[i] * pi->bsp / 200);

sys/dev/pci/drm/radeon/rv770_dpm.c

294

a_t = CG_R(r[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1] * pi->pbsp / 200) |

sys/dev/pci/drm/radeon/rv770_dpm.c

295

CG_L(l[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1] * pi->pbsp / 200);

sys/dev/pci/drm/radeon/rv770_dpm.c

307

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

311

smc_state->levels[i].bSP = cpu_to_be32(pi->dsp);

sys/dev/pci/drm/radeon/rv770_dpm.c

314

cpu_to_be32(pi->psp);

sys/dev/pci/drm/radeon/rv770_dpm.c

391

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

394

pi->clk_regs.rv770.mpll_ad_func_cntl;

sys/dev/pci/drm/radeon/rv770_dpm.c

396

pi->clk_regs.rv770.mpll_ad_func_cntl_2;

sys/dev/pci/drm/radeon/rv770_dpm.c

398

pi->clk_regs.rv770.mpll_dq_func_cntl;

sys/dev/pci/drm/radeon/rv770_dpm.c

400

pi->clk_regs.rv770.mpll_dq_func_cntl_2;

sys/dev/pci/drm/radeon/rv770_dpm.c

402

pi->clk_regs.rv770.mclk_pwrmgt_cntl;

sys/dev/pci/drm/radeon/rv770_dpm.c

403

u32 dll_cntl = pi->clk_regs.rv770.dll_cntl;

sys/dev/pci/drm/radeon/rv770_dpm.c

420

pi->mem_gddr5,

sys/dev/pci/drm/radeon/rv770_dpm.c

445

if (pi->mem_gddr5) {

sys/dev/pci/drm/radeon/rv770_dpm.c

448

pi->mem_gddr5,

sys/dev/pci/drm/radeon/rv770_dpm.c

489

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

492

pi->clk_regs.rv770.cg_spll_func_cntl;

sys/dev/pci/drm/radeon/rv770_dpm.c

494

pi->clk_regs.rv770.cg_spll_func_cntl_2;

sys/dev/pci/drm/radeon/rv770_dpm.c

496

pi->clk_regs.rv770.cg_spll_func_cntl_3;

sys/dev/pci/drm/radeon/rv770_dpm.c

498

pi->clk_regs.rv770.cg_spll_spread_spectrum;

sys/dev/pci/drm/radeon/rv770_dpm.c

500

pi->clk_regs.rv770.cg_spll_spread_spectrum_2;

sys/dev/pci/drm/radeon/rv770_dpm.c

539

if (pi->sclk_ss) {

sys/dev/pci/drm/radeon/rv770_dpm.c

570

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

573

if (!pi->voltage_control) {

sys/dev/pci/drm/radeon/rv770_dpm.c

579

for (i = 0; i < pi->valid_vddc_entries; i++) {

sys/dev/pci/drm/radeon/rv770_dpm.c

58

struct rv7xx_power_info *pi = rdev->pm.dpm.priv;

sys/dev/pci/drm/radeon/rv770_dpm.c

580

if (vddc <= pi->vddc_table[i].vddc) {

sys/dev/pci/drm/radeon/rv770_dpm.c

581

voltage->index = pi->vddc_table[i].vddc_index;

sys/dev/pci/drm/radeon/rv770_dpm.c

587

if (i == pi->valid_vddc_entries)

sys/dev/pci/drm/radeon/rv770_dpm.c

596

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

598

if (!pi->mvdd_control) {

sys/dev/pci/drm/radeon/rv770_dpm.c

60

return pi;

sys/dev/pci/drm/radeon/rv770_dpm.c

604

if (mclk <= pi->mvdd_split_frequency) {

sys/dev/pci/drm/radeon/rv770_dpm.c

620

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

623

level->gen2PCIE = pi->pcie_gen2 ?

sys/dev/pci/drm/radeon/rv770_dpm.c

642

if (pi->mem_gddr5) {

sys/dev/pci/drm/radeon/rv770_dpm.c

643

if (pl->mclk <= pi->mclk_strobe_mode_threshold)

sys/dev/pci/drm/radeon/rv770_dpm.c

649

if (pl->mclk > pi->mclk_edc_enable_threshold)

sys/dev/pci/drm/radeon/rv770_dpm.c

65

struct evergreen_power_info *pi = rdev->pm.dpm.priv;

sys/dev/pci/drm/radeon/rv770_dpm.c

67

return pi;

sys/dev/pci/drm/radeon/rv770_dpm.c

73

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

744

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

758

STATE0(64 * high_clock / pi->boot_sclk) |

sys/dev/pci/drm/radeon/rv770_dpm.c

765

POWERMODE0(rv770_calculate_memory_refresh_rate(rdev, pi->boot_sclk)) |

sys/dev/pci/drm/radeon/rv770_dpm.c

784

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

787

if (pi->sclk_ss)

sys/dev/pci/drm/radeon/rv770_dpm.c

790

if (pi->mclk_ss) {

sys/dev/pci/drm/radeon/rv770_dpm.c

808

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

810

if ((rdev->family == CHIP_RV770) && !pi->mem_gddr5) {

sys/dev/pci/drm/radeon/rv770_dpm.c

812

(MPLL_LOCK_TIME(R600_MPLLLOCKTIME_DFLT * pi->ref_div) |

sys/dev/pci/drm/radeon/rv770_dpm.c

819

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

82

if (!pi->boot_in_gen2) {

sys/dev/pci/drm/radeon/rv770_dpm.c

822

r600_calculate_u_and_p(pi->asi,

sys/dev/pci/drm/radeon/rv770_dpm.c

825

&pi->bsp,

sys/dev/pci/drm/radeon/rv770_dpm.c

826

&pi->bsu);

sys/dev/pci/drm/radeon/rv770_dpm.c

828

r600_calculate_u_and_p(pi->pasi,

sys/dev/pci/drm/radeon/rv770_dpm.c

831

&pi->pbsp,

sys/dev/pci/drm/radeon/rv770_dpm.c

832

&pi->pbsu);

sys/dev/pci/drm/radeon/rv770_dpm.c

834

pi->dsp = BSP(pi->bsp) | BSU(pi->bsu);

sys/dev/pci/drm/radeon/rv770_dpm.c

835

pi->psp = BSP(pi->pbsp) | BSU(pi->pbsu);

sys/dev/pci/drm/radeon/rv770_dpm.c

837

WREG32(CG_BSP, pi->dsp);

sys/dev/pci/drm/radeon/rv770_dpm.c

891

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

893

WREG32(CG_FTV, pi->vrc);

sys/dev/pci/drm/radeon/rv770_dpm.c

903

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

909

ret = rv770_load_smc_ucode(rdev, pi->sram_end);

sys/dev/pci/drm/radeon/rv770_dpm.c

919

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/rv770_dpm.c

922

pi->clk_regs.rv770.mpll_ad_func_cntl;

sys/dev/pci/drm/radeon/rv770_dpm.c

924

pi->clk_regs.rv770.mpll_ad_func_cntl_2;

sys/dev/pci/drm/radeon/rv770_dpm.c

926

pi->clk_regs.rv770.mpll_dq_func_cntl;

sys/dev/pci/drm/radeon/rv770_dpm.c

928

pi->clk_regs.rv770.mpll_dq_func_cntl_2;

sys/dev/pci/drm/radeon/rv770_dpm.c

930

pi->clk_regs.rv770.cg_spll_func_cntl;

sys/dev/pci/drm/radeon/rv770_dpm.c

932

pi->clk_regs.rv770.cg_spll_func_cntl_2;

sys/dev/pci/drm/radeon/rv770_dpm.c

934

pi->clk_regs.rv770.cg_spll_func_cntl_3;

sys/dev/pci/drm/radeon/rv770_dpm.c

942

if (pi->acpi_vddc) {

sys/dev/pci/drm/radeon/rv770_dpm.c

943

rv770_populate_vddc_value(rdev, pi->acpi_vddc,

sys/dev/pci/drm/radeon/rv770_dpm.c

945

if (pi->pcie_gen2) {

sys/dev/pci/drm/radeon/rv770_dpm.c

946

if (pi->acpi_pcie_gen2)

sys/dev/pci/drm/radeon/rv770_dpm.c

952

if (pi->acpi_pcie_gen2)

sys/dev/pci/drm/radeon/rv770_dpm.c

957

rv770_populate_vddc_value(rdev, pi->min_vddc_in_table,

sys/dev/pci/drm/radeon/si_dpm.c

1701

struct si_power_info *pi = rdev->pm.dpm.priv;

sys/dev/pci/drm/radeon/si_dpm.c

1703

return pi;

sys/dev/pci/drm/radeon/si_dpm.c

3224

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

3250

if (pi->thermal_protection)

sys/dev/pci/drm/radeon/si_dpm.c

3261

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

3264

if (!(pi->active_auto_throttle_sources & (1 << source))) {

sys/dev/pci/drm/radeon/si_dpm.c

3265

pi->active_auto_throttle_sources |= 1 << source;

sys/dev/pci/drm/radeon/si_dpm.c

3266

si_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources);

sys/dev/pci/drm/radeon/si_dpm.c

3269

if (pi->active_auto_throttle_sources & (1 << source)) {

sys/dev/pci/drm/radeon/si_dpm.c

3270

pi->active_auto_throttle_sources &= ~(1 << source);

sys/dev/pci/drm/radeon/si_dpm.c

3271

si_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources);

sys/dev/pci/drm/radeon/si_dpm.c

3671

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

3674

if (pi->sclk_ss)

sys/dev/pci/drm/radeon/si_dpm.c

3684

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

3687

r600_calculate_u_and_p(pi->asi,

sys/dev/pci/drm/radeon/si_dpm.c

3690

&pi->bsp,

sys/dev/pci/drm/radeon/si_dpm.c

3691

&pi->bsu);

sys/dev/pci/drm/radeon/si_dpm.c

3693

r600_calculate_u_and_p(pi->pasi,

sys/dev/pci/drm/radeon/si_dpm.c

3696

&pi->pbsp,

sys/dev/pci/drm/radeon/si_dpm.c

3697

&pi->pbsu);

sys/dev/pci/drm/radeon/si_dpm.c

3700

pi->dsp = BSP(pi->bsp) | BSU(pi->bsu);

sys/dev/pci/drm/radeon/si_dpm.c

3701

pi->psp = BSP(pi->pbsp) | BSU(pi->pbsu);

sys/dev/pci/drm/radeon/si_dpm.c

3703

WREG32(CG_BSP, pi->dsp);

sys/dev/pci/drm/radeon/si_dpm.c

3757

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

3759

WREG32(CG_FTV, pi->vrc);

sys/dev/pci/drm/radeon/si_dpm.c

3804

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

3808

if (mclk <= pi->mclk_strobe_mode_threshold)

sys/dev/pci/drm/radeon/si_dpm.c

3811

if (pi->mem_gddr5)

sys/dev/pci/drm/radeon/si_dpm.c

3902

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

3907

if (pi->voltage_control) {

sys/dev/pci/drm/radeon/si_dpm.c

3946

if (pi->mvdd_control) {

sys/dev/pci/drm/radeon/si_dpm.c

3951

pi->mvdd_control = false;

sys/dev/pci/drm/radeon/si_dpm.c

3956

pi->mvdd_control = false;

sys/dev/pci/drm/radeon/si_dpm.c

3993

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

4012

if (pi->max_vddc_in_table <= eg_pi->vddc_voltage_table.entries[i].value) {

sys/dev/pci/drm/radeon/si_dpm.c

4076

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

4079

if (pi->mvdd_control) {

sys/dev/pci/drm/radeon/si_dpm.c

4080

if (mclk <= pi->mvdd_split_frequency)

sys/dev/pci/drm/radeon/si_dpm.c

4298

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

4301

if (pi->mvdd_control)

sys/dev/pci/drm/radeon/si_dpm.c

4313

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

4397

table->initialState.level.bSP = cpu_to_be32(pi->dsp);

sys/dev/pci/drm/radeon/si_dpm.c

4401

if (pi->mem_gddr5) {

sys/dev/pci/drm/radeon/si_dpm.c

4406

if (initial_state->performance_levels[0].mclk > pi->mclk_edc_enable_threshold)

sys/dev/pci/drm/radeon/si_dpm.c

4434

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

4455

if (pi->acpi_vddc) {

sys/dev/pci/drm/radeon/si_dpm.c

4457

pi->acpi_vddc, &table->ACPIState.level.vddc);

sys/dev/pci/drm/radeon/si_dpm.c

4473

pi->acpi_vddc,

sys/dev/pci/drm/radeon/si_dpm.c

4480

pi->min_vddc_in_table, &table->ACPIState.level.vddc);

sys/dev/pci/drm/radeon/si_dpm.c

4500

pi->min_vddc_in_table,

sys/dev/pci/drm/radeon/si_dpm.c

4506

if (pi->acpi_vddc) {

sys/dev/pci/drm/radeon/si_dpm.c

4631

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

4633

pi->mvdd_split_frequency = 30000;

sys/dev/pci/drm/radeon/si_dpm.c

4638

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

4673

if (pi->mem_gddr5)

sys/dev/pci/drm/radeon/si_dpm.c

4730

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

4767

if (pi->sclk_ss) {

sys/dev/pci/drm/radeon/si_dpm.c

4824

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

4852

if (pi->mem_gddr5) {

sys/dev/pci/drm/radeon/si_dpm.c

4858

if (pi->mclk_ss) {

sys/dev/pci/drm/radeon/si_dpm.c

4864

if (pi->mem_gddr5)

sys/dev/pci/drm/radeon/si_dpm.c

4911

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

4915

smc_state->levels[i].bSP = cpu_to_be32(pi->dsp);

sys/dev/pci/drm/radeon/si_dpm.c

4918

cpu_to_be32(pi->psp);

sys/dev/pci/drm/radeon/si_dpm.c

4925

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

4945

if (pi->mclk_stutter_mode_threshold &&

sys/dev/pci/drm/radeon/si_dpm.c

4946

(pl->mclk <= pi->mclk_stutter_mode_threshold) &&

sys/dev/pci/drm/radeon/si_dpm.c

4956

if (pi->mem_gddr5) {

sys/dev/pci/drm/radeon/si_dpm.c

4957

if (pl->mclk > pi->mclk_edc_enable_threshold)

sys/dev/pci/drm/radeon/si_dpm.c

5034

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

5067

a_t |= CG_R(t_l * pi->bsp / 20000);

sys/dev/pci/drm/radeon/si_dpm.c

5071

pi->pbsp : pi->bsp;

sys/dev/pci/drm/radeon/si_dpm.c

5302

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

5329

if (!pi->mem_gddr5)

sys/dev/pci/drm/radeon/si_dpm.c

5336

if (!pi->mem_gddr5) {

sys/dev/pci/drm/radeon/si_dpm.c

6294

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

6302

if (pi->voltage_control || si_pi->voltage_control_svi2)

sys/dev/pci/drm/radeon/si_dpm.c

6304

if (pi->mvdd_control)

sys/dev/pci/drm/radeon/si_dpm.c

6306

if (pi->voltage_control || si_pi->voltage_control_svi2) {

sys/dev/pci/drm/radeon/si_dpm.c

6318

if (pi->dynamic_ss)

sys/dev/pci/drm/radeon/si_dpm.c

6320

if (pi->thermal_protection)

sys/dev/pci/drm/radeon/si_dpm.c

6441

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

6449

if (pi->thermal_protection)

sys/dev/pci/drm/radeon/si_dpm.c

6679

struct rv7xx_power_info *pi = rv770_get_pi(rdev);

sys/dev/pci/drm/radeon/si_dpm.c

6709

pi->acpi_vddc = pl->vddc;

sys/dev/pci/drm/radeon/si_dpm.c

6725

if (pi->min_vddc_in_table > pl->vddc)

sys/dev/pci/drm/radeon/si_dpm.c

6726

pi->min_vddc_in_table = pl->vddc;

sys/dev/pci/drm/radeon/si_dpm.c

6728

if (pi->max_vddc_in_table < pl->vddc)

sys/dev/pci/drm/radeon/si_dpm.c

6729

pi->max_vddc_in_table = pl->vddc;

sys/dev/pci/drm/radeon/si_dpm.c

6845

struct rv7xx_power_info *pi;

sys/dev/pci/drm/radeon/si_dpm.c

6860

pi = &eg_pi->rv7xx;

sys/dev/pci/drm/radeon/si_dpm.c

6886

pi->acpi_vddc = 0;

sys/dev/pci/drm/radeon/si_dpm.c

6888

pi->min_vddc_in_table = 0;

sys/dev/pci/drm/radeon/si_dpm.c

6889

pi->max_vddc_in_table = 0;

sys/dev/pci/drm/radeon/si_dpm.c

6929

pi->ref_div = dividers.ref_div + 1;

sys/dev/pci/drm/radeon/si_dpm.c

6931

pi->ref_div = R600_REFERENCEDIVIDER_DFLT;

sys/dev/pci/drm/radeon/si_dpm.c

6935

pi->mclk_strobe_mode_threshold = 40000;

sys/dev/pci/drm/radeon/si_dpm.c

6937

pi->mclk_stutter_mode_threshold = 0;

sys/dev/pci/drm/radeon/si_dpm.c

6939

pi->mclk_stutter_mode_threshold = pi->mclk_strobe_mode_threshold;

sys/dev/pci/drm/radeon/si_dpm.c

6940

pi->mclk_edc_enable_threshold = 40000;

sys/dev/pci/drm/radeon/si_dpm.c

6945

pi->voltage_control =

sys/dev/pci/drm/radeon/si_dpm.c

6948

if (!pi->voltage_control) {

sys/dev/pci/drm/radeon/si_dpm.c

6957

pi->mvdd_control =

sys/dev/pci/drm/radeon/si_dpm.c

6975

pi->asi = RV770_ASI_DFLT;

sys/dev/pci/drm/radeon/si_dpm.c

6976

pi->pasi = CYPRESS_HASI_DFLT;

sys/dev/pci/drm/radeon/si_dpm.c

6977

pi->vrc = SISLANDS_VRC_DFLT;

sys/dev/pci/drm/radeon/si_dpm.c

6979

pi->gfx_clock_gating = true;

sys/dev/pci/drm/radeon/si_dpm.c

6985

pi->thermal_protection = true;

sys/dev/pci/drm/radeon/si_dpm.c

6987

pi->thermal_protection = false;

sys/dev/pci/drm/radeon/sumo_dpm.c

1005

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1014

if (!pi->enable_sclk_ds)

sys/dev/pci/drm/radeon/sumo_dpm.c

1029

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1032

for (i = 0; i < pi->sys_info.sclk_voltage_mapping_table.num_max_dpm_entries; i++) {

sys/dev/pci/drm/radeon/sumo_dpm.c

1033

if (pi->sys_info.sclk_voltage_mapping_table.entries[i].sclk_frequency >= lower_limit)

sys/dev/pci/drm/radeon/sumo_dpm.c

1034

return pi->sys_info.sclk_voltage_mapping_table.entries[i].sclk_frequency;

sys/dev/pci/drm/radeon/sumo_dpm.c

1037

return pi->sys_info.sclk_voltage_mapping_table.entries[pi->sys_info.sclk_voltage_mapping_table.num_max_dpm_entries - 1].sclk_frequency;

sys/dev/pci/drm/radeon/sumo_dpm.c

1044

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1045

u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */

sys/dev/pci/drm/radeon/sumo_dpm.c

1054

current_vddc = pi->boot_pl.vddc_index;

sys/dev/pci/drm/radeon/sumo_dpm.c

1055

current_sclk = pi->boot_pl.sclk;

sys/dev/pci/drm/radeon/sumo_dpm.c

1090

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1092

u32 min_sclk = pi->sys_info.min_sclk; /* XXX check against disp reqs */

sys/dev/pci/drm/radeon/sumo_dpm.c

1093

u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */

sys/dev/pci/drm/radeon/sumo_dpm.c

1099

if (pi->enable_boost) {

sys/dev/pci/drm/radeon/sumo_dpm.c

1182

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1184

pi->current_rps = *rps;

sys/dev/pci/drm/radeon/sumo_dpm.c

1185

pi->current_ps = *new_ps;

sys/dev/pci/drm/radeon/sumo_dpm.c

1186

pi->current_rps.ps_priv = &pi->current_ps;

sys/dev/pci/drm/radeon/sumo_dpm.c

1193

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1195

pi->requested_rps = *rps;

sys/dev/pci/drm/radeon/sumo_dpm.c

1196

pi->requested_ps = *new_ps;

sys/dev/pci/drm/radeon/sumo_dpm.c

1197

pi->requested_rps.ps_priv = &pi->requested_ps;

sys/dev/pci/drm/radeon/sumo_dpm.c

1202

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1213

if (pi->enable_auto_thermal_throttling) {

sys/dev/pci/drm/radeon/sumo_dpm.c

1225

if (pi->enable_sclk_ds)

sys/dev/pci/drm/radeon/sumo_dpm.c

1227

if (pi->enable_boost)

sys/dev/pci/drm/radeon/sumo_dpm.c

1257

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1262

if (pi->enable_sclk_ds)

sys/dev/pci/drm/radeon/sumo_dpm.c

1280

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1286

if (pi->enable_dynamic_patch_ps)

sys/dev/pci/drm/radeon/sumo_dpm.c

1288

&pi->requested_rps,

sys/dev/pci/drm/radeon/sumo_dpm.c

1289

&pi->current_rps);

sys/dev/pci/drm/radeon/sumo_dpm.c

1296

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1297

struct radeon_ps *new_ps = &pi->requested_rps;

sys/dev/pci/drm/radeon/sumo_dpm.c

1298

struct radeon_ps *old_ps = &pi->current_rps;

sys/dev/pci/drm/radeon/sumo_dpm.c

1300

if (pi->enable_dpm)

sys/dev/pci/drm/radeon/sumo_dpm.c

1302

if (pi->enable_boost) {

sys/dev/pci/drm/radeon/sumo_dpm.c

1306

if (pi->enable_dpm) {

sys/dev/pci/drm/radeon/sumo_dpm.c

1322

if (pi->enable_boost)

sys/dev/pci/drm/radeon/sumo_dpm.c

1324

if (pi->enable_dpm)

sys/dev/pci/drm/radeon/sumo_dpm.c

1332

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1333

struct radeon_ps *new_ps = &pi->requested_rps;

sys/dev/pci/drm/radeon/sumo_dpm.c

1354

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1357

pi->fw_version = sumo_get_running_fw_version(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1358

DRM_INFO("Found smc ucode version: 0x%08x\n", pi->fw_version);

sys/dev/pci/drm/radeon/sumo_dpm.c

1393

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1397

ps->levels[0] = pi->boot_pl;

sys/dev/pci/drm/radeon/sumo_dpm.c

1431

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1444

if (pi->enable_sclk_ds) {

sys/dev/pci/drm/radeon/sumo_dpm.c

1561

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1562

u32 vid_7bit = sumo_convert_vid2_to_vid7(rdev, &pi->sys_info.vid_mapping_table, vid_2bit);

sys/dev/pci/drm/radeon/sumo_dpm.c

1659

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1676

pi->sys_info.bootup_sclk = le32_to_cpu(igp_info->info_6.ulBootUpEngineClock);

sys/dev/pci/drm/radeon/sumo_dpm.c

1677

pi->sys_info.min_sclk = le32_to_cpu(igp_info->info_6.ulMinEngineClock);

sys/dev/pci/drm/radeon/sumo_dpm.c

1678

pi->sys_info.bootup_uma_clk = le32_to_cpu(igp_info->info_6.ulBootUpUMAClock);

sys/dev/pci/drm/radeon/sumo_dpm.c

1679

pi->sys_info.bootup_nb_voltage_index =

sys/dev/pci/drm/radeon/sumo_dpm.c

1682

pi->sys_info.htc_tmp_lmt = 203;

sys/dev/pci/drm/radeon/sumo_dpm.c

1684

pi->sys_info.htc_tmp_lmt = igp_info->info_6.ucHtcTmpLmt;

sys/dev/pci/drm/radeon/sumo_dpm.c

1686

pi->sys_info.htc_hyst_lmt = 5;

sys/dev/pci/drm/radeon/sumo_dpm.c

1688

pi->sys_info.htc_hyst_lmt = igp_info->info_6.ucHtcHystLmt;

sys/dev/pci/drm/radeon/sumo_dpm.c

1689

if (pi->sys_info.htc_tmp_lmt <= pi->sys_info.htc_hyst_lmt) {

sys/dev/pci/drm/radeon/sumo_dpm.c

1693

pi->sys_info.csr_m3_arb_cntl_default[i] =

sys/dev/pci/drm/radeon/sumo_dpm.c

1695

pi->sys_info.csr_m3_arb_cntl_uvd[i] =

sys/dev/pci/drm/radeon/sumo_dpm.c

1697

pi->sys_info.csr_m3_arb_cntl_fs3d[i] =

sys/dev/pci/drm/radeon/sumo_dpm.c

1700

pi->sys_info.sclk_dpm_boost_margin =

sys/dev/pci/drm/radeon/sumo_dpm.c

1702

pi->sys_info.sclk_dpm_throttle_margin =

sys/dev/pci/drm/radeon/sumo_dpm.c

1704

pi->sys_info.sclk_dpm_tdp_limit_pg =

sys/dev/pci/drm/radeon/sumo_dpm.c

1706

pi->sys_info.gnb_tdp_limit = le16_to_cpu(igp_info->info_6.GnbTdpLimit);

sys/dev/pci/drm/radeon/sumo_dpm.c

1707

pi->sys_info.sclk_dpm_tdp_limit_boost =

sys/dev/pci/drm/radeon/sumo_dpm.c

1709

pi->sys_info.boost_sclk = le32_to_cpu(igp_info->info_6.ulBoostEngineCLock);

sys/dev/pci/drm/radeon/sumo_dpm.c

1710

pi->sys_info.boost_vid_2bit = igp_info->info_6.ulBoostVid_2bit;

sys/dev/pci/drm/radeon/sumo_dpm.c

1712

pi->sys_info.enable_boost = true;

sys/dev/pci/drm/radeon/sumo_dpm.c

1714

pi->sys_info.enable_boost = false;

sys/dev/pci/drm/radeon/sumo_dpm.c

1716

&pi->sys_info.disp_clk_voltage_mapping_table,

sys/dev/pci/drm/radeon/sumo_dpm.c

1719

&pi->sys_info.sclk_voltage_mapping_table,

sys/dev/pci/drm/radeon/sumo_dpm.c

1721

sumo_construct_vid_mapping_table(rdev, &pi->sys_info.vid_mapping_table,

sys/dev/pci/drm/radeon/sumo_dpm.c

1730

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1732

pi->boot_pl.sclk = pi->sys_info.bootup_sclk;

sys/dev/pci/drm/radeon/sumo_dpm.c

1733

pi->boot_pl.vddc_index = pi->sys_info.bootup_nb_voltage_index;

sys/dev/pci/drm/radeon/sumo_dpm.c

1734

pi->boot_pl.ds_divider_index = 0;

sys/dev/pci/drm/radeon/sumo_dpm.c

1735

pi->boot_pl.ss_divider_index = 0;

sys/dev/pci/drm/radeon/sumo_dpm.c

1736

pi->boot_pl.allow_gnb_slow = 1;

sys/dev/pci/drm/radeon/sumo_dpm.c

1737

pi->acpi_pl = pi->boot_pl;

sys/dev/pci/drm/radeon/sumo_dpm.c

1738

pi->current_ps.num_levels = 1;

sys/dev/pci/drm/radeon/sumo_dpm.c

1739

pi->current_ps.levels[0] = pi->boot_pl;

sys/dev/pci/drm/radeon/sumo_dpm.c

1744

struct sumo_power_info *pi;

sys/dev/pci/drm/radeon/sumo_dpm.c

1748

pi = kzalloc(sizeof(struct sumo_power_info), GFP_KERNEL);

sys/dev/pci/drm/radeon/sumo_dpm.c

1749

if (pi == NULL)

sys/dev/pci/drm/radeon/sumo_dpm.c

1751

rdev->pm.dpm.priv = pi;

sys/dev/pci/drm/radeon/sumo_dpm.c

1753

pi->driver_nbps_policy_disable = false;

sys/dev/pci/drm/radeon/sumo_dpm.c

1755

pi->disable_gfx_power_gating_in_uvd = true;

sys/dev/pci/drm/radeon/sumo_dpm.c

1757

pi->disable_gfx_power_gating_in_uvd = false;

sys/dev/pci/drm/radeon/sumo_dpm.c

1758

pi->enable_alt_vddnb = true;

sys/dev/pci/drm/radeon/sumo_dpm.c

1759

pi->enable_sclk_ds = true;

sys/dev/pci/drm/radeon/sumo_dpm.c

1760

pi->enable_dynamic_m3_arbiter = false;

sys/dev/pci/drm/radeon/sumo_dpm.c

1761

pi->enable_dynamic_patch_ps = true;

sys/dev/pci/drm/radeon/sumo_dpm.c

1766

pi->enable_gfx_power_gating = false;

sys/dev/pci/drm/radeon/sumo_dpm.c

1768

pi->enable_gfx_power_gating = true;

sys/dev/pci/drm/radeon/sumo_dpm.c

1769

pi->enable_gfx_clock_gating = true;

sys/dev/pci/drm/radeon/sumo_dpm.c

1770

pi->enable_mg_clock_gating = true;

sys/dev/pci/drm/radeon/sumo_dpm.c

1771

pi->enable_auto_thermal_throttling = true;

sys/dev/pci/drm/radeon/sumo_dpm.c

1787

pi->pasi = CYPRESS_HASI_DFLT;

sys/dev/pci/drm/radeon/sumo_dpm.c

1788

pi->asi = RV770_ASI_DFLT;

sys/dev/pci/drm/radeon/sumo_dpm.c

1789

pi->thermal_auto_throttling = pi->sys_info.htc_tmp_lmt;

sys/dev/pci/drm/radeon/sumo_dpm.c

1790

pi->enable_boost = pi->sys_info.enable_boost;

sys/dev/pci/drm/radeon/sumo_dpm.c

1791

pi->enable_dpm = true;

sys/dev/pci/drm/radeon/sumo_dpm.c

1817

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1818

struct radeon_ps *rps = &pi->current_rps;

sys/dev/pci/drm/radeon/sumo_dpm.c

1826

pl = &pi->boost_pl;

sys/dev/pci/drm/radeon/sumo_dpm.c

1844

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1845

struct radeon_ps *rps = &pi->current_rps;

sys/dev/pci/drm/radeon/sumo_dpm.c

1853

pl = &pi->boost_pl;

sys/dev/pci/drm/radeon/sumo_dpm.c

1865

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1867

return pi->sys_info.bootup_uma_clk;

sys/dev/pci/drm/radeon/sumo_dpm.c

1872

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1873

struct radeon_ps *rps = &pi->current_rps;

sys/dev/pci/drm/radeon/sumo_dpm.c

1881

pl = &pi->boost_pl;

sys/dev/pci/drm/radeon/sumo_dpm.c

1905

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1906

struct sumo_ps *requested_state = sumo_get_ps(&pi->requested_rps);

sys/dev/pci/drm/radeon/sumo_dpm.c

1916

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1918

return pi->sys_info.bootup_uma_clk;

sys/dev/pci/drm/radeon/sumo_dpm.c

1924

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

1925

struct radeon_ps *rps = &pi->current_rps;

sys/dev/pci/drm/radeon/sumo_dpm.c

1933

if (pi->enable_boost)

sys/dev/pci/drm/radeon/sumo_dpm.c

1945

if (pi->enable_boost)

sys/dev/pci/drm/radeon/sumo_dpm.c

1960

if (pi->enable_boost)

sys/dev/pci/drm/radeon/sumo_dpm.c

284

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

286

if (pi->enable_gfx_clock_gating)

sys/dev/pci/drm/radeon/sumo_dpm.c

288

if (pi->enable_gfx_power_gating)

sys/dev/pci/drm/radeon/sumo_dpm.c

290

if (pi->enable_mg_clock_gating)

sys/dev/pci/drm/radeon/sumo_dpm.c

292

if (pi->enable_gfx_clock_gating)

sys/dev/pci/drm/radeon/sumo_dpm.c

294

if (pi->enable_gfx_power_gating)

sys/dev/pci/drm/radeon/sumo_dpm.c

302

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

304

if (pi->enable_gfx_clock_gating)

sys/dev/pci/drm/radeon/sumo_dpm.c

306

if (pi->enable_gfx_power_gating)

sys/dev/pci/drm/radeon/sumo_dpm.c

308

if (pi->enable_mg_clock_gating)

sys/dev/pci/drm/radeon/sumo_dpm.c

315

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

318

pi->pasi = 65535 * 100 / high_clk;

sys/dev/pci/drm/radeon/sumo_dpm.c

319

pi->asi = 65535 * 100 / high_clk;

sys/dev/pci/drm/radeon/sumo_dpm.c

321

r600_calculate_u_and_p(pi->asi,

sys/dev/pci/drm/radeon/sumo_dpm.c

322

xclk, 16, &pi->bsp, &pi->bsu);

sys/dev/pci/drm/radeon/sumo_dpm.c

324

r600_calculate_u_and_p(pi->pasi,

sys/dev/pci/drm/radeon/sumo_dpm.c

325

xclk, 16, &pi->pbsp, &pi->pbsu);

sys/dev/pci/drm/radeon/sumo_dpm.c

327

pi->dsp = BSP(pi->bsp) | BSU(pi->bsu);

sys/dev/pci/drm/radeon/sumo_dpm.c

328

pi->psp = BSP(pi->pbsp) | BSU(pi->pbsu);

sys/dev/pci/drm/radeon/sumo_dpm.c

333

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

335

WREG32(CG_BSP_0, pi->psp);

sys/dev/pci/drm/radeon/sumo_dpm.c

342

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

348

highest_engine_clock = pi->boost_pl.sclk;

sys/dev/pci/drm/radeon/sumo_dpm.c

353

WREG32(CG_BSP_0 + (i * 4), pi->dsp);

sys/dev/pci/drm/radeon/sumo_dpm.c

355

WREG32(CG_BSP_0 + (i * 4), pi->psp);

sys/dev/pci/drm/radeon/sumo_dpm.c

358

WREG32(CG_BSP_0 + (BOOST_DPM_LEVEL * 4), pi->psp);

sys/dev/pci/drm/radeon/sumo_dpm.c

385

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

407

asi = (i == ps->num_levels - 1) ? pi->pasi : pi->asi;

sys/dev/pci/drm/radeon/sumo_dpm.c

417

asi = pi->pasi;

sys/dev/pci/drm/radeon/sumo_dpm.c

419

m_a = asi * pi->boost_pl.sclk / 100;

sys/dev/pci/drm/radeon/sumo_dpm.c

494

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

496

if (pi->enable_sclk_ds) {

sys/dev/pci/drm/radeon/sumo_dpm.c

508

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

510

if (pi->enable_sclk_ds) {

sys/dev/pci/drm/radeon/sumo_dpm.c

530

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

534

if (pi->driver_nbps_policy_disable)

sys/dev/pci/drm/radeon/sumo_dpm.c

547

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

574

if (pi->enable_boost)

sys/dev/pci/drm/radeon/sumo_dpm.c

664

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

668

pi->boost_pl = new_ps->levels[new_ps->num_levels - 1];

sys/dev/pci/drm/radeon/sumo_dpm.c

669

pi->boost_pl.sclk = pi->sys_info.boost_sclk;

sys/dev/pci/drm/radeon/sumo_dpm.c

670

pi->boost_pl.vddc_index = pi->sys_info.boost_vid_2bit;

sys/dev/pci/drm/radeon/sumo_dpm.c

671

pi->boost_pl.sclk_dpm_tdp_limit = pi->sys_info.sclk_dpm_tdp_limit_boost;

sys/dev/pci/drm/radeon/sumo_dpm.c

753

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

768

sumo_program_power_level(rdev, &pi->boost_pl, BOOST_DPM_LEVEL);

sys/dev/pci/drm/radeon/sumo_dpm.c

783

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

788

pi->acpi_pl.sclk,

sys/dev/pci/drm/radeon/sumo_dpm.c

799

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

803

sumo_program_power_level(rdev, &pi->boot_pl, 0);

sys/dev/pci/drm/radeon/sumo_dpm.c

81

struct sumo_power_info *pi = rdev->pm.dpm.priv;

sys/dev/pci/drm/radeon/sumo_dpm.c

816

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

818

if (pi->enable_gfx_power_gating) {

sys/dev/pci/drm/radeon/sumo_dpm.c

824

if (pi->enable_gfx_power_gating) {

sys/dev/pci/drm/radeon/sumo_dpm.c

825

if (!pi->disable_gfx_power_gating_in_uvd ||

sys/dev/pci/drm/radeon/sumo_dpm.c

83

return pi;

sys/dev/pci/drm/radeon/sumo_dpm.c

941

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

944

cg_sclk_dpm_ctrl_3 |= GNB_TT(pi->thermal_auto_throttling + 49);

sys/dev/pci/drm/radeon/sumo_dpm.c

985

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_dpm.c

988

if (!pi->driver_nbps_policy_disable) {

sys/dev/pci/drm/radeon/sumo_smc.c

143

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_smc.c

155

WREG32_RCU(RCU_BOOST_MARGIN, pi->sys_info.sclk_dpm_boost_margin);

sys/dev/pci/drm/radeon/sumo_smc.c

156

WREG32_RCU(RCU_THROTTLE_MARGIN, pi->sys_info.sclk_dpm_throttle_margin);

sys/dev/pci/drm/radeon/sumo_smc.c

157

WREG32_RCU(GNB_TDP_LIMIT, pi->sys_info.gnb_tdp_limit);

sys/dev/pci/drm/radeon/sumo_smc.c

158

WREG32_RCU(RCU_SclkDpmTdpLimitPG, pi->sys_info.sclk_dpm_tdp_limit_pg);

sys/dev/pci/drm/radeon/sumo_smc.c

71

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_smc.c

74

if (!pi->enable_dynamic_m3_arbiter)

sys/dev/pci/drm/radeon/sumo_smc.c

79

pi->sys_info.csr_m3_arb_cntl_default[i]);

sys/dev/pci/drm/radeon/sumo_smc.c

83

pi->sys_info.csr_m3_arb_cntl_uvd[i % NUMBER_OF_M3ARB_PARAM_SETS]);

sys/dev/pci/drm/radeon/sumo_smc.c

87

pi->sys_info.csr_m3_arb_cntl_fs3d[i % NUMBER_OF_M3ARB_PARAM_SETS]);

sys/dev/pci/drm/radeon/sumo_smc.c

92

struct sumo_power_info *pi = sumo_get_pi(rdev);

sys/dev/pci/drm/radeon/sumo_smc.c

95

if (!pi->enable_alt_vddnb)

sys/dev/pci/drm/radeon/sumo_smc.c

99

if (pi->fw_version >= 0x00010C00)

sys/dev/pci/drm/radeon/trinity_dpm.c

1023

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1025

pi->current_rps = *rps;

sys/dev/pci/drm/radeon/trinity_dpm.c

1026

pi->current_ps = *new_ps;

sys/dev/pci/drm/radeon/trinity_dpm.c

1027

pi->current_rps.ps_priv = &pi->current_ps;

sys/dev/pci/drm/radeon/trinity_dpm.c

1034

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1036

pi->requested_rps = *rps;

sys/dev/pci/drm/radeon/trinity_dpm.c

1037

pi->requested_ps = *new_ps;

sys/dev/pci/drm/radeon/trinity_dpm.c

1038

pi->requested_rps.ps_priv = &pi->requested_ps;

sys/dev/pci/drm/radeon/trinity_dpm.c

1043

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1045

if (pi->enable_bapm) {

sys/dev/pci/drm/radeon/trinity_dpm.c

1054

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1066

if (pi->enable_auto_thermal_throttling) {

sys/dev/pci/drm/radeon/trinity_dpm.c

1129

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1131

pi->min_sclk_did =

sys/dev/pci/drm/radeon/trinity_dpm.c

1138

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1142

if (pi->sys_info.nb_dpm_enable) {

sys/dev/pci/drm/radeon/trinity_dpm.c

1156

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1157

struct radeon_ps *rps = &pi->current_rps;

sys/dev/pci/drm/radeon/trinity_dpm.c

1186

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1193

&pi->requested_rps,

sys/dev/pci/drm/radeon/trinity_dpm.c

1194

&pi->current_rps);

sys/dev/pci/drm/radeon/trinity_dpm.c

1201

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1202

struct radeon_ps *new_ps = &pi->requested_rps;

sys/dev/pci/drm/radeon/trinity_dpm.c

1203

struct radeon_ps *old_ps = &pi->current_rps;

sys/dev/pci/drm/radeon/trinity_dpm.c

1206

if (pi->enable_dpm) {

sys/dev/pci/drm/radeon/trinity_dpm.c

1207

if (pi->enable_bapm)

sys/dev/pci/drm/radeon/trinity_dpm.c

1227

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1228

struct radeon_ps *new_ps = &pi->requested_rps;

sys/dev/pci/drm/radeon/trinity_dpm.c

1245

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1248

if (pi->enable_dpm) {

sys/dev/pci/drm/radeon/trinity_dpm.c

1263

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1264

u32 vid_7bit = sumo_convert_vid2_to_vid7(rdev, &pi->sys_info.vid_mapping_table, vid_2bit);

sys/dev/pci/drm/radeon/trinity_dpm.c

1278

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1283

ps->levels[0] = pi->boot_pl;

sys/dev/pci/drm/radeon/trinity_dpm.c

1295

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1297

pi->boot_pl.sclk = pi->sys_info.bootup_sclk;

sys/dev/pci/drm/radeon/trinity_dpm.c

1298

pi->boot_pl.vddc_index = pi->sys_info.bootup_nb_voltage_index;

sys/dev/pci/drm/radeon/trinity_dpm.c

1299

pi->boot_pl.ds_divider_index = 0;

sys/dev/pci/drm/radeon/trinity_dpm.c

1300

pi->boot_pl.ss_divider_index = 0;

sys/dev/pci/drm/radeon/trinity_dpm.c

1301

pi->boot_pl.allow_gnb_slow = 1;

sys/dev/pci/drm/radeon/trinity_dpm.c

1302

pi->boot_pl.force_nbp_state = 0;

sys/dev/pci/drm/radeon/trinity_dpm.c

1303

pi->boot_pl.display_wm = 0;

sys/dev/pci/drm/radeon/trinity_dpm.c

1304

pi->boot_pl.vce_wm = 0;

sys/dev/pci/drm/radeon/trinity_dpm.c

1305

pi->current_ps.num_levels = 1;

sys/dev/pci/drm/radeon/trinity_dpm.c

1306

pi->current_ps.levels[0] = pi->boot_pl;

sys/dev/pci/drm/radeon/trinity_dpm.c

1312

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1321

if (!pi->enable_sclk_ds)

sys/dev/pci/drm/radeon/trinity_dpm.c

1336

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1339

for (i = 0; i < pi->sys_info.sclk_voltage_mapping_table.num_max_dpm_entries; i++) {

sys/dev/pci/drm/radeon/trinity_dpm.c

1340

if (pi->sys_info.sclk_voltage_mapping_table.entries[i].sclk_frequency >= lower_limit)

sys/dev/pci/drm/radeon/trinity_dpm.c

1341

return pi->sys_info.sclk_voltage_mapping_table.entries[i].sclk_frequency;

sys/dev/pci/drm/radeon/trinity_dpm.c

1344

if (i == pi->sys_info.sclk_voltage_mapping_table.num_max_dpm_entries)

sys/dev/pci/drm/radeon/trinity_dpm.c

1354

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1355

u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */

sys/dev/pci/drm/radeon/trinity_dpm.c

1364

current_vddc = pi->boot_pl.vddc_index;

sys/dev/pci/drm/radeon/trinity_dpm.c

1365

current_sclk = pi->boot_pl.sclk;

sys/dev/pci/drm/radeon/trinity_dpm.c

1406

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1410

if ((rps->vclk == pi->sys_info.uvd_clock_table_entries[i].vclk) &&

sys/dev/pci/drm/radeon/trinity_dpm.c

1411

(rps->dclk == pi->sys_info.uvd_clock_table_entries[i].dclk))

sys/dev/pci/drm/radeon/trinity_dpm.c

1426

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1430

if (pi->uvd_dpm && r600_is_uvd_state(rps->class, rps->class2)) {

sys/dev/pci/drm/radeon/trinity_dpm.c

1446

pi->sys_info.uvd_clock_table_entries[high_index].vclk_did;

sys/dev/pci/drm/radeon/trinity_dpm.c

1448

pi->sys_info.uvd_clock_table_entries[high_index].dclk_did;

sys/dev/pci/drm/radeon/trinity_dpm.c

1450

pi->sys_info.uvd_clock_table_entries[low_index].vclk_did;

sys/dev/pci/drm/radeon/trinity_dpm.c

1452

pi->sys_info.uvd_clock_table_entries[low_index].dclk_did;

sys/dev/pci/drm/radeon/trinity_dpm.c

1492

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1494

u32 min_sclk = pi->sys_info.min_sclk; /* XXX check against disp reqs */

sys/dev/pci/drm/radeon/trinity_dpm.c

1495

u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */

sys/dev/pci/drm/radeon/trinity_dpm.c

1550

if (pi->sys_info.nb_dpm_enable) {

sys/dev/pci/drm/radeon/trinity_dpm.c

1560

(pi->sys_info.uma_channel_number == 1)));

sys/dev/pci/drm/radeon/trinity_dpm.c

1579

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1581

if (pi->voltage_drop_in_dce)

sys/dev/pci/drm/radeon/trinity_dpm.c

1604

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1606

if (pi->voltage_drop_in_dce)

sys/dev/pci/drm/radeon/trinity_dpm.c

1663

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1675

if (pi->enable_sclk_ds) {

sys/dev/pci/drm/radeon/trinity_dpm.c

1783

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1797

return ((pi->sys_info.dentist_vco_freq * 100) + (divider - 1)) / divider;

sys/dev/pci/drm/radeon/trinity_dpm.c

1802

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1819

pi->sys_info.bootup_sclk = le32_to_cpu(igp_info->info_7.ulBootUpEngineClock);

sys/dev/pci/drm/radeon/trinity_dpm.c

1820

pi->sys_info.min_sclk = le32_to_cpu(igp_info->info_7.ulMinEngineClock);

sys/dev/pci/drm/radeon/trinity_dpm.c

1821

pi->sys_info.bootup_uma_clk = le32_to_cpu(igp_info->info_7.ulBootUpUMAClock);

sys/dev/pci/drm/radeon/trinity_dpm.c

1822

pi->sys_info.dentist_vco_freq = le32_to_cpu(igp_info->info_7.ulDentistVCOFreq);

sys/dev/pci/drm/radeon/trinity_dpm.c

1823

pi->sys_info.bootup_nb_voltage_index =

sys/dev/pci/drm/radeon/trinity_dpm.c

1826

pi->sys_info.htc_tmp_lmt = 203;

sys/dev/pci/drm/radeon/trinity_dpm.c

1828

pi->sys_info.htc_tmp_lmt = igp_info->info_7.ucHtcTmpLmt;

sys/dev/pci/drm/radeon/trinity_dpm.c

1830

pi->sys_info.htc_hyst_lmt = 5;

sys/dev/pci/drm/radeon/trinity_dpm.c

1832

pi->sys_info.htc_hyst_lmt = igp_info->info_7.ucHtcHystLmt;

sys/dev/pci/drm/radeon/trinity_dpm.c

1833

if (pi->sys_info.htc_tmp_lmt <= pi->sys_info.htc_hyst_lmt) {

sys/dev/pci/drm/radeon/trinity_dpm.c

1837

if (pi->enable_nbps_policy)

sys/dev/pci/drm/radeon/trinity_dpm.c

1838

pi->sys_info.nb_dpm_enable = igp_info->info_7.ucNBDPMEnable;

sys/dev/pci/drm/radeon/trinity_dpm.c

1840

pi->sys_info.nb_dpm_enable = 0;

sys/dev/pci/drm/radeon/trinity_dpm.c

1843

pi->sys_info.nbp_mclk[i] = le32_to_cpu(igp_info->info_7.ulNbpStateMemclkFreq[i]);

sys/dev/pci/drm/radeon/trinity_dpm.c

1844

pi->sys_info.nbp_nclk[i] = le32_to_cpu(igp_info->info_7.ulNbpStateNClkFreq[i]);

sys/dev/pci/drm/radeon/trinity_dpm.c

1847

pi->sys_info.nbp_voltage_index[0] = le16_to_cpu(igp_info->info_7.usNBP0Voltage);

sys/dev/pci/drm/radeon/trinity_dpm.c

1848

pi->sys_info.nbp_voltage_index[1] = le16_to_cpu(igp_info->info_7.usNBP1Voltage);

sys/dev/pci/drm/radeon/trinity_dpm.c

1849

pi->sys_info.nbp_voltage_index[2] = le16_to_cpu(igp_info->info_7.usNBP2Voltage);

sys/dev/pci/drm/radeon/trinity_dpm.c

1850

pi->sys_info.nbp_voltage_index[3] = le16_to_cpu(igp_info->info_7.usNBP3Voltage);

sys/dev/pci/drm/radeon/trinity_dpm.c

1852

if (!pi->sys_info.nb_dpm_enable) {

sys/dev/pci/drm/radeon/trinity_dpm.c

1854

pi->sys_info.nbp_mclk[i] = pi->sys_info.nbp_mclk[0];

sys/dev/pci/drm/radeon/trinity_dpm.c

1855

pi->sys_info.nbp_nclk[i] = pi->sys_info.nbp_nclk[0];

sys/dev/pci/drm/radeon/trinity_dpm.c

1856

pi->sys_info.nbp_voltage_index[i] = pi->sys_info.nbp_voltage_index[0];

sys/dev/pci/drm/radeon/trinity_dpm.c

1860

pi->sys_info.uma_channel_number = igp_info->info_7.ucUMAChannelNumber;

sys/dev/pci/drm/radeon/trinity_dpm.c

1863

&pi->sys_info.sclk_voltage_mapping_table,

sys/dev/pci/drm/radeon/trinity_dpm.c

1865

sumo_construct_vid_mapping_table(rdev, &pi->sys_info.vid_mapping_table,

sys/dev/pci/drm/radeon/trinity_dpm.c

1868

pi->sys_info.uvd_clock_table_entries[0].vclk_did =

sys/dev/pci/drm/radeon/trinity_dpm.c

1870

pi->sys_info.uvd_clock_table_entries[1].vclk_did =

sys/dev/pci/drm/radeon/trinity_dpm.c

1872

pi->sys_info.uvd_clock_table_entries[2].vclk_did =

sys/dev/pci/drm/radeon/trinity_dpm.c

1874

pi->sys_info.uvd_clock_table_entries[3].vclk_did =

sys/dev/pci/drm/radeon/trinity_dpm.c

1877

pi->sys_info.uvd_clock_table_entries[0].dclk_did =

sys/dev/pci/drm/radeon/trinity_dpm.c

1879

pi->sys_info.uvd_clock_table_entries[1].dclk_did =

sys/dev/pci/drm/radeon/trinity_dpm.c

1881

pi->sys_info.uvd_clock_table_entries[2].dclk_did =

sys/dev/pci/drm/radeon/trinity_dpm.c

1883

pi->sys_info.uvd_clock_table_entries[3].dclk_did =

sys/dev/pci/drm/radeon/trinity_dpm.c

1887

pi->sys_info.uvd_clock_table_entries[i].vclk =

sys/dev/pci/drm/radeon/trinity_dpm.c

1889

pi->sys_info.uvd_clock_table_entries[i].vclk_did);

sys/dev/pci/drm/radeon/trinity_dpm.c

1890

pi->sys_info.uvd_clock_table_entries[i].dclk =

sys/dev/pci/drm/radeon/trinity_dpm.c

1892

pi->sys_info.uvd_clock_table_entries[i].dclk_did);

sys/dev/pci/drm/radeon/trinity_dpm.c

1903

struct trinity_power_info *pi;

sys/dev/pci/drm/radeon/trinity_dpm.c

1906

pi = kzalloc(sizeof(struct trinity_power_info), GFP_KERNEL);

sys/dev/pci/drm/radeon/trinity_dpm.c

1907

if (pi == NULL)

sys/dev/pci/drm/radeon/trinity_dpm.c

1909

rdev->pm.dpm.priv = pi;

sys/dev/pci/drm/radeon/trinity_dpm.c

1912

pi->at[i] = TRINITY_AT_DFLT;

sys/dev/pci/drm/radeon/trinity_dpm.c

1922

pi->enable_bapm = true;

sys/dev/pci/drm/radeon/trinity_dpm.c

1924

pi->enable_bapm = false;

sys/dev/pci/drm/radeon/trinity_dpm.c

1926

pi->enable_bapm = false;

sys/dev/pci/drm/radeon/trinity_dpm.c

1928

pi->enable_bapm = true;

sys/dev/pci/drm/radeon/trinity_dpm.c

1930

pi->enable_nbps_policy = true;

sys/dev/pci/drm/radeon/trinity_dpm.c

1931

pi->enable_sclk_ds = true;

sys/dev/pci/drm/radeon/trinity_dpm.c

1932

pi->enable_gfx_power_gating = true;

sys/dev/pci/drm/radeon/trinity_dpm.c

1933

pi->enable_gfx_clock_gating = true;

sys/dev/pci/drm/radeon/trinity_dpm.c

1934

pi->enable_mg_clock_gating = false;

sys/dev/pci/drm/radeon/trinity_dpm.c

1935

pi->enable_gfx_dynamic_mgpg = false;

sys/dev/pci/drm/radeon/trinity_dpm.c

1936

pi->override_dynamic_mgpg = false;

sys/dev/pci/drm/radeon/trinity_dpm.c

1937

pi->enable_auto_thermal_throttling = true;

sys/dev/pci/drm/radeon/trinity_dpm.c

1938

pi->voltage_drop_in_dce = false; /* need to restructure dpm/modeset interaction */

sys/dev/pci/drm/radeon/trinity_dpm.c

1939

pi->uvd_dpm = true; /* ??? */

sys/dev/pci/drm/radeon/trinity_dpm.c

1959

pi->thermal_auto_throttling = pi->sys_info.htc_tmp_lmt;

sys/dev/pci/drm/radeon/trinity_dpm.c

1960

pi->enable_dpm = true;

sys/dev/pci/drm/radeon/trinity_dpm.c

1986

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

1987

struct radeon_ps *rps = &pi->current_rps;

sys/dev/pci/drm/radeon/trinity_dpm.c

2007

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

2008

struct radeon_ps *rps = &pi->current_rps;

sys/dev/pci/drm/radeon/trinity_dpm.c

2025

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

2027

return pi->sys_info.bootup_uma_clk;

sys/dev/pci/drm/radeon/trinity_dpm.c

2046

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

2047

struct trinity_ps *requested_state = trinity_get_ps(&pi->requested_rps);

sys/dev/pci/drm/radeon/trinity_dpm.c

2057

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

2059

return pi->sys_info.bootup_uma_clk;

sys/dev/pci/drm/radeon/trinity_dpm.c

309

struct trinity_power_info *pi = rdev->pm.dpm.priv;

sys/dev/pci/drm/radeon/trinity_dpm.c

311

return pi;

sys/dev/pci/drm/radeon/trinity_dpm.c

316

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

344

if (pi->override_dynamic_mgpg && (hw_rev == 0))

sys/dev/pci/drm/radeon/trinity_dpm.c

499

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

501

if (pi->enable_gfx_clock_gating)

sys/dev/pci/drm/radeon/trinity_dpm.c

503

if (pi->enable_mg_clock_gating)

sys/dev/pci/drm/radeon/trinity_dpm.c

505

if (pi->enable_gfx_power_gating)

sys/dev/pci/drm/radeon/trinity_dpm.c

507

if (pi->enable_mg_clock_gating) {

sys/dev/pci/drm/radeon/trinity_dpm.c

511

if (pi->enable_gfx_clock_gating)

sys/dev/pci/drm/radeon/trinity_dpm.c

513

if (pi->enable_gfx_dynamic_mgpg)

sys/dev/pci/drm/radeon/trinity_dpm.c

515

if (pi->enable_gfx_power_gating)

sys/dev/pci/drm/radeon/trinity_dpm.c

521

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

523

if (pi->enable_gfx_power_gating)

sys/dev/pci/drm/radeon/trinity_dpm.c

525

if (pi->enable_gfx_dynamic_mgpg)

sys/dev/pci/drm/radeon/trinity_dpm.c

527

if (pi->enable_gfx_clock_gating)

sys/dev/pci/drm/radeon/trinity_dpm.c

529

if (pi->enable_mg_clock_gating) {

sys/dev/pci/drm/radeon/trinity_dpm.c

590

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

591

u32 vid_7bit = sumo_convert_vid2_to_vid7(rdev, &pi->sys_info.vid_mapping_table, vid);

sys/dev/pci/drm/radeon/trinity_dpm.c

669

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

682

trinity_set_at(rdev, index, pi->at[index]);

sys/dev/pci/drm/radeon/trinity_dpm.c

811

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

814

trinity_program_power_level(rdev, &pi->boot_pl, 0);

sys/dev/pci/drm/radeon/trinity_dpm.c

877

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

879

if (pi->enable_gfx_power_gating) {

sys/dev/pci/drm/radeon/trinity_dpm.c

883

if (pi->uvd_dpm) {

sys/dev/pci/drm/radeon/trinity_dpm.c

909

if (pi->enable_gfx_power_gating) {

sys/dev/pci/drm/radeon/trinity_dpm.c

959

struct trinity_power_info *pi = trinity_get_pi(rdev);

sys/dev/pci/drm/radeon/trinity_dpm.c

963

value |= HT((pi->thermal_auto_throttling + 49) * 8);

sys/dev/pci/drm/radeon/trinity_dpm.c

964

value |= LT((pi->thermal_auto_throttling + 49 - pi->sys_info.htc_hyst_lmt) * 8);

sys/dev/pci/if_bnxtreg.h

89426

uint32_t pi;

sys/dev/pci/if_ice.c

10141

ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,

sys/dev/pci/if_ice.c

10146

struct ice_hw *hw = pi->hw;

sys/dev/pci/if_ice.c

10190

ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,

sys/dev/pci/if_ice.c

10196

if (!pi)

sys/dev/pci/if_ice.c

10198

hw = pi->hw;

sys/dev/pci/if_ice.c

10202

layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,

sys/dev/pci/if_ice.c

10208

return ice_sched_set_node_bw_dflt(pi, node, rl_type, layer_num);

sys/dev/pci/if_ice.c

10210

return ice_sched_set_node_bw(pi, node, rl_type, bw, layer_num);

sys/dev/pci/if_ice.c

10260

struct ice_port_info *pi = hw->port_info;

sys/dev/pci/if_ice.c

10275

status = ice_sched_set_node_bw_lmt(pi, node, ICE_MIN_BW,

sys/dev/pci/if_ice.c

10288

status = ice_sched_set_node_bw_lmt(pi, node, ICE_MAX_BW,

sys/dev/pci/if_ice.c

10301

status = ice_sched_set_node_bw_lmt(pi, node, ICE_SHARED_BW,

sys/dev/pci/if_ice.c

10314

ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx)

sys/dev/pci/if_ice.c

10319

q_node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid);

sys/dev/pci/if_ice.c

10322

return ice_sched_replay_node_bw(pi->hw, q_node, &q_ctx->bw_t_info);

sys/dev/pci/if_ice.c

10339

ice_ena_vsi_txq(struct ice_port_info *pi, uint16_t vsi_handle, uint8_t tc,

sys/dev/pci/if_ice.c

10349

if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)

sys/dev/pci/if_ice.c

10355

hw = pi->hw;

sys/dev/pci/if_ice.c

10360

ice_acquire_lock(&pi->sched_lock);

sys/dev/pci/if_ice.c

10371

parent = ice_sched_get_free_qparent(pi, vsi_handle, tc,

sys/dev/pci/if_ice.c

10419

status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node,

sys/dev/pci/if_ice.c

10422

status = ice_sched_replay_q_bw(pi, q_ctx);

sys/dev/pci/if_ice.c

10426

ice_release_lock(&pi->sched_lock);

sys/dev/pci/if_ice.c

10656

ice_dis_vsi_txq(struct ice_port_info *pi, uint16_t vsi_handle, uint8_t tc,

sys/dev/pci/if_ice.c

10667

if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)

sys/dev/pci/if_ice.c

10670

hw = pi->hw;

sys/dev/pci/if_ice.c

10688

ice_acquire_lock(&pi->sched_lock);

sys/dev/pci/if_ice.c

10693

node = ice_sched_find_node_by_teid(pi->root, q_teids[i]);

sys/dev/pci/if_ice.c

10715

ice_free_sched_node(pi, node);

sys/dev/pci/if_ice.c

10719

ice_release_lock(&pi->sched_lock);

sys/dev/pci/if_ice.c

11921

ice_copy_phy_caps_to_cfg(struct ice_port_info *pi,

sys/dev/pci/if_ice.c

11925

if (!pi || !caps || !cfg)

sys/dev/pci/if_ice.c

12261

struct ice_port_info *pi = hw->port_info;

sys/dev/pci/if_ice.c

12289

status = ice_aq_get_phy_caps(pi, false, phy_data->report_mode, &pcaps, NULL);

sys/dev/pci/if_ice.c

12337

struct ice_port_info *pi = sc->hw.port_info;

sys/dev/pci/if_ice.c

12342

link_speeds = pi->phy.curr_user_speed_req;

sys/dev/pci/if_ice.c

12426

pi->phy.curr_user_speed_req = phy_data.user_speeds_intr;

sys/dev/pci/if_ice.c

12512

struct ice_port_info *pi)

sys/dev/pci/if_ice.c

12515

struct ice_hw *hw = pi->hw;

sys/dev/pci/if_ice.c

12527

tlv_start = tlv + pi->lport * ICE_SR_PFA_LINK_OVERRIDE_WORDS +

sys/dev/pci/if_ice.c

12608

ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,

sys/dev/pci/if_ice.c

12615

if (!pi || !cfg)

sys/dev/pci/if_ice.c

12618

hw = pi->hw;

sys/dev/pci/if_ice.c

12625

status = ice_aq_get_phy_caps(pi, false,

sys/dev/pci/if_ice.c

12677

if (fec == ICE_FEC_AUTO && ice_fw_supports_link_override(pi->hw) &&

sys/dev/pci/if_ice.c

12678

!ice_fw_supports_report_dflt_cfg(pi->hw)) {

sys/dev/pci/if_ice.c

12681

if (ice_get_link_default_override(&tlv, pi))

sys/dev/pci/if_ice.c

12708

struct ice_port_info *pi = sc->hw.port_info;

sys/dev/pci/if_ice.c

12712

status = ice_cfg_phy_fec(pi, cfg, pi->phy.curr_user_fec_req);

sys/dev/pci/if_ice.c

12729

ice_apply_saved_fc_req_to_cfg(struct ice_port_info *pi,

sys/dev/pci/if_ice.c

12735

switch (pi->phy.curr_user_fc_req) {

sys/dev/pci/if_ice.c

12818

ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,

sys/dev/pci/if_ice.c

12837

desc.params.set_phy.lport_num = pi->lport;

sys/dev/pci/if_ice.c

12859

pi->phy.curr_user_phy_cfg = *cfg;

sys/dev/pci/if_ice.c

12882

struct ice_port_info *pi = sc->hw.port_info;

sys/dev/pci/if_ice.c

12896

status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_ACTIVE_CFG,

sys/dev/pci/if_ice.c

12915

ice_copy_phy_caps_to_cfg(pi, &pcaps, &cfg);

sys/dev/pci/if_ice.c

12920

pi->phy.curr_user_speed_req = dflt_user_speed;

sys/dev/pci/if_ice.c

12926

pi->phy.curr_user_fec_req = dflt_fec_mode;

sys/dev/pci/if_ice.c

12931

ice_apply_saved_fc_req_to_cfg(pi, &cfg);

sys/dev/pci/if_ice.c

12937

status = ice_aq_set_phy_cfg(hw, pi, &cfg, NULL);

sys/dev/pci/if_ice.c

12969

ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,

sys/dev/pci/if_ice.c

12981

cmd->lport_num = pi->lport;

sys/dev/pci/if_ice.c

12987

status = ice_aq_send_cmd(pi->hw, &desc, NULL, 0, cd);

sys/dev/pci/if_ice.c

12992

pi->phy.curr_user_phy_cfg.caps |= ICE_AQC_PHY_EN_LINK;

sys/dev/pci/if_ice.c

12994

pi->phy.curr_user_phy_cfg.caps &= ~ICE_AQC_PHY_EN_LINK;

sys/dev/pci/if_ice.c

13693

struct ice_port_info *pi = hw->port_info;

sys/dev/pci/if_ice.c

13694

struct ice_link_status *li = &pi->phy.link_info;

sys/dev/pci/if_ice.c

14445

struct ice_port_info *pi = sc->hw.port_info;

sys/dev/pci/if_ice.c

14461

status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_ACTIVE_CFG,

sys/dev/pci/if_ice.c

16423

ice_aq_set_port_params(struct ice_port_info *pi, uint16_t bad_frame_vsi,

sys/dev/pci/if_ice.c

16428

struct ice_hw *hw = pi->hw;

sys/dev/pci/if_ice.c

20671

ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,

sys/dev/pci/if_ice.c

20677

vsi_layer = ice_sched_get_vsi_layer(pi->hw);

sys/dev/pci/if_ice.c

20678

node = ice_sched_get_first_node(pi, tc_node, vsi_layer);

sys/dev/pci/if_ice.c

20717

ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, uint16_t vsi_handle)

sys/dev/pci/if_ice.c

20723

LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &pi->hw->agg_list,

sys/dev/pci/if_ice.c

20734

ice_free(pi->hw, agg_vsi_info);

sys/dev/pci/if_ice.c

20753

ice_sched_rm_vsi_cfg(struct ice_port_info *pi, uint16_t vsi_handle,

sys/dev/pci/if_ice.c

20761

if (!ice_is_vsi_valid(pi->hw, vsi_handle))

sys/dev/pci/if_ice.c

20764

ice_acquire_lock(&pi->sched_lock);

sys/dev/pci/if_ice.c

20766

vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);

sys/dev/pci/if_ice.c

20774

tc_node = ice_sched_get_tc_node(pi, i);

sys/dev/pci/if_ice.c

20778

vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);

sys/dev/pci/if_ice.c

20790

ice_free_sched_node(pi, vsi_node->children[j]);

sys/dev/pci/if_ice.c

20802

ice_free_sched_node(pi, vsi_node);

sys/dev/pci/if_ice.c

20806

ice_sched_rm_agg_vsi_info(pi, vsi_handle);

sys/dev/pci/if_ice.c

20817

ice_release_lock(&pi->sched_lock);

sys/dev/pci/if_ice.c

20831

ice_rm_vsi_lan_cfg(struct ice_port_info *pi, uint16_t vsi_handle)

sys/dev/pci/if_ice.c

20833

return ice_sched_rm_vsi_cfg(pi, vsi_handle, ICE_SCHED_NODE_OWNER_LAN);

sys/dev/pci/if_ice.c

21751

ice_sched_calc_vsi_support_nodes(struct ice_port_info *pi,

sys/dev/pci/if_ice.c

21758

vsil = ice_sched_get_vsi_layer(pi->hw);

sys/dev/pci/if_ice.c

21759

for (i = vsil; i >= pi->hw->sw_entry_point_layer; i--) {

sys/dev/pci/if_ice.c

21769

node = ice_sched_get_first_node(pi, tc_node, (uint8_t)i);

sys/dev/pci/if_ice.c

21773

pi->hw->max_children[i])

sys/dev/pci/if_ice.c

21804

ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,

sys/dev/pci/if_ice.c

21813

struct ice_hw *hw = pi->hw;

sys/dev/pci/if_ice.c

21854

status = ice_sched_add_node(pi, layer,

sys/dev/pci/if_ice.c

21857

status = ice_sched_add_node(pi, layer,

sys/dev/pci/if_ice.c

21882

prev = ice_sched_get_first_node(pi, tc_node, layer);

sys/dev/pci/if_ice.c

21890

if (!pi->sib_head[tc_node->tc_num][layer])

sys/dev/pci/if_ice.c

21891

pi->sib_head[tc_node->tc_num][layer] = new_node;

sys/dev/pci/if_ice.c

21914

ice_sched_add_nodes_to_hw_layer(struct ice_port_info *pi,

sys/dev/pci/if_ice.c

21927

if (!parent || layer < pi->hw->sw_entry_point_layer)

sys/dev/pci/if_ice.c

21931

max_child_nodes = pi->hw->max_children[parent->tx_sched_layer];

sys/dev/pci/if_ice.c

21941

return ice_sched_add_elems(pi, tc_node, parent, layer, num_nodes,

sys/dev/pci/if_ice.c

21958

ice_sched_add_nodes_to_layer(struct ice_port_info *pi,

sys/dev/pci/if_ice.c

21973

status = ice_sched_add_nodes_to_hw_layer(pi, tc_node, parent,

sys/dev/pci/if_ice.c

21993

max_child_nodes = pi->hw->max_children[parent->tx_sched_layer];

sys/dev/pci/if_ice.c

22026

ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, uint16_t vsi_handle,

sys/dev/pci/if_ice.c

22034

if (!pi)

sys/dev/pci/if_ice.c

22037

vsil = ice_sched_get_vsi_layer(pi->hw);

sys/dev/pci/if_ice.c

22038

for (i = pi->hw->sw_entry_point_layer; i <= vsil; i++) {

sys/dev/pci/if_ice.c

22041

status = ice_sched_add_nodes_to_layer(pi, tc_node, parent,

sys/dev/pci/if_ice.c

22076

ice_sched_add_vsi_to_topo(struct ice_port_info *pi, uint16_t vsi_handle,

sys/dev/pci/if_ice.c

22082

tc_node = ice_sched_get_tc_node(pi, tc);

sys/dev/pci/if_ice.c

22087

ice_sched_calc_vsi_support_nodes(pi, tc_node, num_nodes);

sys/dev/pci/if_ice.c

22090

return ice_sched_add_vsi_support_nodes(pi, vsi_handle, tc_node,

sys/dev/pci/if_ice.c

22180

ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, uint16_t vsi_handle,

sys/dev/pci/if_ice.c

22184

struct ice_hw *hw = pi->hw;

sys/dev/pci/if_ice.c

22191

parent = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);

sys/dev/pci/if_ice.c

22198

status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,

sys/dev/pci/if_ice.c

22235

ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, uint16_t vsi_handle,

sys/dev/pci/if_ice.c

22243

struct ice_hw *hw = pi->hw;

sys/dev/pci/if_ice.c

22246

tc_node = ice_sched_get_tc_node(pi, tc);

sys/dev/pci/if_ice.c

22250

vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);

sys/dev/pci/if_ice.c

22288

status = ice_sched_add_vsi_child_nodes(pi, vsi_handle, tc_node,

sys/dev/pci/if_ice.c

22314

ice_sched_cfg_vsi(struct ice_port_info *pi, uint16_t vsi_handle, uint8_t tc,

sys/dev/pci/if_ice.c

22320

struct ice_hw *hw = pi->hw;

sys/dev/pci/if_ice.c

22324

tc_node = ice_sched_get_tc_node(pi, tc);

sys/dev/pci/if_ice.c

22330

vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);

sys/dev/pci/if_ice.c

22347

status = ice_sched_add_vsi_to_topo(pi, vsi_handle, tc);

sys/dev/pci/if_ice.c

22351

vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);

sys/dev/pci/if_ice.c

22366

status = ice_sched_update_vsi_child_nodes(pi, vsi_handle, tc, maxqs,

sys/dev/pci/if_ice.c

22399

ice_cfg_vsi_qs(struct ice_port_info *pi, uint16_t vsi_handle,

sys/dev/pci/if_ice.c

22405

if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)

sys/dev/pci/if_ice.c

22408

if (!ice_is_vsi_valid(pi->hw, vsi_handle))

sys/dev/pci/if_ice.c

22411

ice_acquire_lock(&pi->sched_lock);

sys/dev/pci/if_ice.c

22415

if (!ice_sched_get_tc_node(pi, i))

sys/dev/pci/if_ice.c

22418

status = ice_sched_cfg_vsi(pi, vsi_handle, i, maxqs[i], owner,

sys/dev/pci/if_ice.c

22424

ice_release_lock(&pi->sched_lock);

sys/dev/pci/if_ice.c

22439

ice_cfg_vsi_lan(struct ice_port_info *pi, uint16_t vsi_handle,

sys/dev/pci/if_ice.c

22442

return ice_cfg_vsi_qs(pi, vsi_handle, tc_bitmap, max_lanqs,

sys/dev/pci/if_ice.c

22548

struct ice_port_info *pi = hw->port_info;

sys/dev/pci/if_ice.c

22551

ice_acquire_lock(&pi->sched_lock);

sys/dev/pci/if_ice.c

22563

ice_sched_get_ena_tc_bitmap(pi,

sys/dev/pci/if_ice.c

22582

ice_release_lock(&pi->sched_lock);

sys/dev/pci/if_ice.c

22907

ice_replay_vsi_fltr(struct ice_hw *hw, struct ice_port_info *pi,

sys/dev/pci/if_ice.c

22932

pi->lport,

sys/dev/pci/if_ice.c

22952

pi->lport,

sys/dev/pci/if_ice.c

22970

ice_replay_vsi_all_fltr(struct ice_hw *hw, struct ice_port_info *pi,

sys/dev/pci/if_ice.c

22985

status = ice_replay_vsi_fltr(hw, pi, sw, vsi_handle, i,

sys/dev/pci/if_ice.c

23009

struct ice_port_info *pi = hw->port_info;

sys/dev/pci/if_ice.c

23022

ice_sched_get_ena_tc_bitmap(pi, agg_info->replay_tc_bitmap,

sys/dev/pci/if_ice.c

23035

ice_sched_get_ena_tc_bitmap(pi, agg_vsi_info->replay_tc_bitmap,

sys/dev/pci/if_ice.c

23038

status = ice_sched_assoc_vsi_to_agg(pi, agg_info->agg_id, vsi_handle,

sys/dev/pci/if_ice.c

23062

struct ice_port_info *pi = hw->port_info;

sys/dev/pci/if_ice.c

23066

ice_acquire_lock(&pi->sched_lock);

sys/dev/pci/if_ice.c

23070

ice_release_lock(&pi->sched_lock);

sys/dev/pci/if_ice.c

23086

struct ice_port_info *pi = hw->port_info;

sys/dev/pci/if_ice.c

23103

status = ice_replay_vsi_all_fltr(hw, pi, vsi_handle);

sys/dev/pci/if_ice.c

23401

ice_update_link_info(struct ice_port_info *pi)

sys/dev/pci/if_ice.c

23406

if (!pi)

sys/dev/pci/if_ice.c

23409

li = &pi->phy.link_info;

sys/dev/pci/if_ice.c

23411

status = ice_aq_get_link_info(pi, true, NULL, NULL);

sys/dev/pci/if_ice.c

23419

hw = pi->hw;

sys/dev/pci/if_ice.c

23425

status = ice_aq_get_phy_caps(pi, false,

sys/dev/pci/if_ice.c

23448

ice_get_link_status(struct ice_port_info *pi, bool *link_up)

sys/dev/pci/if_ice.c

23453

if (!pi || !link_up)

sys/dev/pci/if_ice.c

23456

phy_info = &pi->phy;

sys/dev/pci/if_ice.c

23459

status = ice_update_link_info(pi);

sys/dev/pci/if_ice.c

23485

struct ice_port_info *pi;

sys/dev/pci/if_ice.c

23488

pi = hw->port_info;

sys/dev/pci/if_ice.c

23490

dcbcfg = &pi->qos_cfg.local_dcbx_cfg;

sys/dev/pci/if_ice.c

23987

ice_set_dcb_cfg(struct ice_port_info *pi)

sys/dev/pci/if_ice.c

23995

if (!pi)

sys/dev/pci/if_ice.c

23998

hw = pi->hw;

sys/dev/pci/if_ice.c

24001

dcbcfg = &pi->qos_cfg.local_dcbx_cfg;

sys/dev/pci/if_ice.c

24033

struct ice_port_info *pi;

sys/dev/pci/if_ice.c

24042

pi = hw->port_info;

sys/dev/pci/if_ice.c

24045

if (!pi->qos_cfg.is_sw_lldp &&

sys/dev/pci/if_ice.c

24049

status = ice_set_dcb_cfg(pi);

sys/dev/pci/if_ice.c

24065

ice_aq_speed_to_rate(struct ice_port_info *pi)

sys/dev/pci/if_ice.c

24067

switch (pi->phy.link_info.link_speed) {

sys/dev/pci/if_ice.c

26921

struct ice_port_info *pi = sc->hw.port_info;

sys/dev/pci/if_ice.c

26933

pi->phy.get_link_info = true;

sys/dev/pci/if_ice.c

26934

ice_get_link_status(pi, &sc->link_up);

sys/dev/pci/if_ice.c

26936

if (pi->phy.link_info.topo_media_conflict &

sys/dev/pci/if_ice.c

26943

if ((pi->phy.link_info.link_info & ICE_AQ_MEDIA_AVAILABLE) &&

sys/dev/pci/if_ice.c

26944

!(pi->phy.link_info.link_info & ICE_AQ_LINK_UP)) {

sys/dev/pci/if_ice.c

26945

if (!(pi->phy.link_info.an_info & ICE_AQ_QUALIFIED_MODULE))

sys/dev/pci/if_ice.c

26950

if (pi->phy.link_info.link_cfg_err &

sys/dev/pci/if_ice.c

26955

if (pi->phy.link_info.link_cfg_err &

sys/dev/pci/if_ice.c

26962

if (!(pi->phy.link_info.link_info & ICE_AQ_MEDIA_AVAILABLE)) {

sys/dev/pci/if_ice.c

26964

status = ice_aq_set_link_restart_an(pi, false, NULL);

sys/dev/pci/if_ice.c

27679

struct ice_port_info *pi)

sys/dev/pci/if_ice.c

27689

dcbcfg = &pi->qos_cfg.local_dcbx_cfg;

sys/dev/pci/if_ice.c

27726

cmp_dcbcfg = &pi->qos_cfg.desired_dcbx_cfg;

sys/dev/pci/if_ice.c

27728

cmp_dcbcfg = &pi->qos_cfg.remote_dcbx_cfg;

sys/dev/pci/if_ice.c

27799

ice_get_dcb_cfg_from_mib_change(struct ice_port_info *pi,

sys/dev/pci/if_ice.c

27802

struct ice_dcbx_cfg *dcbx_cfg = &pi->qos_cfg.local_dcbx_cfg;

sys/dev/pci/if_ice.c

27810

dcbx_cfg = &pi->qos_cfg.remote_dcbx_cfg;

sys/dev/pci/if_ice.c

27822

pi->qos_cfg.desired_dcbx_cfg = pi->qos_cfg.local_dcbx_cfg;

sys/dev/pci/if_ice.c

27824

event->msg_buf, pi);

sys/dev/pci/if_ice.c

27857

ice_get_ieee_or_cee_dcb_cfg(struct ice_port_info *pi, uint8_t dcbx_mode)

sys/dev/pci/if_ice.c

27862

if (!pi)

sys/dev/pci/if_ice.c

27866

dcbx_cfg = &pi->qos_cfg.local_dcbx_cfg;

sys/dev/pci/if_ice.c

27868

dcbx_cfg = &pi->qos_cfg.desired_dcbx_cfg;

sys/dev/pci/if_ice.c

27873

ret = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_LOCAL,

sys/dev/pci/if_ice.c

27879

dcbx_cfg = &pi->qos_cfg.remote_dcbx_cfg;

sys/dev/pci/if_ice.c

27880

ret = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_REMOTE,

sys/dev/pci/if_ice.c

27883

if (pi->hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT)

sys/dev/pci/if_ice.c

27897

ice_get_dcb_cfg(struct ice_port_info *pi)

sys/dev/pci/if_ice.c

27903

if (!pi)

sys/dev/pci/if_ice.c

27906

ret = ice_aq_get_cee_dcb_cfg(pi->hw, &cee_cfg, NULL);

sys/dev/pci/if_ice.c

27909

ret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_CEE);

sys/dev/pci/if_ice.c

27910

ice_cee_to_dcb_cfg(&cee_cfg, pi);

sys/dev/pci/if_ice.c

27911

} else if (pi->hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT) {

sys/dev/pci/if_ice.c

27913

dcbx_cfg = &pi->qos_cfg.local_dcbx_cfg;

sys/dev/pci/if_ice.c

27915

ret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_IEEE);

sys/dev/pci/if_ice.c

28006

struct ice_port_info *pi;

sys/dev/pci/if_ice.c

28010

pi = sc->hw.port_info;

sys/dev/pci/if_ice.c

28011

local_dcbx_cfg = &pi->qos_cfg.local_dcbx_cfg;

sys/dev/pci/if_ice.c

28045

status = ice_query_port_ets(pi, &port_ets, sizeof(port_ets), NULL);

sys/dev/pci/if_ice.c

28058

ice_rdma_dcb_qos_update(sc, pi);

sys/dev/pci/if_ice.c

28082

struct ice_port_info *pi;

sys/dev/pci/if_ice.c

28092

pi = sc->hw.port_info;

sys/dev/pci/if_ice.c

28108

status = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_REMOTE,

sys/dev/pci/if_ice.c

28110

&pi->qos_cfg.remote_dcbx_cfg);

sys/dev/pci/if_ice.c

28121

local_dcbx_cfg = &pi->qos_cfg.local_dcbx_cfg;

sys/dev/pci/if_ice.c

28128

ice_get_dcb_cfg_from_mib_change(pi, event);

sys/dev/pci/if_ice.c

28131

status = ice_get_dcb_cfg(pi);

sys/dev/pci/if_ice.c

28574

struct ice_port_info *pi = hw->port_info;

sys/dev/pci/if_ice.c

28577

pi->phy.get_link_info = true;

sys/dev/pci/if_ice.c

28578

ice_get_link_status(pi, &sc->link_up);

sys/dev/pci/if_ice.c

28580

if (pi->phy.link_info.link_info & ICE_AQ_MEDIA_AVAILABLE) {

sys/dev/pci/if_ice.c

30258

struct ice_port_info *pi = sc->hw.port_info;

sys/dev/pci/if_ice.c

30268

status = ice_get_link_default_override(&tlv, pi);

sys/dev/pci/if_ice.c

30322

struct ice_port_info *pi = sc->hw.port_info;

sys/dev/pci/if_ice.c

30330

status = ice_aq_get_phy_caps(pi, false, report_mode, &pcaps, NULL);

sys/dev/pci/if_ice.c

30344

pi->phy.curr_user_speed_req =

sys/dev/pci/if_ice.c

30346

pi->phy.curr_user_fec_req = ice_caps_to_fec_mode(pcaps.caps,

sys/dev/pci/if_ice.c

30348

pi->phy.curr_user_fc_req = ice_caps_to_fc_mode(pcaps.caps);

sys/dev/pci/if_ice.c

30446

struct ice_port_info *pi = sc->hw.port_info;

sys/dev/pci/if_ice.c

30450

pi->phy.get_link_info = true;

sys/dev/pci/if_ice.c

30451

status = ice_get_link_status(pi, &sc->link_up);

sys/dev/pci/if_ice.c

30459

if (pi->phy.link_info.link_info & ICE_AQ_MEDIA_AVAILABLE) {

sys/dev/pci/if_ice.c

30476

status = ice_aq_set_link_restart_an(pi, false, NULL);

sys/dev/pci/if_ice.c

5428

ice_init_port_info(struct ice_port_info *pi, uint16_t vsi_port_num,

sys/dev/pci/if_ice.c

5433

pi->lport = (uint8_t)(vsi_port_num & ICE_LPORT_MASK);

sys/dev/pci/if_ice.c

5434

pi->sw_id = swid;

sys/dev/pci/if_ice.c

5435

pi->pf_vf_num = pf_vf_num;

sys/dev/pci/if_ice.c

5436

pi->is_vf = is_vf;

sys/dev/pci/if_ice.c

5675

ice_sched_add_root_node(struct ice_port_info *pi,

sys/dev/pci/if_ice.c

5681

if (!pi)

sys/dev/pci/if_ice.c

5684

hw = pi->hw;

sys/dev/pci/if_ice.c

5698

pi->root = root;

sys/dev/pci/if_ice.c

5754

ice_sched_get_tc_node(struct ice_port_info *pi, uint8_t tc)

sys/dev/pci/if_ice.c

5758

if (!pi || !pi->root)

sys/dev/pci/if_ice.c

5760

for (i = 0; i < pi->root->num_children; i++)

sys/dev/pci/if_ice.c

5761

if (pi->root->children[i]->tc_num == tc)

sys/dev/pci/if_ice.c

5762

return pi->root->children[i];

sys/dev/pci/if_ice.c

5854

ice_sched_add_node(struct ice_port_info *pi, uint8_t layer,

sys/dev/pci/if_ice.c

5864

if (!pi)

sys/dev/pci/if_ice.c

5867

hw = pi->hw;

sys/dev/pci/if_ice.c

5870

parent = ice_sched_find_node_by_teid(pi->root,

sys/dev/pci/if_ice.c

5978

ice_sched_get_first_node(struct ice_port_info *pi,

sys/dev/pci/if_ice.c

5981

return pi->sib_head[parent->tc_num][layer];

sys/dev/pci/if_ice.c

5994

ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node)

sys/dev/pci/if_ice.c

5997

struct ice_hw *hw = pi->hw;

sys/dev/pci/if_ice.c

6005

ice_free_sched_node(pi, node->children[0]);

sys/dev/pci/if_ice.c

6031

p = ice_sched_get_first_node(pi, node, node->tx_sched_layer);

sys/dev/pci/if_ice.c

6041

if (pi->sib_head[node->tc_num][node->tx_sched_layer] == node)

sys/dev/pci/if_ice.c

6042

pi->sib_head[node->tc_num][node->tx_sched_layer] =

sys/dev/pci/if_ice.c

6060

ice_rm_dflt_leaf_node(struct ice_port_info *pi)

sys/dev/pci/if_ice.c

6064

node = pi->root;

sys/dev/pci/if_ice.c

6075

status = ice_sched_remove_elems(pi->hw, node->parent, 1, &teid);

sys/dev/pci/if_ice.c

6077

ice_free_sched_node(pi, node);

sys/dev/pci/if_ice.c

6089

ice_sched_rm_dflt_nodes(struct ice_port_info *pi)

sys/dev/pci/if_ice.c

6093

ice_rm_dflt_leaf_node(pi);

sys/dev/pci/if_ice.c

6096

node = pi->root;

sys/dev/pci/if_ice.c

6098

if (node->tx_sched_layer >= pi->hw->sw_entry_point_layer &&

sys/dev/pci/if_ice.c

6101

ice_free_sched_node(pi, node);

sys/dev/pci/if_ice.c

6120

ice_sched_init_port(struct ice_port_info *pi)

sys/dev/pci/if_ice.c

6129

if (!pi)

sys/dev/pci/if_ice.c

6131

hw = pi->hw;

sys/dev/pci/if_ice.c

6140

status = ice_aq_get_dflt_topo(hw, pi->lport, buf, ICE_AQ_MAX_BUF_LEN,

sys/dev/pci/if_ice.c

6168

pi->last_node_teid =

sys/dev/pci/if_ice.c

6171

pi->last_node_teid =

sys/dev/pci/if_ice.c

6175

status = ice_sched_add_root_node(pi, &buf[0].generic[0]);

sys/dev/pci/if_ice.c

6190

status = ice_sched_add_node(pi, j,

sys/dev/pci/if_ice.c

6198

if (pi->root)

sys/dev/pci/if_ice.c

6199

ice_sched_rm_dflt_nodes(pi);

sys/dev/pci/if_ice.c

6202

pi->port_state = ICE_SCHED_PORT_STATE_READY;

sys/dev/pci/if_ice.c

6203

ice_init_lock(&pi->sched_lock);

sys/dev/pci/if_ice.c

6208

if (status && pi->root) {

sys/dev/pci/if_ice.c

6209

ice_free_sched_node(pi, pi->root);

sys/dev/pci/if_ice.c

6210

pi->root = NULL;

sys/dev/pci/if_ice.c

6313

ice_sched_clear_rl_prof(struct ice_port_info *pi)

sys/dev/pci/if_ice.c

6316

struct ice_hw *hw = pi->hw;

sys/dev/pci/if_ice.c

6348

ice_sched_clear_tx_topo(struct ice_port_info *pi)

sys/dev/pci/if_ice.c

6350

if (!pi)

sys/dev/pci/if_ice.c

6353

ice_sched_clear_rl_prof(pi);

sys/dev/pci/if_ice.c

6354

if (pi->root) {

sys/dev/pci/if_ice.c

6355

ice_free_sched_node(pi, pi->root);

sys/dev/pci/if_ice.c

6356

pi->root = NULL;

sys/dev/pci/if_ice.c

6367

ice_sched_clear_port(struct ice_port_info *pi)

sys/dev/pci/if_ice.c

6369

if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)

sys/dev/pci/if_ice.c

6372

pi->port_state = ICE_SCHED_PORT_STATE_INIT;

sys/dev/pci/if_ice.c

6374

ice_acquire_lock(&pi->sched_lock);

sys/dev/pci/if_ice.c

6376

ice_sched_clear_tx_topo(pi);

sys/dev/pci/if_ice.c

6378

ice_release_lock(&pi->sched_lock);

sys/dev/pci/if_ice.c

6379

ice_destroy_lock(&pi->sched_lock);

sys/dev/pci/if_ice.c

6639

ice_set_media_type(struct ice_port_info *pi)

sys/dev/pci/if_ice.c

6644

phy_type_high = pi->phy.phy_type_high;

sys/dev/pci/if_ice.c

6645

phy_type_low = pi->phy.phy_type_low;

sys/dev/pci/if_ice.c

6646

media_type = &pi->phy.media_type;

sys/dev/pci/if_ice.c

6649

if (!(pi->phy.link_info.link_info & ICE_AQ_MEDIA_AVAILABLE))

sys/dev/pci/if_ice.c

6698

ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods,

sys/dev/pci/if_ice.c

6711

if (!pcaps || (report_mode & ~ICE_AQC_REPORT_MODE_M) || !pi)

sys/dev/pci/if_ice.c

6713

hw = pi->hw;

sys/dev/pci/if_ice.c

6773

pi->phy.phy_type_low = le64toh(pcaps->phy_type_low);

sys/dev/pci/if_ice.c

6774

pi->phy.phy_type_high = le64toh(pcaps->phy_type_high);

sys/dev/pci/if_ice.c

6775

memcpy(pi->phy.link_info.module_type, &pcaps->module_type,

sys/dev/pci/if_ice.c

6776

sizeof(pi->phy.link_info.module_type));

sys/dev/pci/if_ice.c

6777

ice_set_media_type(pi);

sys/dev/pci/if_ice.c

6779

pi->phy.media_type);

sys/dev/pci/if_ice.c

6795

ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,

sys/dev/pci/if_ice.c

6808

if (!pi)

sys/dev/pci/if_ice.c

6810

hw = pi->hw;

sys/dev/pci/if_ice.c

6812

li_old = &pi->phy.link_info_old;

sys/dev/pci/if_ice.c

6813

li = &pi->phy.link_info;

sys/dev/pci/if_ice.c

6814

hw_fc_info = &pi->fc;

sys/dev/pci/if_ice.c

6820

resp->lport_num = pi->lport;

sys/dev/pci/if_ice.c

6879

pi->phy.get_link_info = false;

sys/dev/pci/if_ice.c

9345

ice_sched_get_free_qgrp(struct ice_port_info *pi,

sys/dev/pci/if_ice.c

9365

if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))

sys/dev/pci/if_ice.c

9426

ice_sched_get_free_qparent(struct ice_port_info *pi, uint16_t vsi_handle,

sys/dev/pci/if_ice.c

9434

qgrp_layer = ice_sched_get_qgrp_layer(pi->hw);

sys/dev/pci/if_ice.c

9435

vsi_layer = ice_sched_get_vsi_layer(pi->hw);

sys/dev/pci/if_ice.c

9436

max_children = pi->hw->max_children[qgrp_layer];

sys/dev/pci/if_ice.c

9438

vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);

sys/dev/pci/if_ice.c

9453

qgrp_node = ice_sched_get_first_node(pi, vsi_node, qgrp_layer);

sys/dev/pci/if_ice.c

9456

if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))

sys/dev/pci/if_ice.c

9464

return ice_sched_get_free_qgrp(pi, vsi_node, qgrp_node, owner);

sys/dev/pci/if_ice.c

9678

ice_sched_get_rl_prof_layer(struct ice_port_info *pi, enum ice_rl_type rl_type,

sys/dev/pci/if_ice.c

9681

struct ice_hw *hw = pi->hw;

sys/dev/pci/if_ice.c

9843

ice_sched_set_node_bw_dflt(struct ice_port_info *pi,

sys/dev/pci/if_ice.c

9853

hw = pi->hw;

sys/dev/pv/if_hvn.c

1504

struct rndis_pktinfo *pi;

sys/dev/pv/if_hvn.c

1537

pi = (struct rndis_pktinfo *)((caddr_t)pkt + RNDIS_HEADER_OFFSET +

sys/dev/pv/if_hvn.c

1540

if (pi->rm_size > pkt->rm_pktinfolen) {

sys/dev/pv/if_hvn.c

1542

sc->sc_dev.dv_xname, pi->rm_size,

sys/dev/pv/if_hvn.c

1546

switch (pi->rm_type) {

sys/dev/pv/if_hvn.c

1548

memcpy(&csum, pi->rm_data, sizeof(csum));

sys/dev/pv/if_hvn.c

1557

memcpy(&vlan, pi->rm_data, sizeof(vlan));

sys/dev/pv/if_hvn.c

1569

sc->sc_dev.dv_xname, pi->rm_type);

sys/dev/pv/if_hvn.c

1571

pkt->rm_pktinfolen -= pi->rm_size;

sys/dev/pv/if_hvn.c

1572

pi = (struct rndis_pktinfo *)((caddr_t)pi + pi->rm_size);

sys/dev/pv/if_hvn.c

503

struct rndis_pktinfo *pi;

sys/dev/pv/if_hvn.c

504

size_t pi_size = sizeof(*pi) + datalen;

sys/dev/pv/if_hvn.c

511

pi = (struct rndis_pktinfo *)cp;

sys/dev/pv/if_hvn.c

512

pi->rm_size = pi_size;

sys/dev/pv/if_hvn.c

513

pi->rm_type = type;

sys/dev/pv/if_hvn.c

514

pi->rm_pktinfooffset = sizeof(*pi);

sys/dev/pv/if_hvn.c

518

return ((char *)pi->rm_data);

sys/dev/usb/if_umb.c

1597

struct mbim_cid_pin_info *pi = data;

sys/dev/usb/if_umb.c

1601

if (len < sizeof (*pi))

sys/dev/usb/if_umb.c

1604

attempts_left = letoh32(pi->remaining_attempts);

sys/dev/usb/if_umb.c

1608

switch (letoh32(pi->state)) {

sys/dev/usb/if_umb.c

1613

switch (letoh32(pi->type)) {

sys/dev/usb/if_umb.c

1630

DEVNAM(sc), umb_pin_type(letoh32(pi->type)),

sys/dev/usb/if_umb.c

1631

(letoh32(pi->state) == MBIM_PIN_STATE_UNLOCKED) ?

sys/dev/usb/if_umb.c

1633

letoh32(pi->remaining_attempts));

sys/dev/usb/uaudio.c

1127

struct uaudio_mixent *m, *i, **pi;

sys/dev/usb/uaudio.c

1168

for (pi = &u->mixent_list; (i = *pi) != NULL; pi = &i->next) {

sys/dev/usb/uaudio.c

1181

m->next = *pi;

sys/dev/usb/uaudio.c

1182

*pi = m;

sys/dev/vnd.c

378

struct partinfo pi;

sys/dev/vnd.c

386

if (bsw->d_ioctl(dev, DIOCGPART, (caddr_t)&pi, FREAD, p))

sys/dev/vnd.c

389

DL_GETPSIZE(pi.part), pi.disklab->d_secsize);

sys/dev/vnd.c

390

return (DL_GETPSIZE(pi.part));

sys/isofs/cd9660/cd9660_node.c

334

cd9660_tstamp_conv7(u_char *pi, struct timespec *pu)

sys/isofs/cd9660/cd9660_node.c

340

y = pi[0] + 1900;

sys/isofs/cd9660/cd9660_node.c

341

m = pi[1];

sys/isofs/cd9660/cd9660_node.c

342

d = pi[2];

sys/isofs/cd9660/cd9660_node.c

343

hour = pi[3];

sys/isofs/cd9660/cd9660_node.c

344

minute = pi[4];

sys/isofs/cd9660/cd9660_node.c

345

second = pi[5];

sys/isofs/cd9660/cd9660_node.c

346

tz = (signed char) pi[6];

sys/isofs/cd9660/cd9660_node.c

388

cd9660_tstamp_conv17(u_char *pi, struct timespec *pu)

sys/isofs/cd9660/cd9660_node.c

393

buf[0] = cd9660_chars2ui(pi,4) - 1900;

sys/isofs/cd9660/cd9660_node.c

396

buf[1] = cd9660_chars2ui(pi + 4,2);

sys/isofs/cd9660/cd9660_node.c

399

buf[2] = cd9660_chars2ui(pi + 6,2);

sys/isofs/cd9660/cd9660_node.c

402

buf[3] = cd9660_chars2ui(pi + 8,2);

sys/isofs/cd9660/cd9660_node.c

405

buf[4] = cd9660_chars2ui(pi + 10,2);

sys/isofs/cd9660/cd9660_node.c

408

buf[5] = cd9660_chars2ui(pi + 12,2);

sys/isofs/cd9660/cd9660_node.c

411

buf[6] = pi[16];

sys/kern/dma_alloc.c

65

int pi = dma_alloc_index(size);

sys/kern/dma_alloc.c

67

if (pi == -1)

sys/kern/dma_alloc.c

69

return pool_get(&dmapools[pi], prflags);

sys/kern/dma_alloc.c

76

int pi = dma_alloc_index(size);

sys/kern/dma_alloc.c

78

if (pi == -1)

sys/kern/dma_alloc.c

80

pool_put(&dmapools[pi], m);

sys/kern/subr_pool.c

1004

if (poison_check(pi + 1, pp->pr_size - sizeof(*pi),

sys/kern/subr_pool.c

1006

int *ip = (int *)(pi + 1);

sys/kern/subr_pool.c

1009

__func__, pp->pr_wchan, ph->ph_page, pi,

sys/kern/subr_pool.c

1198

struct pool_item *pi;

sys/kern/subr_pool.c

1203

XSIMPLEQ_FOREACH(pi, &ph->ph_items, pi_list) {

sys/kern/subr_pool.c

1204

if (pi->pi_magic != POOL_IMAGIC(ph, pi)) {

sys/kern/subr_pool.c

1206

pi, pi->pi_magic);

sys/kern/subr_pool.c

1337

struct pool_item *pi;

sys/kern/subr_pool.c

1351

for (pi = XSIMPLEQ_FIRST(&ph->ph_items), n = 0;

sys/kern/subr_pool.c

1352

pi != NULL;

sys/kern/subr_pool.c

1353

pi = XSIMPLEQ_NEXT(&ph->ph_items, pi, pi_list), n++) {

sys/kern/subr_pool.c

1354

if ((caddr_t)pi < ph->ph_page ||

sys/kern/subr_pool.c

1355

(caddr_t)pi >= ph->ph_page + pp->pr_pgsize) {

sys/kern/subr_pool.c

1359

pp->pr_wchan, ph->ph_page, n, pi);

sys/kern/subr_pool.c

1363

if (pi->pi_magic != POOL_IMAGIC(ph, pi)) {

sys/kern/subr_pool.c

1368

pp, pp->pr_wchan, ph->ph_page, n, pi, page,

sys/kern/subr_pool.c

1369

0, pi->pi_magic);

sys/kern/subr_pool.c

137

#define POOL_IMAGIC(ph, pi) ((u_long)(pi) ^ (ph)->ph_magic)

sys/kern/subr_pool.c

1376

if (poison_check(pi + 1, pp->pr_size - sizeof(*pi),

sys/kern/subr_pool.c

1378

int *ip = (int *)(pi + 1);

sys/kern/subr_pool.c

1382

pp->pr_wchan, ph->ph_page, n, pi,

sys/kern/subr_pool.c

1430

struct pool_item *pi;

sys/kern/subr_pool.c

1449

XSIMPLEQ_FOREACH(pi, &ph->ph_items, pi_list) {

sys/kern/subr_pool.c

1450

if (cp == (caddr_t)pi)

sys/kern/subr_pool.c

1453

if (cp != (caddr_t)pi) {

sys/kern/subr_pool.c

1474

struct kinfo_pool pi;

sys/kern/subr_pool.c

1513

memset(&pi, 0, sizeof(pi));

sys/kern/subr_pool.c

1516

pi.pr_size = pp->pr_size;

sys/kern/subr_pool.c

1517

pi.pr_pgsize = pp->pr_pgsize;

sys/kern/subr_pool.c

1518

pi.pr_itemsperpage = pp->pr_itemsperpage;

sys/kern/subr_pool.c

1519

pi.pr_npages = pp->pr_npages;

sys/kern/subr_pool.c

1520

pi.pr_minpages = pp->pr_minpages;

sys/kern/subr_pool.c

1521

pi.pr_maxpages = pp->pr_maxpages;

sys/kern/subr_pool.c

1522

pi.pr_hardlimit = pp->pr_hardlimit;

sys/kern/subr_pool.c

1523

pi.pr_nout = pp->pr_nout;

sys/kern/subr_pool.c

1524

pi.pr_nitems = pp->pr_nitems;

sys/kern/subr_pool.c

1525

pi.pr_nget = pp->pr_nget;

sys/kern/subr_pool.c

1526

pi.pr_nput = pp->pr_nput;

sys/kern/subr_pool.c

1527

pi.pr_nfail = pp->pr_nfail;

sys/kern/subr_pool.c

1528

pi.pr_npagealloc = pp->pr_npagealloc;

sys/kern/subr_pool.c

1529

pi.pr_npagefree = pp->pr_npagefree;

sys/kern/subr_pool.c

1530

pi.pr_hiwat = pp->pr_hiwat;

sys/kern/subr_pool.c

1531

pi.pr_nidle = pp->pr_nidle;

sys/kern/subr_pool.c

1534

pool_cache_pool_info(pp, &pi);

sys/kern/subr_pool.c

1536

rv = sysctl_rdstruct(oldp, oldlenp, NULL, &pi, sizeof(pi));

sys/kern/subr_pool.c

2061

pool_cache_pool_info(struct pool *pp, struct kinfo_pool *pi)

sys/kern/subr_pool.c

2083

pi->pr_nget += nget;

sys/kern/subr_pool.c

2084

pi->pr_nput += nput;

sys/kern/subr_pool.c

2090

pi->pr_nout += pc->pc_nout;

sys/kern/subr_pool.c

2092

pi->pr_nout += pp->pr_cache_nout;

sys/kern/subr_pool.c

2178

pool_cache_pool_info(struct pool *pp, struct kinfo_pool *pi)

sys/kern/subr_pool.c

698

struct pool_item *pi;

sys/kern/subr_pool.c

725

pi = XSIMPLEQ_FIRST(&ph->ph_items);

sys/kern/subr_pool.c

726

if (__predict_false(pi == NULL))

sys/kern/subr_pool.c

729

if (__predict_false(pi->pi_magic != POOL_IMAGIC(ph, pi))) {

sys/kern/subr_pool.c

732

__func__, pp->pr_wchan, ph->ph_page, pi,

sys/kern/subr_pool.c

733

0, pi->pi_magic, POOL_IMAGIC(ph, pi));

sys/kern/subr_pool.c

742

if (poison_check(pi + 1, pp->pr_size - sizeof(*pi),

sys/kern/subr_pool.c

744

int *ip = (int *)(pi + 1);

sys/kern/subr_pool.c

747

__func__, pp->pr_wchan, ph->ph_page, pi,

sys/kern/subr_pool.c

748

(pidx * sizeof(int)) + sizeof(*pi), ip[pidx]);

sys/kern/subr_pool.c

776

return (pi);

sys/kern/subr_pool.c

837

struct pool_item *pi = v;

sys/kern/subr_pool.c

848

if (pi == qi) {

sys/kern/subr_pool.c

850

pp->pr_wchan, pi);

sys/kern/subr_pool.c

856

pi->pi_magic = POOL_IMAGIC(ph, pi);

sys/kern/subr_pool.c

857

XSIMPLEQ_INSERT_HEAD(&ph->ph_items, pi, pi_list);

sys/kern/subr_pool.c

860

poison_mem(pi + 1, pp->pr_size - sizeof(*pi));

sys/kern/subr_pool.c

921

struct pool_item *pi;

sys/kern/subr_pool.c

928

KASSERT(pp->pr_size >= sizeof(*pi));

sys/kern/subr_pool.c

961

pi = (struct pool_item *)addr;

sys/kern/subr_pool.c

962

pi->pi_magic = POOL_IMAGIC(ph, pi);

sys/kern/subr_pool.c

969

XSIMPLEQ_INSERT_TAIL(&ph->ph_items, pi, pi_list);

sys/kern/subr_pool.c

971

XSIMPLEQ_INSERT_HEAD(&ph->ph_items, pi, pi_list);

sys/kern/subr_pool.c

975

poison_mem(pi + 1, pp->pr_size - sizeof(*pi));

sys/kern/subr_pool.c

987

struct pool_item *pi;

sys/kern/subr_pool.c

992

XSIMPLEQ_FOREACH(pi, &ph->ph_items, pi_list) {

sys/kern/subr_pool.c

993

if (__predict_false(pi->pi_magic != POOL_IMAGIC(ph, pi))) {

sys/kern/subr_pool.c

996

__func__, pp->pr_wchan, ph->ph_page, pi,

sys/kern/subr_pool.c

997

0, pi->pi_magic);

sys/kern/subr_witness.c

1545

int pi, ci, i, j;

sys/kern/subr_witness.c

1561

pi = parent->w_index;

sys/kern/subr_witness.c

1563

WITNESS_INDEX_ASSERT(pi);

sys/kern/subr_witness.c

1565

KASSERT(pi != ci);

sys/kern/subr_witness.c

1566

w_rmatrix[pi][ci] |= WITNESS_PARENT;

sys/kern/subr_witness.c

1567

w_rmatrix[ci][pi] |= WITNESS_CHILD;

sys/kern/subr_witness.c

1573

if ((w_rmatrix[pi][ci] & WITNESS_ANCESTOR) == 0) {

sys/kern/subr_witness.c

1583

if ((w_rmatrix[i][pi] & WITNESS_ANCESTOR_MASK) == 0 &&

sys/kern/subr_witness.c

1584

(i != pi))

sys/kern/uipc_mbuf.c

355

int pi;

sys/kern/uipc_mbuf.c

357

for (pi = 0; pi < nitems(mclpools); pi++) {

sys/kern/uipc_mbuf.c

358

pp = &mclpools[pi];

sys/net/if_aggr.c

1799

struct lacp_port_info *pi = &p->p_partner;

sys/net/if_aggr.c

1801

pi->lacp_sysid.lacp_sysid_priority = htons(0);

sys/net/if_aggr.c

1802

memset(pi->lacp_sysid.lacp_sysid_mac, 0,

sys/net/if_aggr.c

1803

sizeof(pi->lacp_sysid.lacp_sysid_mac));

sys/net/if_aggr.c

1805

pi->lacp_key = htons(0);

sys/net/if_aggr.c

1807

pi->lacp_portid.lacp_portid_priority = htons(0);

sys/net/if_aggr.c

1808

pi->lacp_portid.lacp_portid_number = htons(0);

sys/net/if_aggr.c

1812

pi->lacp_state = LACP_STATE_AGGREGATION | LACP_STATE_SYNC;

sys/net/if_aggr.c

1814

SET(pi->lacp_state, LACP_STATE_TIMEOUT);

sys/net/if_aggr.c

1816

SET(pi->lacp_state, LACP_STATE_ACTIVITY);

sys/net/if_aggr.c

1826

const struct lacp_port_info *pi = &p->p_partner;

sys/net/if_aggr.c

1828

if ((pi->lacp_portid.lacp_portid_number == htons(0)) &&

sys/net/if_aggr.c

1829

(pi->lacp_portid.lacp_portid_priority == htons(0)) &&

sys/net/if_aggr.c

1830

ETHER_IS_ANYADDR(pi->lacp_sysid.lacp_sysid_mac) &&

sys/net/if_aggr.c

1831

(pi->lacp_sysid.lacp_sysid_priority == htons(0)) &&

sys/net/if_aggr.c

1832

(pi->lacp_key == htons(0)) &&

sys/net/if_aggr.c

1833

ISSET(pi->lacp_state, LACP_STATE_AGGREGATION))

sys/net/if_aggr.c

1847

const struct lacp_port_info *pi = &lacpdu->lacp_partner_info;

sys/net/if_aggr.c

1853

if (pi->lacp_portid.lacp_portid_number != htons(ifp0->if_index))

sys/net/if_aggr.c

1855

if (pi->lacp_portid.lacp_portid_priority !=

sys/net/if_aggr.c

1858

if (!ETHER_IS_EQ(pi->lacp_sysid.lacp_sysid_mac, ac->ac_enaddr))

sys/net/if_aggr.c

1860

if (pi->lacp_sysid.lacp_sysid_priority !=

sys/net/if_aggr.c

1863

if (pi->lacp_key != htons(ifp->if_index))

sys/net/if_aggr.c

1865

if (ISSET(pi->lacp_state, LACP_STATE_SYNC) !=

sys/net/if_aggr.c

1875

if (ISSET(pi->lacp_state, bits) != ISSET(state, bits))

sys/net/if_aggr.c

2051

const struct lacp_port_info *pi;

sys/net/if_aggr.c

2063

pi = &p->p_partner;

sys/net/if_aggr.c

2064

if (pi->lacp_key == htons(0)) {

sys/net/if_aggr.c

2074

if (!ISSET(pi->lacp_state, LACP_STATE_AGGREGATION)) {

sys/net/if_aggr.c

2087

mac = pi->lacp_sysid.lacp_sysid_mac;

sys/net/if_aggr.c

2089

pi->lacp_key == htons(ifp->if_index)) {

sys/net/if_aggr.c

2099

sc->sc_partner_key != pi->lacp_key) {

sys/net/if_aggr.c

2208

const struct lacp_port_info *pi = &p->p_partner;

sys/net/if_aggr.c

2216

sc->sc_partner_system = pi->lacp_sysid;

sys/net/if_aggr.c

2217

sc->sc_partner_key = pi->lacp_key;

sys/net/if_aggr.c

2868

struct lacp_port_info *pi;

sys/net/if_aggr.c

2904

pi = &lacpdu->lacp_actor_info;

sys/net/if_aggr.c

2906

LACP_T_ACTOR, sizeof(*pi));

sys/net/if_aggr.c

2908

pi->lacp_sysid.lacp_sysid_priority = htons(sc->sc_lacp_prio);

sys/net/if_aggr.c

2909

CTASSERT(sizeof(pi->lacp_sysid.lacp_sysid_mac) ==

sys/net/if_aggr.c

2911

memcpy(pi->lacp_sysid.lacp_sysid_mac, ac->ac_enaddr,

sys/net/if_aggr.c

2912

sizeof(pi->lacp_sysid.lacp_sysid_mac));

sys/net/if_aggr.c

2914

pi->lacp_key = htons(ifp->if_index);

sys/net/if_aggr.c

2916

pi->lacp_portid.lacp_portid_priority = htons(sc->sc_lacp_port_prio);

sys/net/if_aggr.c

2917

pi->lacp_portid.lacp_portid_number = htons(ifp0->if_index);

sys/net/if_aggr.c

2919

pi->lacp_state = p->p_actor_state;

sys/net/if_aggr.c

2921

SET(pi->lacp_state, LACP_STATE_ACTIVITY);

sys/net/if_aggr.c

2923

SET(pi->lacp_state, LACP_STATE_TIMEOUT);

sys/net/if_aggr.c

2925

pi = &lacpdu->lacp_partner_info;

sys/net/if_aggr.c

2927

LACP_T_PARTNER, sizeof(*pi));

sys/net/if_aggr.c

2929

*pi = p->p_partner;

sys/net/pf_ioctl.c

2917

struct pfioc_iface *pi = (struct pfioc_iface *)addr;

sys/net/pf_ioctl.c

2921

if (pi->pfiio_name[0] == 0) {

sys/net/pf_ioctl.c

2927

strlcpy(pf_trans_set.statusif, pi->pfiio_name, IFNAMSIZ);

sys/net/pf_ioctl.c

2935

struct pfioc_iface *pi = (struct pfioc_iface *)addr;

sys/net/pf_ioctl.c

2940

if (pi->pfiio_name[0]) {

sys/net/pf_ioctl.c

2941

pfi_update_status(pi->pfiio_name, NULL);

sys/netinet6/in6_src.c

100

struct in6_pktinfo *pi = NULL;

sys/netinet6/in6_src.c

109

if (opts && (pi = opts->ip6po_pktinfo) &&

sys/netinet6/in6_src.c

110

!IN6_IS_ADDR_UNSPECIFIED(&pi->ipi6_addr)) {

sys/netinet6/in6_src.c

122

sa6.sin6_addr = pi->ipi6_addr;

sys/netinet6/in6_src.c

133

pi->ipi6_addr = sa6.sin6_addr; /* XXX: this overrides pi */

sys/netinet6/in6_src.c

135

*in6src = &pi->ipi6_addr;

sys/netinet6/in6_src.c

153

if (pi && pi->ipi6_ifindex) {

sys/netinet6/in6_src.c

154

ifp = if_get(pi->ipi6_ifindex);

sys/netinet6/in6_src.c

328

struct in6_pktinfo *pi = NULL;

sys/netinet6/in6_src.c

331

if (opts && (pi = opts->ip6po_pktinfo) != NULL && pi->ipi6_ifindex) {

sys/netinet6/in6_src.c

332

*retifp = if_get(pi->ipi6_ifindex);

sys/netinet6/in6_src.c

412

struct in6_pktinfo *pi;

sys/netinet6/in6_src.c

418

if (outputopts6 && (pi = outputopts6->ip6po_pktinfo) &&

sys/netinet6/in6_src.c

419

pi->ipi6_ifindex)

sys/netinet6/in6_src.c

420

scopeid = pi->ipi6_ifindex;

sys/netinet6/ip6_output.c

444

struct in6_pktinfo *pi = NULL;

sys/netinet6/ip6_output.c

450

if (opt != NULL && (pi = opt->ip6po_pktinfo) != NULL)

sys/netinet6/ip6_output.c

451

ifp = if_get(pi->ipi6_ifindex);

sys/ntfs/ntfs_vfsops.c

346

int pi[3] = { NTFS_MFTINO, NTFS_ROOTINO, NTFS_BITMAPINO };

sys/ntfs/ntfs_vfsops.c

348

error = VFS_VGET(mp, pi[i], &(ntmp->ntm_sysvn[pi[i]]));

sys/ntfs/ntfs_vfsops.c

351

ntmp->ntm_sysvn[pi[i]]->v_flag |= VSYSTEM;

sys/ntfs/ntfs_vfsops.c

352

vref(ntmp->ntm_sysvn[pi[i]]);

sys/ntfs/ntfs_vfsops.c

353

vput(ntmp->ntm_sysvn[pi[i]]);

sys/uvm/uvm_vnode.c

141

struct partinfo pi;

sys/uvm/uvm_vnode.c

159

DIOCGPART, (caddr_t)&pi, FREAD, curproc);

sys/uvm/uvm_vnode.c

162

used_vnode_size = (u_quad_t)pi.disklab->d_secsize *

sys/uvm/uvm_vnode.c

163

(u_quad_t)DL_GETPSIZE(pi.part);

usr.bin/ctfconv/pool.c

58

struct pool_item *pi;

usr.bin/ctfconv/pool.c

66

pi = (struct pool_item *)p;

usr.bin/ctfconv/pool.c

67

SLIST_INSERT_HEAD(&pp->pr_free, pi, pi_list);

usr.bin/ctfconv/pool.c

74

pi = SLIST_FIRST(&pp->pr_free);

usr.bin/ctfconv/pool.c

78

return pi;

usr.bin/ctfconv/pool.c

84

struct pool_item *pi = (struct pool_item *)p;

usr.bin/ctfconv/pool.c

86

if (pi == NULL)

usr.bin/ctfconv/pool.c

91

SLIST_INSERT_HEAD(&pp->pr_free, pi, pi_list);

usr.bin/mg/cmode.c

163

int pi, mi; /* Previous indents (mi is ignored) */

usr.bin/mg/cmode.c

182

pi = getindent(lp, &mi);

usr.bin/mg/cmode.c

189

if (pi + ci < 0)

usr.bin/mg/cmode.c

192

ret = indent(FFOTHARG, pi + ci);

usr.bin/sndioctl/sndioctl.c

887

struct info *i, **pi;

usr.bin/sndioctl/sndioctl.c

896

for (pi = &infolist; (i = *pi) != NULL; pi = &i->next) {

usr.bin/sndioctl/sndioctl.c

900

*pi = i->next;

usr.bin/sndioctl/sndioctl.c

920

for (pi = &infolist; (i = *pi) != NULL; pi = &i->next) {

usr.bin/sndioctl/sndioctl.c

934

i->next = *pi;

usr.bin/sndioctl/sndioctl.c

935

*pi = i;

usr.bin/tmux/arguments.c

58

struct cmd_parse_input pi;

usr.bin/tmux/arguments.c

796

state->pi.item = item;

usr.bin/tmux/arguments.c

797

cmd_get_source(self, &file, &state->pi.line);

usr.bin/tmux/arguments.c

799

state->pi.file = xstrdup(file);

usr.bin/tmux/arguments.c

800

state->pi.c = tc;

usr.bin/tmux/arguments.c

801

if (state->pi.c != NULL)

usr.bin/tmux/arguments.c

802

state->pi.c->references++;

usr.bin/tmux/arguments.c

803

cmd_find_copy_state(&state->pi.fs, target);

usr.bin/tmux/arguments.c

834

pr = cmd_parse_from_string(cmd, &state->pi);

usr.bin/tmux/arguments.c

852

if (state->pi.c != NULL)

usr.bin/tmux/arguments.c

853

server_client_unref(state->pi.c);

usr.bin/tmux/arguments.c

854

free((void *)state->pi.file);

usr.bin/tmux/cfg.c

101

struct cmd_parse_input pi;

usr.bin/tmux/cfg.c

117

memset(&pi, 0, sizeof pi);

usr.bin/tmux/cfg.c

118

pi.flags = flags;

usr.bin/tmux/cfg.c

119

pi.file = path;

usr.bin/tmux/cfg.c

120

pi.line = 1;

usr.bin/tmux/cfg.c

121

pi.item = item;

usr.bin/tmux/cfg.c

122

pi.c = c;

usr.bin/tmux/cfg.c

124

pr = cmd_parse_from_file(f, &pi);

usr.bin/tmux/cfg.c

140

cmdq_add_format(state, "current_file", "%s", pi.file);

usr.bin/tmux/cfg.c

160

struct cmd_parse_input pi;

usr.bin/tmux/cfg.c

170

memset(&pi, 0, sizeof pi);

usr.bin/tmux/cfg.c

171

pi.flags = flags;

usr.bin/tmux/cfg.c

172

pi.file = path;

usr.bin/tmux/cfg.c

173

pi.line = 1;

usr.bin/tmux/cfg.c

174

pi.item = item;

usr.bin/tmux/cfg.c

175

pi.c = c;

usr.bin/tmux/cfg.c

177

pr = cmd_parse_from_buffer(buf, len, &pi);

usr.bin/tmux/cfg.c

192

cmdq_add_format(state, "current_file", "%s", pi.file);

usr.bin/tmux/cmd-parse.y

1004

pr = cmd_parse_from_string(s, pi);

usr.bin/tmux/cmd-parse.y

1022

cmd_parse_from_buffer(const void *buf, size_t len, struct cmd_parse_input *pi)

usr.bin/tmux/cmd-parse.y

1029

if (pi == NULL) {

usr.bin/tmux/cmd-parse.y

1031

pi = &input;

usr.bin/tmux/cmd-parse.y

1041

cmds = cmd_parse_do_buffer(buf, len, pi, &cause);

usr.bin/tmux/cmd-parse.y

1047

cmd_parse_build_commands(cmds, pi, &pr);

usr.bin/tmux/cmd-parse.y

1054

struct cmd_parse_input *pi)

usr.bin/tmux/cmd-parse.y

1071

if (pi == NULL) {

usr.bin/tmux/cmd-parse.y

1073

pi = &input;

usr.bin/tmux/cmd-parse.y

1080

cmd->line = pi->line;

usr.bin/tmux/cmd-parse.y

1113

cmd->line = pi->line;

usr.bin/tmux/cmd-parse.y

1122

cmd_parse_build_commands(cmds, pi, &pr);

usr.bin/tmux/cmd-parse.y

1131

struct cmd_parse_input *pi = ps->input;

usr.bin/tmux/cmd-parse.y

1142

ps->error = cmd_parse_get_error(pi->file, pi->line, error);

usr.bin/tmux/cmd-parse.y

198

struct cmd_parse_input *pi = ps->input;

usr.bin/tmux/cmd-parse.y

200

struct client *c = pi->c;

usr.bin/tmux/cmd-parse.y

205

if (cmd_find_valid_state(&pi->fs))

usr.bin/tmux/cmd-parse.y

206

fsp = &pi->fs;

usr.bin/tmux/cmd-parse.y

211

ft = format_create(NULL, pi->item, FORMAT_NONE, flags);

usr.bin/tmux/cmd-parse.y

603

cmd_parse_print_commands(struct cmd_parse_input *pi, struct cmd_list *cmdlist)

usr.bin/tmux/cmd-parse.y

607

if (pi->item == NULL || (~pi->flags & CMD_PARSE_VERBOSE))

usr.bin/tmux/cmd-parse.y

610

if (pi->file != NULL)

usr.bin/tmux/cmd-parse.y

611

cmdq_print(pi->item, "%s:%u: %s", pi->file, pi->line, s);

usr.bin/tmux/cmd-parse.y

613

cmdq_print(pi->item, "%u: %s", pi->line, s);

usr.bin/tmux/cmd-parse.y

700

cmd_parse_do_file(FILE *f, struct cmd_parse_input *pi, char **cause)

usr.bin/tmux/cmd-parse.y

705

ps->input = pi;

usr.bin/tmux/cmd-parse.y

711

cmd_parse_do_buffer(const char *buf, size_t len, struct cmd_parse_input *pi,

usr.bin/tmux/cmd-parse.y

717

ps->input = pi;

usr.bin/tmux/cmd-parse.y

759

struct cmd_parse_input *pi, struct cmd_parse_result *pr)

usr.bin/tmux/cmd-parse.y

766

if (pi->flags & CMD_PARSE_NOALIAS)

usr.bin/tmux/cmd-parse.y

781

log_debug("%s: %u alias %s = %s", __func__, pi->line, name, alias);

usr.bin/tmux/cmd-parse.y

783

cmds = cmd_parse_do_buffer(alias, strlen(alias), pi, &cause);

usr.bin/tmux/cmd-parse.y

804

pi->flags |= CMD_PARSE_NOALIAS;

usr.bin/tmux/cmd-parse.y

805

cmd_parse_build_commands(cmds, pi, pr);

usr.bin/tmux/cmd-parse.y

806

pi->flags &= ~CMD_PARSE_NOALIAS;

usr.bin/tmux/cmd-parse.y

812

struct cmd_parse_input *pi, struct cmd_parse_result *pr)

usr.bin/tmux/cmd-parse.y

822

if (cmd_parse_expand_alias(cmd, pi, pr))

usr.bin/tmux/cmd-parse.y

834

cmd_parse_build_commands(arg->commands, pi, pr);

usr.bin/tmux/cmd-parse.y

849

add = cmd_parse(values, count, pi->file, pi->line, pi->flags, &cause);

usr.bin/tmux/cmd-parse.y

852

pr->error = cmd_parse_get_error(pi->file, pi->line, cause);

usr.bin/tmux/cmd-parse.y

868

struct cmd_parse_input *pi, struct cmd_parse_result *pr)

usr.bin/tmux/cmd-parse.y

893

if (((~pi->flags & CMD_PARSE_ONEGROUP) && cmd->line != line)) {

usr.bin/tmux/cmd-parse.y

895

cmd_parse_print_commands(pi, current);

usr.bin/tmux/cmd-parse.y

903

line = pi->line = cmd->line;

usr.bin/tmux/cmd-parse.y

905

cmd_parse_build_command(cmd, pi, pr);

usr.bin/tmux/cmd-parse.y

915

cmd_parse_print_commands(pi, current);

usr.bin/tmux/cmd-parse.y

929

cmd_parse_from_file(FILE *f, struct cmd_parse_input *pi)

usr.bin/tmux/cmd-parse.y

936

if (pi == NULL) {

usr.bin/tmux/cmd-parse.y

938

pi = &input;

usr.bin/tmux/cmd-parse.y

942

cmds = cmd_parse_do_file(f, pi, &cause);

usr.bin/tmux/cmd-parse.y

948

cmd_parse_build_commands(cmds, pi, &pr);

usr.bin/tmux/cmd-parse.y

955

cmd_parse_from_string(const char *s, struct cmd_parse_input *pi)

usr.bin/tmux/cmd-parse.y

959

if (pi == NULL) {

usr.bin/tmux/cmd-parse.y

961

pi = &input;

usr.bin/tmux/cmd-parse.y

969

pi->flags |= CMD_PARSE_ONEGROUP;

usr.bin/tmux/cmd-parse.y

970

return (cmd_parse_from_buffer(s, strlen(s), pi));

usr.bin/tmux/cmd-parse.y

974

cmd_parse_and_insert(const char *s, struct cmd_parse_input *pi,

usr.bin/tmux/cmd-parse.y

980

pr = cmd_parse_from_string(s, pi);

usr.bin/tmux/cmd-parse.y

998

cmd_parse_and_append(const char *s, struct cmd_parse_input *pi,

usr.bin/vmstat/vmstat.c

1020

struct kinfo_pool pi;

usr.bin/vmstat/vmstat.c

1044

memset(&pi, 0, sizeof(pi));

usr.bin/vmstat/vmstat.c

1045

pi.pr_size = pp->pr_size;

usr.bin/vmstat/vmstat.c

1046

pi.pr_pgsize = pp->pr_pgsize;

usr.bin/vmstat/vmstat.c

1047

pi.pr_itemsperpage = pp->pr_itemsperpage;

usr.bin/vmstat/vmstat.c

1048

pi.pr_npages = pp->pr_npages;

usr.bin/vmstat/vmstat.c

1049

pi.pr_minpages = pp->pr_minpages;

usr.bin/vmstat/vmstat.c

1050

pi.pr_maxpages = pp->pr_maxpages;

usr.bin/vmstat/vmstat.c

1051

pi.pr_hardlimit = pp->pr_hardlimit;

usr.bin/vmstat/vmstat.c

1052

pi.pr_nout = pp->pr_nout;

usr.bin/vmstat/vmstat.c

1053

pi.pr_nitems = pp->pr_nitems;

usr.bin/vmstat/vmstat.c

1054

pi.pr_nget = pp->pr_nget;

usr.bin/vmstat/vmstat.c

1055

pi.pr_nput = pp->pr_nput;

usr.bin/vmstat/vmstat.c

1056

pi.pr_nfail = pp->pr_nfail;

usr.bin/vmstat/vmstat.c

1057

pi.pr_npagealloc = pp->pr_npagealloc;

usr.bin/vmstat/vmstat.c

1058

pi.pr_npagefree = pp->pr_npagefree;

usr.bin/vmstat/vmstat.c

1059

pi.pr_hiwat = pp->pr_hiwat;

usr.bin/vmstat/vmstat.c

1060

pi.pr_nidle = pp->pr_nidle;

usr.bin/vmstat/vmstat.c

1062

print_pool(&pi, name);

usr.bin/vmstat/vmstat.c

1064

inuse += (pi.pr_nget - pi.pr_nput) * pi.pr_size;

usr.bin/vmstat/vmstat.c

1065

total += pi.pr_npages * pi.pr_pgsize;

usr.sbin/config/ukcutil.c

176

struct pdevinit *pi;

usr.sbin/config/ukcutil.c

189

pi = get_pdevinit(devno - totdev -1);

usr.sbin/config/ukcutil.c

192

abs(pi->pdev_count));

usr.sbin/config/ukcutil.c

193

if (pi->pdev_count < 0)

usr.sbin/config/ukcutil.c

389

struct pdevinit *pi;

usr.sbin/config/ukcutil.c

471

pi = get_pdevinit(devno-totdev-1);

usr.sbin/config/ukcutil.c

472

modify("count", &pi->pdev_count);

usr.sbin/config/ukcutil.c

490

struct pdevinit *pi;

usr.sbin/config/ukcutil.c

582

pi = get_pdevinit(devno-totdev-1);

usr.sbin/config/ukcutil.c

585

pi->pdev_count = atoi(str);

usr.sbin/config/ukcutil.c

608

struct pdevinit *pi;

usr.sbin/config/ukcutil.c

649

pi = get_pdevinit(devno-totdev-1);

usr.sbin/config/ukcutil.c

653

if (pi->pdev_count < 1) {

usr.sbin/config/ukcutil.c

657

pi->pdev_count*=-1;

usr.sbin/config/ukcutil.c

672

struct pdevinit *pi;

usr.sbin/config/ukcutil.c

712

pi = get_pdevinit(devno-totdev-1);

usr.sbin/config/ukcutil.c

716

if (pi->pdev_count > 0) {

usr.sbin/config/ukcutil.c

720

pi->pdev_count*=-1;

usr.sbin/npppd/common/recvfromto.c

101

memcpy(&sin6->sin6_addr, &pi->ipi6_addr,

usr.sbin/npppd/common/recvfromto.c

105

sin6->sin6_scope_id = pi->ipi6_ifindex;

usr.sbin/npppd/common/recvfromto.c

128

struct in_pktinfo *pi = (struct in_pktinfo *)(CMSG_DATA(cm));

usr.sbin/npppd/common/recvfromto.c

133

memcpy(&sin4->sin_addr, &pi->ipi_addr,

usr.sbin/npppd/common/recvfromto.c

56

struct in6_pktinfo *pi;

usr.sbin/npppd/common/recvfromto.c

93

pi = (struct in6_pktinfo *)(CMSG_DATA(cm));

usr.sbin/rad/frontend.c

1426

struct in6_pktinfo *pi;

usr.sbin/rad/frontend.c

1446

pi = (struct in6_pktinfo *)CMSG_DATA(cm);

usr.sbin/rad/frontend.c

1447

memset(&pi->ipi6_addr, 0, sizeof(pi->ipi6_addr));

usr.sbin/rad/frontend.c

1448

pi->ipi6_ifindex = ra_iface->if_index;

usr.sbin/rad/frontend.c

623

struct in6_pktinfo *pi = NULL;

usr.sbin/rad/frontend.c

649

pi = (struct in6_pktinfo *)(CMSG_DATA(cm));

usr.sbin/rad/frontend.c

650

if_index = pi->ipi6_ifindex;

usr.sbin/route6d/route6d.c

1017

if (pi == NULL || hlimp == NULL) {

usr.sbin/route6d/route6d.c

1059

if (IN6_IS_ADDR_MULTICAST(&pi->ipi6_addr) && *hlimp != 255) {

usr.sbin/route6d/route6d.c

1077

if (!IN6_IS_ADDR_LINKLOCAL(&pi->ipi6_addr) && *hlimp != 255) {

usr.sbin/route6d/route6d.c

1081

inet6_n2p(&fsock.sin6_addr), inet6_n2p(&pi->ipi6_addr),

usr.sbin/route6d/route6d.c

890

struct in6_pktinfo *pi;

usr.sbin/route6d/route6d.c

924

pi = (struct in6_pktinfo *)CMSG_DATA(cm);

usr.sbin/route6d/route6d.c

925

memset(&pi->ipi6_addr, 0, sizeof(pi->ipi6_addr)); /*::*/

usr.sbin/route6d/route6d.c

926

pi->ipi6_ifindex = idx;

usr.sbin/route6d/route6d.c

962

struct in6_pktinfo *pi = NULL;

usr.sbin/route6d/route6d.c

991

if (cm->cmsg_len != CMSG_LEN(sizeof(*pi))) {

usr.sbin/route6d/route6d.c

996

pi = (struct in6_pktinfo *)(CMSG_DATA(cm));

usr.sbin/route6d/route6d.c

997

idx = pi->ipi6_ifindex;

usr.sbin/rpki-client/main.c

381

int pi[2];

usr.sbin/rpki-client/main.c

383

if (pipe2(pi, O_CLOEXEC | O_NONBLOCK) == -1)

usr.sbin/rpki-client/main.c

389

ibuf_fd_set(b, pi[0]);

usr.sbin/rpki-client/main.c

392

http_fetch(id, uri, last_mod, pi[1]);

usr.sbin/smtpd/lka_filter.c

184

struct processor_instance *pi;

usr.sbin/smtpd/lka_filter.c

187

while (dict_iter(&processors, &iter, NULL, (void **)&pi))

usr.sbin/smtpd/lka_filter.c

188

if (!pi->ready)

usr.sbin/smtpd/lka_filter.c

194

lka_proc_config(struct processor_instance *pi)

usr.sbin/smtpd/lka_filter.c

196

io_printf(pi->io, "config|smtpd-version|%s\n", SMTPD_VERSION);

usr.sbin/smtpd/lka_filter.c

197

io_printf(pi->io, "config|protocol|%s\n", PROTOCOL_VERSION);

usr.sbin/smtpd/lka_filter.c

198

io_printf(pi->io, "config|smtp-session-timeout|%d\n", SMTPD_SESSION_TIMEOUT);

usr.sbin/smtpd/lka_filter.c

199

if (pi->subsystems & FILTER_SUBSYSTEM_SMTP_IN)

usr.sbin/smtpd/lka_filter.c

200

io_printf(pi->io, "config|subsystem|smtp-in\n");

usr.sbin/smtpd/lka_filter.c

201

if (pi->subsystems & FILTER_SUBSYSTEM_SMTP_OUT)

usr.sbin/smtpd/lka_filter.c

202

io_printf(pi->io, "config|subsystem|smtp-out\n");

usr.sbin/smtpd/lka_filter.c

203

io_printf(pi->io, "config|admd|%s\n",

usr.sbin/smtpd/lka_filter.c

205

io_printf(pi->io, "config|ready\n");

usr.sbin/tcpdump/addrtoname.c

415

lookup_protoid(const u_char *pi)

usr.sbin/tcpdump/addrtoname.c

421

i = (((pi[0] << 8) + pi[1]) << 8) + pi[2];

usr.sbin/tcpdump/addrtoname.c

422

j = (pi[3] << 8) + pi[4];

usr.sbin/tcpdump/addrtoname.c

521

protoid_string(const u_char *pi)

usr.sbin/tcpdump/addrtoname.c

528

tp = lookup_protoid(pi);

usr.sbin/tcpdump/addrtoname.c

533

if ((j = *pi >> 4) != 0)

usr.sbin/tcpdump/addrtoname.c

535

*cp++ = hex[*pi++ & 0xf];

usr.sbin/tcpdump/addrtoname.c

538

if ((j = *pi >> 4) != 0)

usr.sbin/tcpdump/addrtoname.c

540

*cp++ = hex[*pi++ & 0xf];

usr.sbin/unbound/services/listen_dnsport.c

5136

struct ngtcp2_pkt_info pi;

usr.sbin/unbound/services/listen_dnsport.c

5163

&pi, sldns_buffer_begin(c->doq_socket->pkt_buf),

usr.sbin/unbound/services/listen_dnsport.c

5191

conn->close_ecn = pi.ecn;

usr.sbin/unbound/services/listen_dnsport.c

5247

struct doq_conn* conn, struct ngtcp2_pkt_info* pi, int* err_retry,

usr.sbin/unbound/services/listen_dnsport.c

5260

ret = ngtcp2_conn_read_pkt(conn->conn, &path, pi,

usr.sbin/unbound/services/listen_dnsport.c

5357

ngtcp2_pkt_info pi;

usr.sbin/unbound/services/listen_dnsport.c

5400

ret = ngtcp2_conn_writev_stream(conn->conn, &ps.path, &pi,

usr.sbin/unbound/services/listen_dnsport.c

5480

doq_send_pkt(c, &conn->key.paddr, pi.ecn);

usr.sbin/unbound/services/listen_dnsport.h

766

struct doq_conn* conn, struct ngtcp2_pkt_info* pi, int* err_retry,

usr.sbin/unbound/services/outside_network.c

1027

&pend_tcp->pi->addr, comm_tcp, NULL, w->sq->zone,

usr.sbin/unbound/services/outside_network.c

215

struct port_if* pi = NULL;

usr.sbin/unbound/services/outside_network.c

217

pend->pi = NULL;

usr.sbin/unbound/services/outside_network.c

232

pi = &w->outnet->ip6_ifs[ub_random_max(w->outnet->rnd, num)];

usr.sbin/unbound/services/outside_network.c

235

pi = &w->outnet->ip4_ifs[ub_random_max(w->outnet->rnd, num)];

usr.sbin/unbound/services/outside_network.c

236

log_assert(pi);

usr.sbin/unbound/services/outside_network.c

237

pend->pi = pi;

usr.sbin/unbound/services/outside_network.c

238

if(addr_is_any(&pi->addr, pi->addrlen)) {

usr.sbin/unbound/services/outside_network.c

243

if(addr_is_ip6(&pi->addr, pi->addrlen))

usr.sbin/unbound/services/outside_network.c

244

((struct sockaddr_in6*)&pi->addr)->sin6_port = 0;

usr.sbin/unbound/services/outside_network.c

245

else ((struct sockaddr_in*)&pi->addr)->sin_port = 0;

usr.sbin/unbound/services/outside_network.c

246

if(bind(s, (struct sockaddr*)&pi->addr, pi->addrlen) != 0) {

usr.sbin/unbound/services/outside_network.c

2546

&pend->pi->addr, comm_tcp, NULL, sq->zone,

usr.sbin/unbound/services/outside_network.c

258

log_addr(VERB_ALGO, "tcp bound to src", &pi->addr, pi->addrlen);

usr.sbin/unbound/services/outside_network.c

3096

struct port_if* pi = NULL;

usr.sbin/unbound/services/outside_network.c

3099

pi = pend_tcp->pi;

usr.sbin/unbound/services/outside_network.c

3113

if(error==NETEVENT_NOERROR && pi && sq->outnet->dtenv &&

usr.sbin/unbound/services/outside_network.c

3117

log_addr(VERB_ALGO, "to local addr", &pi->addr, pi->addrlen);

usr.sbin/unbound/services/outside_network.c

3119

&pi->addr, c->type, c->ssl, sq->zone, sq->zonelen, sq->qbuf,

usr.sbin/unbound/services/outside_network.h

354

struct port_if* pi;

usr.sbin/unbound/testcode/asynclook.c

287

struct lookinfo pi;

usr.sbin/unbound/testcode/asynclook.c

288

pi.name = result?result->qname:"noname";

usr.sbin/unbound/testcode/asynclook.c

289

pi.result = result;

usr.sbin/unbound/testcode/asynclook.c

290

pi.err = 0;

usr.sbin/unbound/testcode/asynclook.c

291

print_result(&pi);

usr.sbin/unbound/testcode/doqclient.c

1551

struct ngtcp2_pkt_info pi;

usr.sbin/unbound/testcode/doqclient.c

1587

data->conn, &ps.path, &pi, sldns_buffer_begin(data->pkt_buf),

usr.sbin/unbound/testcode/doqclient.c

1603

doq_client_send_pkt(data, pi.ecn, sldns_buffer_begin(data->pkt_buf),

usr.sbin/unbound/testcode/doqclient.c

1690

ngtcp2_pkt_info pi;

usr.sbin/unbound/testcode/doqclient.c

1716

pi.ecn = msghdr_get_ecn(&msg, addr.ss_family);

usr.sbin/unbound/testcode/doqclient.c

1717

verbose(1, "recvmsg %d ecn=0x%x", (int)rcv, (int)pi.ecn);

usr.sbin/unbound/testcode/doqclient.c

1724

rv = ngtcp2_conn_read_pkt(data->conn, &path, &pi,

usr.sbin/unbound/testcode/doqclient.c

1824

ngtcp2_pkt_info pi;

usr.sbin/unbound/testcode/doqclient.c

1923

ret = ngtcp2_conn_writev_stream(data->conn, &ps.path, &pi,

usr.sbin/unbound/testcode/doqclient.c

1966

if(!doq_client_send_pkt(data, pi.ecn,

usr.sbin/unbound/util/netevent.c

1566

struct ngtcp2_pkt_info* pi)

usr.sbin/unbound/util/netevent.c

1603

pi->ecn = msghdr_get_ecn(&msg, paddr->addr.sockaddr.in.sin_family);

usr.sbin/unbound/util/netevent.c

2126

struct doq_conn** conn, struct ngtcp2_pkt_info* pi)

usr.sbin/unbound/util/netevent.c

2158

if(!doq_conn_recv(c, paddr, *conn, pi, &err_retry, NULL)) {

usr.sbin/unbound/util/netevent.c

2526

struct ngtcp2_pkt_info pi;

usr.sbin/unbound/util/netevent.c

2623

if(!doq_recv(c, &paddr, &pkt_continue, &pi)) {

usr.sbin/unbound/util/netevent.c

2645

(int)pi.ecn);

usr.sbin/unbound/util/netevent.c

2655

if(!doq_accept(c, &paddr, &conn, &pi))

usr.sbin/unbound/util/netevent.c

2688

if(!doq_conn_recv(c, &paddr, conn, &pi, NULL, &err_drop)) {