sys/dev/pci/drm/amd/amdgpu/amdgpu_ih.c

53

rb_bufsz = order_base_2(ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/cik_ih.c

127

rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

454

rb_bufsz = order_base_2(ring->ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/cz_ih.c

129

rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5160

(order_base_2(num_sc) << PA_SC_TILE_STEERING_OVERRIDE__NUM_SC__SHIFT) &

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5163

(order_base_2(num_rb_per_sc) << PA_SC_TILE_STEERING_OVERRIDE__NUM_RB_PER_SC__SHIFT) &

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5166

(order_base_2(num_packer_per_sc) << PA_SC_TILE_STEERING_OVERRIDE__NUM_PACKER_PER_SC__SHIFT) &

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6518

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6561

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6815

rb_bufsz = order_base_2(prop->queue_size / 4) - 1;

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6928

(order_base_2(GFX10_MEC_HPD_SIZE / 4) - 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6974

(order_base_2(prop->queue_size / 4) - 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6976

(order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3737

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3777

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4144

rb_bufsz = order_base_2(prop->queue_size / 4) - 1;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4255

(order_base_2(GFX11_MEC_HPD_SIZE / 4) - 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4301

(order_base_2(prop->queue_size / 4) - 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4303

(order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2728

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3019

rb_bufsz = order_base_2(prop->queue_size / 4) - 1;

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3128

(order_base_2(GFX12_MEC_HPD_SIZE / 4) - 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3174

(order_base_2(prop->queue_size / 4) - 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3176

(order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2155

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2156

tmp = (order_base_2(AMDGPU_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2244

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2245

tmp = (order_base_2(AMDGPU_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2264

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2265

tmp = (order_base_2(AMDGPU_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2559

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2560

tmp = (order_base_2(AMDGPU_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2792

tmp |= order_base_2(GFX7_MEC_HPD_SIZE / 8);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2868

order_base_2(ring->ring_size / 8);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2870

(order_base_2(AMDGPU_GPU_PAGE_SIZE/8) << 8);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4242

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4424

(order_base_2(GFX8_MEC_HPD_SIZE / 4) - 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4453

(order_base_2(ring->ring_size / 4) - 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4455

(order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3403

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3578

(order_base_2(GFX9_MEC_HPD_SIZE / 4) - 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3625

(order_base_2(ring->ring_size / 4) - 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3627

(order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1854

(order_base_2(GFX9_MEC_HPD_SIZE / 4) - 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1904

(order_base_2(ring->ring_size / 4) - 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1906

((order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1) << 8));

sys/dev/pci/drm/amd/amdgpu/iceland_ih.c

129

rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/ih_v6_0.c

217

int rb_bufsz = order_base_2(ih->ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/ih_v6_1.c

189

int rb_bufsz = order_base_2(ih->ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/ih_v7_0.c

189

int rb_bufsz = order_base_2(ih->ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1125

(order_base_2(MES_EOP_SIZE / 4) - 1));

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1165

(order_base_2(ring->ring_size / 4) - 1));

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1167

((order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1) << 8));

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1285

(order_base_2(MES_EOP_SIZE / 4) - 1));

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1325

(order_base_2(ring->ring_size / 4) - 1));

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1327

((order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1) << 8));

sys/dev/pci/drm/amd/amdgpu/navi10_ih.c

215

int rb_bufsz = order_base_2(ih->ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

427

rb_bufsz = order_base_2(ring->ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

667

rb_bufsz = order_base_2(ring->ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1069

uint32_t rb_bufsz = order_base_2(ring->ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

664

uint32_t rb_bufsz = order_base_2(ring->ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

705

rb_bufsz = order_base_2(ring->ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

967

order_base_2(prop->queue_size / 4) << SDMA0_RLC0_RB_CNTL__RB_SIZE__SHIFT |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

554

rb_bufsz = order_base_2(ring->ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

867

order_base_2(prop->queue_size / 4) << SDMA0_RLC0_RB_CNTL__RB_SIZE__SHIFT |

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

497

rb_bufsz = order_base_2(ring->ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

863

order_base_2(prop->queue_size / 4) << SDMA0_QUEUE0_RB_CNTL__RB_SIZE__SHIFT |

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

489

rb_bufsz = order_base_2(ring->ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

883

order_base_2(prop->queue_size / 4) << SDMA0_QUEUE0_RB_CNTL__RB_SIZE__SHIFT |

sys/dev/pci/drm/amd/amdgpu/si_dma.c

156

rb_bufsz = order_base_2(ring->ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/si_ih.c

78

rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/tonga_ih.c

125

rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

443

rb_bufsz = order_base_2(ring->ring_size);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

401

rb_bufsz = order_base_2(ring->ring_size);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

419

rb_bufsz = order_base_2(ring->ring_size);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

838

rb_bufsz = order_base_2(ring->ring_size);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1085

rb_bufsz = order_base_2(ring->ring_size);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

918

size = order_base_2(ring->ring_size);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1133

rb_bufsz = order_base_2(ring->ring_size);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

969

rb_bufsz = order_base_2(ring->ring_size);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1131

rb_bufsz = order_base_2(ring->ring_size);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

2077

tmp = order_base_2(ring->ring_size);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

952

rb_bufsz = order_base_2(ring->ring_size);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1113

rb_bufsz = order_base_2(ring->ring_size);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1303

rb_bufsz = order_base_2(ring->ring_size);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1526

rb_bufsz = order_base_2(ring->ring_size);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1138

rb_bufsz = order_base_2(ring->ring_size);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1329

rb_bufsz = order_base_2(ring->ring_size);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1519

tmp = order_base_2(ring->ring_size);

sys/dev/pci/drm/amd/amdgpu/vega10_ih.c

160

int rb_bufsz = order_base_2(ih->ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/vega20_ih.c

196

int rb_bufsz = order_base_2(ih->ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/vpe_v6_1.c

217

rb_bufsz = order_base_2(ring->ring_size / 4);

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager_cik.c

191

m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1;

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager_cik.c

230

m->sdma_rlc_rb_cntl = order_base_2(q->queue_size / 4)

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager_cik.c

351

m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1;

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager_v9.c

252

m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1;

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager_v9.c

285

min(0xA, order_base_2(q->eop_ring_buffer_size / 4) - 1) : 0;

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager_v9.c

500

m->sdmax_rlcx_rb_cntl = order_base_2(q->queue_size / 4)

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager_vi.c

181

m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1;

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager_vi.c

213

order_base_2(q->eop_ring_buffer_size / 4) - 1);

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager_vi.c

364

m->sdmax_rlcx_rb_cntl = order_base_2(q->queue_size / 4)

sys/dev/pci/drm/i915/display/intel_display_types.h

1736

#define INTEL_DP_LANE_COUNT_EXP_BITS order_base_2(INTEL_DP_MAX_SUPPORTED_LANE_CONFIGS)

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

2274

order_base_2(ce->parallel.number_children

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

2299

order_base_2(ce->parallel.number_children

sys/dev/pci/drm/radeon/cik.c

4069

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/pci/drm/radeon/cik.c

4070

tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

sys/dev/pci/drm/radeon/cik.c

4549

tmp |= order_base_2(MEC_HPD_SIZE / 8);

sys/dev/pci/drm/radeon/cik.c

4663

order_base_2(rdev->ring[idx].ring_size / 8);

sys/dev/pci/drm/radeon/cik.c

4665

(order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8);

sys/dev/pci/drm/radeon/cik.c

6969

rb_bufsz = order_base_2(rdev->ih.ring_size / 4);

sys/dev/pci/drm/radeon/cik_sdma.c

387

rb_bufsz = order_base_2(ring->ring_size / 4);

sys/dev/pci/drm/radeon/evergreen.c

3082

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/pci/drm/radeon/evergreen.c

3083

tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

sys/dev/pci/drm/radeon/ni.c

1668

rb_cntl = order_base_2(ring->ring_size / 8);

sys/dev/pci/drm/radeon/ni.c

1669

rb_cntl |= order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8;

sys/dev/pci/drm/radeon/ni_dma.c

209

rb_bufsz = order_base_2(ring->ring_size / 4);

sys/dev/pci/drm/radeon/r100.c

1164

rb_bufsz = order_base_2(ring_size / 8);

sys/dev/pci/drm/radeon/r600.c

2730

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/pci/drm/radeon/r600.c

2731

tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

sys/dev/pci/drm/radeon/r600.c

2786

rb_bufsz = order_base_2(ring_size / 8);

sys/dev/pci/drm/radeon/r600.c

3471

rb_bufsz = order_base_2(ring_size / 4);

sys/dev/pci/drm/radeon/r600.c

3708

rb_bufsz = order_base_2(rdev->ih.ring_size / 4);

sys/dev/pci/drm/radeon/r600_dma.c

130

rb_bufsz = order_base_2(ring->ring_size / 4);

sys/dev/pci/drm/radeon/si.c

3649

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/pci/drm/radeon/si.c

3650

tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

sys/dev/pci/drm/radeon/si.c

3680

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/pci/drm/radeon/si.c

3681

tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

sys/dev/pci/drm/radeon/si.c

3704

rb_bufsz = order_base_2(ring->ring_size / 8);

sys/dev/pci/drm/radeon/si.c

3705

tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;

sys/dev/pci/drm/radeon/si.c

5992

rb_bufsz = order_base_2(rdev->ih.ring_size / 4);

sys/dev/pci/drm/radeon/uvd_v1_0.c

377

rb_bufsz = order_base_2(ring->ring_size);

sys/dev/pci/drm/ttm/ttm_pool.c

638

unsigned int order = order_base_2(nr);