lib/libarch/alpha/io.c

84

ops->outb(port, val);

lib/libarch/alpha/io.h

35

void (*outb)(u_int32_t, u_int8_t);

sys/arch/amd64/amd64/bus_space.c

789

outb(h + o, v);

sys/arch/amd64/amd64/bus_space.c

912

outb(addr, v);

sys/arch/amd64/amd64/bus_space.c

949

outb(addr, v);

sys/arch/amd64/amd64/bus_space.c

989

outb(addr2, inb(addr1));

sys/arch/amd64/amd64/bus_space.c

994

outb(addr2, inb(addr1));

sys/arch/amd64/amd64/cpu.c

1172

outb(IO_RTC, NVRAM_RESET);

sys/arch/amd64/amd64/cpu.c

1173

outb(IO_RTC+1, NVRAM_RESET_JUMP);

sys/arch/amd64/amd64/cpu.c

1218

outb(IO_RTC, NVRAM_RESET);

sys/arch/amd64/amd64/cpu.c

1219

outb(IO_RTC+1, NVRAM_RESET_RST);

sys/arch/amd64/amd64/i8259.c

111

outb(IO_ICU1, 0x11); /* reset; program device, four bytes */

sys/arch/amd64/amd64/i8259.c

113

outb(IO_ICU1+1, ICU_OFFSET); /* starting at this vector index */

sys/arch/amd64/amd64/i8259.c

114

outb(IO_ICU1+1, 1 << IRQ_SLAVE); /* slave on line 2 */

sys/arch/amd64/amd64/i8259.c

115

outb(IO_ICU1+1, 1); /* 8086 mode */

sys/arch/amd64/amd64/i8259.c

116

outb(IO_ICU1+1, 0xff); /* leave interrupts masked */

sys/arch/amd64/amd64/i8259.c

117

outb(IO_ICU1, 0x68); /* special mask mode (if available) */

sys/arch/amd64/amd64/i8259.c

118

outb(IO_ICU1, 0x0a); /* Read IRR by default. */

sys/arch/amd64/amd64/i8259.c

119

outb(IO_ICU2, 0x11); /* reset; program device, four bytes */

sys/arch/amd64/amd64/i8259.c

120

outb(IO_ICU2+1, ICU_OFFSET+8); /* staring at this vector index */

sys/arch/amd64/amd64/i8259.c

121

outb(IO_ICU2+1, IRQ_SLAVE);

sys/arch/amd64/amd64/i8259.c

122

outb(IO_ICU2+1, 1); /* 8086 mode */

sys/arch/amd64/amd64/i8259.c

123

outb(IO_ICU2+1, 0xff); /* leave interrupts masked */

sys/arch/amd64/amd64/i8259.c

124

outb(IO_ICU2, 0x68); /* special mask mode (if available) */

sys/arch/amd64/amd64/i8259.c

125

outb(IO_ICU2, 0x0a); /* Read IRR by default. */

sys/arch/amd64/amd64/i8259.c

142

outb(port, byte);

sys/arch/amd64/amd64/i8259.c

161

outb(port, byte);

sys/arch/amd64/amd64/i8259.c

179

outb(IO_ICU1 + 1, i8259_imen);

sys/arch/amd64/amd64/i8259.c

180

outb(IO_ICU2 + 1, i8259_imen >> 8);

sys/arch/amd64/amd64/ioapic.c

446

outb(IMCR_ADDR, IMCR_REGISTER);

sys/arch/amd64/amd64/ioapic.c

447

outb(IMCR_DATA, IMCR_APIC);

sys/arch/amd64/amd64/machdep.c

1897

outb(IO_KBD + KBCMDP, KBC_PULSE0);

sys/arch/amd64/amd64/machdep.c

1899

outb(IO_KBD + KBCMDP, KBC_PULSE0);

sys/arch/amd64/include/i8259.h

73

outb %al,$IO_ICU1

sys/arch/amd64/include/i8259.h

77

outb %al,$IO_ICU2 /* do the second ICU first */ ;\

sys/arch/amd64/include/i8259.h

79

outb %al,$IO_ICU1

sys/arch/amd64/include/i8259.h

85

outb %al,$(ICUADDR+1)

sys/arch/amd64/include/i8259.h

90

outb %al,$(ICUADDR+1)

sys/arch/amd64/isa/clock.c

144

outb(IO_RTC, reg);

sys/arch/amd64/isa/clock.c

152

outb(IO_RTC, reg);

sys/arch/amd64/isa/clock.c

154

outb(IO_RTC+1, datum);

sys/arch/amd64/isa/clock.c

216

outb(IO_TIMER1+TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);

sys/arch/amd64/isa/clock.c

618

outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);

sys/arch/amd64/isa/clock.c

619

outb(IO_TIMER1 + TIMER_CNTR0, tval & 0xff);

sys/arch/amd64/isa/clock.c

620

outb(IO_TIMER1 + TIMER_CNTR0, tval >> 8);

sys/arch/amd64/isa/clock.c

638

outb(IO_TIMER1+TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);

sys/arch/amd64/pci/vga_post.c

98

outb(port, val);

sys/arch/amd64/stand/efiboot/efiboot.c

634

outb(port + com_cfcr, LCR_DLAB);

sys/arch/amd64/stand/efiboot/efiboot.c

635

outb(port + com_dlbl, newsp);

sys/arch/amd64/stand/efiboot/efiboot.c

636

outb(port + com_dlbh, newsp>>8);

sys/arch/amd64/stand/efiboot/efiboot.c

637

outb(port + com_cfcr, LCR_8BITS);

sys/arch/amd64/stand/efiboot/efiboot.c

668

outb(port + com_data, c);

sys/arch/amd64/stand/libsa/bioscons.c

147

outb(port + com_ier, 0);

sys/arch/amd64/stand/libsa/bioscons.c

150

outb(port + com_mcr, MCR_DTR | MCR_RTS);

sys/arch/amd64/stand/libsa/bioscons.c

151

outb(port + com_ier, 0);

sys/arch/amd64/stand/libsa/bioscons.c

152

outb(port + com_fifo, FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST |

sys/arch/amd64/stand/libsa/bioscons.c

222

outb(port + com_cfcr, LCR_DLAB);

sys/arch/amd64/stand/libsa/bioscons.c

223

outb(port + com_dlbl, newsp);

sys/arch/amd64/stand/libsa/bioscons.c

224

outb(port + com_dlbh, newsp>>8);

sys/arch/amd64/stand/libsa/bioscons.c

225

outb(port + com_cfcr, LCR_8BITS);

sys/arch/amd64/stand/libsa/bioscons.c

242

outb(port + com_data, c);

sys/arch/amd64/stand/libsa/bioscons.c

59

outb(IO_RTC, NVRAM_EQUIPMENT);

sys/arch/amd64/stand/libsa/gateA20.c

69

outb(0x92, data | 0x2);

sys/arch/amd64/stand/libsa/gateA20.c

72

outb(0x92, data & ~0x2);

sys/arch/amd64/stand/libsa/gateA20.c

81

outb(IO_KBD + KBCMDP, KBC_CMDWOUT);

sys/arch/amd64/stand/libsa/gateA20.c

85

outb(IO_KBD + KBDATAP, KB_A20);

sys/arch/amd64/stand/libsa/gateA20.c

87

outb(IO_KBD + KBDATAP, 0xcd);

sys/arch/i386/i386/bus_space.c

349

outb(h + o, v);

sys/arch/i386/i386/cpu.c

769

outb(IO_RTC, NVRAM_RESET);

sys/arch/i386/i386/cpu.c

770

outb(IO_RTC+1, NVRAM_RESET_JUMP);

sys/arch/i386/i386/cpu.c

817

outb(IO_RTC, NVRAM_RESET);

sys/arch/i386/i386/cpu.c

818

outb(IO_RTC+1, NVRAM_RESET_RST);

sys/arch/i386/i386/ioapic.c

585

outb(IMCR_ADDR, IMCR_REGISTER);

sys/arch/i386/i386/ioapic.c

586

outb(IMCR_DATA, IMCR_APIC);

sys/arch/i386/i386/machdep.c

308

outb(0x22, reg);

sys/arch/i386/i386/machdep.c

315

outb(0x22, reg);

sys/arch/i386/i386/machdep.c

316

outb(0x23, data);

sys/arch/i386/i386/machdep.c

3423

outb(IO_KBD + KBCMDP, KBC_PULSE0);

sys/arch/i386/i386/machdep.c

3425

outb(IO_KBD + KBCMDP, KBC_PULSE0);

sys/arch/i386/include/i8259.h

100

outb %al,$IO_ICU1

sys/arch/i386/include/i8259.h

108

outb %al,$IO_ICU2 /* do the second ICU first */ ;\

sys/arch/i386/include/i8259.h

110

outb %al,$IO_ICU1

sys/arch/i386/include/i8259.h

124

outb %al,$(ICUADDR+1)

sys/arch/i386/include/i8259.h

133

outb %al,$(ICUADDR+1) ;\

sys/arch/i386/include/i8259.h

50

#define SET_ICUS() (outb(IO_ICU1 + 1, imen), outb(IO_ICU2 + 1, imen >> 8))

sys/arch/i386/include/i8259.h

89

outb %al,$IO_ICU1

sys/arch/i386/include/i8259.h

93

outb %al,$ICUADDR

sys/arch/i386/isa/clock.c

148

outb(IO_RTC, reg);

sys/arch/i386/isa/clock.c

162

outb(IO_RTC, reg);

sys/arch/i386/isa/clock.c

164

outb(IO_RTC+1, datum);

sys/arch/i386/isa/clock.c

294

outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);

sys/arch/i386/isa/clock.c

703

outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);

sys/arch/i386/isa/clock.c

704

outb(IO_TIMER1 + TIMER_CNTR0, tval & 0xff);

sys/arch/i386/isa/clock.c

705

outb(IO_TIMER1 + TIMER_CNTR0, tval >> 8);

sys/arch/i386/isa/clock.c

723

outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);

sys/arch/i386/isa/isa_machdep.c

174

outb(IO_ICU1, 0x11); /* reset; program device, four bytes */

sys/arch/i386/isa/isa_machdep.c

175

outb(IO_ICU1+1, ICU_OFFSET); /* starting at this vector index */

sys/arch/i386/isa/isa_machdep.c

176

outb(IO_ICU1+1, 1 << IRQ_SLAVE); /* slave on line 2 */

sys/arch/i386/isa/isa_machdep.c

178

outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */

sys/arch/i386/isa/isa_machdep.c

180

outb(IO_ICU1+1, 1); /* 8086 mode */

sys/arch/i386/isa/isa_machdep.c

182

outb(IO_ICU1+1, 0xff); /* leave interrupts masked */

sys/arch/i386/isa/isa_machdep.c

183

outb(IO_ICU1, 0x68); /* special mask mode (if available) */

sys/arch/i386/isa/isa_machdep.c

184

outb(IO_ICU1, 0x0a); /* Read IRR by default. */

sys/arch/i386/isa/isa_machdep.c

186

outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */

sys/arch/i386/isa/isa_machdep.c

189

outb(IO_ICU2, 0x11); /* reset; program device, four bytes */

sys/arch/i386/isa/isa_machdep.c

190

outb(IO_ICU2+1, ICU_OFFSET+8); /* staring at this vector index */

sys/arch/i386/isa/isa_machdep.c

191

outb(IO_ICU2+1, IRQ_SLAVE);

sys/arch/i386/isa/isa_machdep.c

193

outb(IO_ICU2+1, 2 | 1); /* auto EOI, 8086 mode */

sys/arch/i386/isa/isa_machdep.c

195

outb(IO_ICU2+1, 1); /* 8086 mode */

sys/arch/i386/isa/isa_machdep.c

197

outb(IO_ICU2+1, 0xff); /* leave interrupts masked */

sys/arch/i386/isa/isa_machdep.c

198

outb(IO_ICU2, 0x68); /* special mask mode (if available) */

sys/arch/i386/isa/isa_machdep.c

199

outb(IO_ICU2, 0x0a); /* Read IRR by default. */

sys/arch/i386/isa/joy.c

101

outb(port, 0xff);

sys/arch/i386/isa/joy.c

169

outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0);

sys/arch/i386/isa/joy_isa.c

66

outb(iobase, 0xff);

sys/arch/i386/isa/joy_isa.c

85

outb(iobase, 0xff);

sys/arch/i386/isa/joy_isapnp.c

67

outb(iobase, 0xff);

sys/arch/i386/isa/npx.c

302

outb(0xf1, 0); /* full reset on some systems, NOP on others */

sys/arch/i386/isa/npx.c

304

outb(0xf0, 0); /* clear BUSY# latch */

sys/arch/i386/isa/npx.c

436

outb(0xf0, 0);

sys/arch/i386/pci/geodesc.c

191

outb(0xCFC, 0x0F);

sys/arch/i386/pci/pci_machdep.c

465

outb(PCI_MODE2_ENABLE_REG, tag.mode2.enable);

sys/arch/i386/pci/pci_machdep.c

466

outb(PCI_MODE2_FORWARD_REG, tag.mode2.forward);

sys/arch/i386/pci/pci_machdep.c

468

outb(PCI_MODE2_ENABLE_REG, 0);

sys/arch/i386/pci/pci_machdep.c

503

outb(PCI_MODE2_ENABLE_REG, tag.mode2.enable);

sys/arch/i386/pci/pci_machdep.c

504

outb(PCI_MODE2_FORWARD_REG, tag.mode2.forward);

sys/arch/i386/pci/pci_machdep.c

506

outb(PCI_MODE2_ENABLE_REG, 0);

sys/arch/i386/pci/pci_machdep.c

586

outb(PCI_MODE1_ADDRESS_REG + 3, 0);

sys/arch/i386/pci/pci_machdep.c

611

outb(PCI_MODE2_ENABLE_REG, 0);

sys/arch/i386/pci/pci_machdep.c

612

outb(PCI_MODE2_FORWARD_REG, 0);

sys/arch/i386/pci/vga_post.c

98

outb(port, val);

sys/arch/i386/stand/libsa/bioscons.c

145

outb(port + com_ier, 0);

sys/arch/i386/stand/libsa/bioscons.c

148

outb(port + com_mcr, MCR_DTR | MCR_RTS);

sys/arch/i386/stand/libsa/bioscons.c

149

outb(port + com_fifo, FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST |

sys/arch/i386/stand/libsa/bioscons.c

219

outb(port + com_cfcr, LCR_DLAB);

sys/arch/i386/stand/libsa/bioscons.c

220

outb(port + com_dlbl, newsp);

sys/arch/i386/stand/libsa/bioscons.c

221

outb(port + com_dlbh, newsp>>8);

sys/arch/i386/stand/libsa/bioscons.c

222

outb(port + com_cfcr, LCR_8BITS);

sys/arch/i386/stand/libsa/bioscons.c

239

outb(port + com_data, c);

sys/arch/i386/stand/libsa/bioscons.c

57

outb(IO_RTC, NVRAM_EQUIPMENT);

sys/arch/i386/stand/libsa/gateA20.c

67

outb(0x92, data | 0x2);

sys/arch/i386/stand/libsa/gateA20.c

70

outb(0x92, data & ~0x2);

sys/arch/i386/stand/libsa/gateA20.c

79

outb(IO_KBD + KBCMDP, KBC_CMDWOUT);

sys/arch/i386/stand/libsa/gateA20.c

83

outb(IO_KBD + KBDATAP, KB_A20);

sys/arch/i386/stand/libsa/gateA20.c

85

outb(IO_KBD + KBDATAP, 0xcd);

sys/arch/powerpc/include/pio.h

136

#define out8(a,v) outb(a,v)

sys/arch/powerpc/include/pio.h

148

#define out8rb(a,v) outb(a,v)

sys/dev/isa/if_el.c

123

outb(iobase+EL_AC, EL_AC_RESET);

sys/dev/isa/if_el.c

125

outb(iobase+EL_AC, 0);

sys/dev/isa/if_el.c

130

outb(iobase+EL_GPBL, i);

sys/dev/isa/if_el.c

215

outb(sc->sc_iobase+EL_AC, 0);

sys/dev/isa/if_el.c

228

outb(iobase+EL_AC, EL_AC_RESET);

sys/dev/isa/if_el.c

230

outb(iobase+EL_AC, 0);

sys/dev/isa/if_el.c

233

outb(iobase+i, sc->sc_arpcom.ac_enaddr[i]);

sys/dev/isa/if_el.c

251

outb(iobase+EL_RXC, EL_RXC_AGF | EL_RXC_DSHORT | EL_RXC_DDRIB | EL_RXC_DOFLOW | EL_RXC_PROMISC);

sys/dev/isa/if_el.c

253

outb(iobase+EL_RXC, EL_RXC_AGF | EL_RXC_DSHORT | EL_RXC_DDRIB | EL_RXC_DOFLOW | EL_RXC_ABROAD);

sys/dev/isa/if_el.c

254

outb(iobase+EL_RBC, 0);

sys/dev/isa/if_el.c

258

outb(iobase+EL_TXC, 0);

sys/dev/isa/if_el.c

262

outb(iobase+EL_AC, EL_AC_IRQE | EL_AC_RX);

sys/dev/isa/if_el.c

315

outb(iobase+EL_AC, EL_AC_HOST);

sys/dev/isa/if_el.c

316

outb(iobase+EL_RBC, 0);

sys/dev/isa/if_el.c

321

outb(iobase+EL_GPBL, off);

sys/dev/isa/if_el.c

322

outb(iobase+EL_GPBH, off >> 8);

sys/dev/isa/if_el.c

329

outb(iobase+EL_BUF, 0);

sys/dev/isa/if_el.c

336

outb(iobase+EL_GPBL, off);

sys/dev/isa/if_el.c

337

outb(iobase+EL_GPBH, off >> 8);

sys/dev/isa/if_el.c

352

outb(iobase+EL_AC, EL_AC_HOST);

sys/dev/isa/if_el.c

368

outb(iobase+EL_AC, EL_AC_IRQE | EL_AC_RX);

sys/dev/isa/if_el.c

375

outb(iobase+EL_AC, EL_AC_IRQE | EL_AC_RX);

sys/dev/isa/if_el.c

398

outb(iobase+EL_AC, EL_AC_TXFRX);

sys/dev/isa/if_el.c

425

outb(iobase+EL_AC, EL_AC_IRQE | EL_AC_RX);

sys/dev/isa/if_el.c

440

outb(iobase+EL_RXC, EL_RXC_AGF | EL_RXC_DSHORT | EL_RXC_DDRIB | EL_RXC_DOFLOW | EL_RXC_PROMISC);

sys/dev/isa/if_el.c

442

outb(iobase+EL_RXC, EL_RXC_AGF | EL_RXC_DSHORT | EL_RXC_DDRIB | EL_RXC_DOFLOW | EL_RXC_ABROAD);

sys/dev/isa/if_el.c

444

outb(iobase+EL_RBC, 0);

sys/dev/isa/if_el.c

452

outb(iobase+EL_AC, EL_AC_HOST);

sys/dev/isa/if_el.c

465

outb(iobase+EL_AC, EL_AC_IRQE | EL_AC_RX);

sys/dev/isa/if_el.c

518

outb(iobase+EL_GPBL, 0);

sys/dev/isa/if_el.c

519

outb(iobase+EL_GPBH, 0);

sys/dev/isa/if_el.c

542

outb(iobase+EL_RBC, 0);

sys/dev/isa/if_el.c

543

outb(iobase+EL_AC, EL_AC_RX);

sys/dev/isa/if_ie.c

1486

outb(PORT + IE507_CTRL, EL_CTRL_RESET);

sys/dev/isa/if_ie.c

1488

outb(PORT + IE507_CTRL, EL_CTRL_NORMAL);

sys/dev/isa/if_ie.c

1496

outb(PORT + IEATT_RESET, 0);

sys/dev/isa/if_ie.c

1503

outb(PORT + IEE16_ECTRL, IEE16_RESET_586);

sys/dev/isa/if_ie.c

1505

outb(PORT + IEE16_ECTRL, 0);

sys/dev/isa/if_ie.c

1513

outb(PORT + IE507_ATTN, 1);

sys/dev/isa/if_ie.c

1520

outb(PORT + IEATT_ATTN, 0);

sys/dev/isa/if_ie.c

1526

outb(PORT + IEE16_ATTN, 0);

sys/dev/isa/if_ie.c

1537

outb(PORT + IEE16_ECTRL, ectrl);

sys/dev/isa/if_ie.c

1544

outb(PORT + IEE16_ECTRL, ectrl);

sys/dev/isa/if_ie.c

1562

outb(PORT + IEE16_ECTRL, ectrl);

sys/dev/isa/if_ie.c

1568

outb(PORT + IEE16_ECTRL, ectrl);

sys/dev/isa/if_ie.c

1601

outb(PORT + IEE16_ECTRL, ectrl);

sys/dev/isa/if_ie.c

1609

outb(PORT + IEE16_IRQ, sc->irq_encoded | IEE16_IRQ_ENABLE);

sys/dev/isa/if_ie.c

1926

outb(PORT + IEE16_CONFIG, bart_config);

sys/dev/isa/if_ie.c

465

outb(ELINK_ID_PORT, 0xff);

sys/dev/isa/if_ie.c

468

outb(PORT + IE507_CTRL, inb(PORT + IE507_CTRL) & 0xfc); /* XXX */

sys/dev/isa/if_ie.c

481

outb(ELINK_ID_PORT, 0x00);

sys/dev/isa/if_ie.c

483

outb(ELINK_ID_PORT, 0x00);

sys/dev/isa/if_ie.c

486

outb(PORT + IE507_CTRL, EL_CTRL_NRST | EL_CTRL_BNK2);

sys/dev/isa/if_ie.c

514

outb(PORT + IE507_CTRL, EL_CTRL_NORMAL);

sys/dev/isa/if_ie.c

524

outb(PORT + IE507_CTRL, EL_CTRL_NRST);

sys/dev/isa/if_ie.c

533

outb(PORT + IE507_CTRL, EL_CTRL_NRST);

sys/dev/isa/if_ie.c

540

outb(PORT + IE507_ICTRL, 1);

sys/dev/isa/if_ie.c

568

outb(ia->ia_iobase + IEE16_ECTRL, IEE16_RESET_ASIC);

sys/dev/isa/if_ie.c

569

outb(ia->ia_iobase + IEE16_ECTRL, 0);

sys/dev/isa/if_ie.c

635

outb( PORT + IEE16_ECTRL, IEE16_RESET_586);

sys/dev/isa/if_ie.c

677

outb(PORT + IEE16_MEMDEC, decode & 0xFF);

sys/dev/isa/if_ie.c

679

outb(PORT + IEE16_MCTRL, adjust);

sys/dev/isa/if_ie.c

681

outb(PORT + IEE16_MPCTRL, (~decode & 0xFF));

sys/dev/isa/if_ie.c

683

outb(PORT + IEE16_MECTRL, edecode); /*XXX disable Exxx */

sys/dev/isa/if_ie.c

727

outb(PORT + IEE16_IRQ, sc->irq_encoded);

sys/dev/isa/if_ie.c

734

outb(PORT + IEE16_CONFIG, bart_config);

sys/dev/isa/if_ie.c

738

outb(PORT + IEE16_ECTRL, 0);

sys/dev/isa/if_ie.c

802

outb(PORT + IE507_ICTRL, 1);

sys/dev/isa/if_ie.c

806

outb(PORT + IEE16_IRQ, sc->irq_encoded);

sys/dev/isa/if_ie.c

853

outb(PORT + IE507_ICTRL, 1);

sys/dev/isa/if_ie.c

859

outb(PORT + IEE16_IRQ, sc->irq_encoded | IEE16_IRQ_ENABLE);

sys/dev/isa/pas.c

141

#define paswrite(d, p) outb(p, d)

sys/dev/isa/pas.c

259

outb(MASTER_DECODE, 0xbc);

sys/dev/isa/pas.c

274

outb(MASTER_DECODE, iobase >> 2);

sys/dev/pci/drm/i915/display/intel_vga.c

101

outb(inb(VGA_MIS_R), VGA_MIS_W);

sys/dev/pci/drm/i915/display/intel_vga.c

103

outb(VGA_MIS_W, inb(VGA_MIS_R));

sys/dev/pci/drm/i915/display/intel_vga.c

70

outb(0x01, VGA_SEQ_I);

sys/dev/pci/drm/i915/display/intel_vga.c

72

outb(sr1 | VGA_SR01_SCREEN_OFF, VGA_SEQ_D);

sys/dev/pci/drm/i915/display/intel_vga.c

74

outb(VGA_SEQ_I, 0x01);

sys/dev/pci/drm/i915/display/intel_vga.c

76

outb(VGA_SEQ_D, sr1 | VGA_SR01_SCREEN_OFF);

sys/dev/pci/gdt_pci.c

375

outb(0x00,PTR2USHORT(&ha->plx->control1));

sys/dev/pci/gdt_pci.c

376

outb(0xff,PTR2USHORT(&ha->plx->edoor_reg));

sys/dev/pci/gdt_pci.c

384

outb(1,PTR2USHORT(&ha->plx->ldoor_reg));

sys/dev/pci/gdt_pci.c

414

outb(1,PTR2USHORT(&ha->plx->ldoor_reg));