bin/test/test.c

408

struct t_op const *op = ops;

bin/test/test.c

499

struct t_op const *op = ops;

bin/test/test.c

96

} const ops [] = {

lib/libarch/alpha/io.c

102

return ops->map_memory(address, size);

lib/libarch/alpha/io.c

108

ops->unmap_memory(handle, size);

lib/libarch/alpha/io.c

114

return ops->readb(handle, offset);

lib/libarch/alpha/io.c

120

return ops->readw(handle, offset);

lib/libarch/alpha/io.c

126

return ops->readl(handle, offset);

lib/libarch/alpha/io.c

132

ops->writeb(handle, offset, val);

lib/libarch/alpha/io.c

139

ops->writew(handle, offset, val);

lib/libarch/alpha/io.c

146

ops->writel(handle, offset, val);

lib/libarch/alpha/io.c

153

ops->writeb(handle, offset, val);

lib/libarch/alpha/io.c

159

ops->writew(handle, offset, val);

lib/libarch/alpha/io.c

165

ops->writel(handle, offset, val);

lib/libarch/alpha/io.c

36

static struct io_ops *ops;

lib/libarch/alpha/io.c

52

ops = &bwx_io_ops;

lib/libarch/alpha/io.c

55

ops = &swiz_io_ops;

lib/libarch/alpha/io.c

60

return ops->ioperm(from, num, on);

lib/libarch/alpha/io.c

66

return ops->inb(port);

lib/libarch/alpha/io.c

72

return ops->inw(port);

lib/libarch/alpha/io.c

78

return ops->inl(port);

lib/libarch/alpha/io.c

84

ops->outb(port, val);

lib/libarch/alpha/io.c

90

ops->outw(port, val);

lib/libarch/alpha/io.c

96

ops->outl(port, val);

lib/libc/rpc/auth_none.c

56

static const struct auth_ops ops = {

lib/libc/rpc/auth_none.c

85

ap->no_client.ah_ops = &ops;

lib/libfuse/fuse.c

254

const struct fuse_operations *ops, unused size_t size,

lib/libfuse/fuse.c

260

if (fc == NULL || ops == NULL)

lib/libfuse/fuse.c

267

memcpy(&fuse->op, ops, sizeof(fuse->op));

lib/libfuse/fuse.c

542

fuse_setup(int argc, char **argv, const struct fuse_operations *ops,

lib/libfuse/fuse.c

560

if ((fuse = fuse_new(fc, &args, ops, size, data)) == NULL) {

lib/libfuse/fuse.c

589

fuse_main(int argc, char **argv, const struct fuse_operations *ops, void *data)

lib/libfuse/fuse.c

595

fuse = fuse_setup(argc, argv, ops, sizeof(*ops), &mp, NULL, data);

lib/libsndio/mio.c

132

n = hdl->ops->read(hdl, data, todo);

lib/libsndio/mio.c

162

n = hdl->ops->write(hdl, data, todo);

lib/libsndio/mio.c

179

return hdl->ops->nfds(hdl);

lib/libsndio/mio.c

187

return hdl->ops->pollfd(hdl, pfd, events);

lib/libsndio/mio.c

195

return hdl->ops->revents(hdl, pfd);

lib/libsndio/mio.c

67

_mio_create(struct mio_hdl *hdl, struct mio_ops *ops,

lib/libsndio/mio.c

70

hdl->ops = ops;

lib/libsndio/mio.c

79

hdl->ops->close(hdl);

lib/libsndio/mio_priv.h

28

struct mio_ops *ops;

lib/libsndio/sio.c

125

if (!hdl->ops->start(hdl))

lib/libsndio/sio.c

135

if (hdl->ops->stop == NULL)

lib/libsndio/sio.c

146

if (!hdl->ops->stop(hdl))

lib/libsndio/sio.c

168

if (!hdl->ops->flush(hdl))

lib/libsndio/sio.c

202

return hdl->ops->setpar(hdl, par);

lib/libsndio/sio.c

217

if (!hdl->ops->getpar(hdl, par)) {

lib/libsndio/sio.c

237

return hdl->ops->getcap(hdl, cap);

lib/libsndio/sio.c

284

n = hdl->ops->read(hdl, dummy, todo);

lib/libsndio/sio.c

304

n = hdl->ops->write(hdl, zero, todo);

lib/libsndio/sio.c

335

n = maxread > 0 ? hdl->ops->read(hdl, data, maxread) : 0;

lib/libsndio/sio.c

373

n = maxwrite > 0 ? hdl->ops->write(hdl, data, maxwrite) : 0;

lib/libsndio/sio.c

391

return hdl->ops->nfds(hdl);

lib/libsndio/sio.c

401

return hdl->ops->pollfd(hdl, pfd, events);

lib/libsndio/sio.c

419

revents = hdl->ops->revents(hdl, pfd);

lib/libsndio/sio.c

520

if (!hdl->ops->flush(hdl))

lib/libsndio/sio.c

525

if (!hdl->ops->start(hdl))

lib/libsndio/sio.c

641

if (!hdl->ops->setvol)

lib/libsndio/sio.c

643

if (!hdl->ops->setvol(hdl, ctl))

lib/libsndio/sio.c

645

hdl->ops->getvol(hdl);

lib/libsndio/sio.c

657

if (!hdl->ops->setvol)

lib/libsndio/sio.c

661

hdl->ops->getvol(hdl);

lib/libsndio/sio.c

79

_sio_create(struct sio_hdl *hdl, struct sio_ops *ops,

lib/libsndio/sio.c

82

hdl->ops = ops;

lib/libsndio/sio.c

95

hdl->ops->close(hdl);

lib/libsndio/sio_priv.h

28

struct sio_ops *ops;

lib/libsndio/sioctl.c

104

return hdl->ops->nfds(hdl);

lib/libsndio/sioctl.c

112

return hdl->ops->pollfd(hdl, pfd, events);

lib/libsndio/sioctl.c

120

return hdl->ops->revents(hdl, pfd);

lib/libsndio/sioctl.c

135

return hdl->ops->ondesc(hdl);

lib/libsndio/sioctl.c

144

return hdl->ops->onctl(hdl);

lib/libsndio/sioctl.c

176

return hdl->ops->setctl(hdl, addr, val);

lib/libsndio/sioctl.c

57

_sioctl_create(struct sioctl_hdl *hdl, struct sioctl_ops *ops,

lib/libsndio/sioctl.c

60

hdl->ops = ops;

lib/libsndio/sioctl.c

98

hdl->ops->close(hdl);

lib/libsndio/sioctl_priv.h

28

struct sioctl_ops *ops;

regress/lib/libc/sys/t_stat.c

100

int ops;

regress/lib/libc/sys/t_stat.c

105

ops = FTS_NOCHDIR;

regress/lib/libc/sys/t_stat.c

106

ops |= FTS_PHYSICAL;

regress/lib/libc/sys/t_stat.c

108

fts = fts_open(argv, ops, NULL);

sys/arch/alpha/isa/isadma_bounce.c

384

bus_size_t len, int ops)

sys/arch/alpha/isa/isadma_bounce.c

391

if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&

sys/arch/alpha/isa/isadma_bounce.c

392

(ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)

sys/arch/alpha/isa/isadma_bounce.c

396

if ((ops & (BUS_DMASYNC_PREWRITE|BUS_DMASYNC_POSTREAD)) != 0) {

sys/arch/alpha/isa/isadma_bounce.c

419

if (ops & BUS_DMASYNC_PREWRITE) {

sys/arch/alpha/isa/isadma_bounce.c

427

if (ops & BUS_DMASYNC_POSTREAD) {

sys/arch/alpha/isa/isadma_bounce.c

449

if (ops & BUS_DMASYNC_PREWRITE) {

sys/arch/alpha/isa/isadma_bounce.c

457

if (ops & BUS_DMASYNC_POSTREAD) {

sys/arch/amd64/include/bus.h

627

#define bus_dmamap_sync(t, p, o, l, ops) \

sys/arch/amd64/include/bus.h

628

(*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))

sys/arch/arm/arm/bus_dma.c

407

_bus_dmamap_sync_segment(vaddr_t va, paddr_t pa, vsize_t len, int ops)

sys/arch/arm/arm/bus_dma.c

413

va, pa, len, ops);

sys/arch/arm/arm/bus_dma.c

416

switch (ops) {

sys/arch/arm/arm/bus_dma.c

475

bus_size_t len, int ops)

sys/arch/arm/arm/bus_dma.c

490

_bus_dmamap_sync_segment(va + offset, pa, seglen, ops);

sys/arch/arm/arm/bus_dma.c

499

bus_size_t len, int ops)

sys/arch/arm/arm/bus_dma.c

542

_bus_dmamap_sync_segment(va, pa, seglen, ops);

sys/arch/arm/arm/bus_dma.c

552

bus_size_t len, int ops)

sys/arch/arm/arm/bus_dma.c

581

_bus_dmamap_sync_segment(va, pa, seglen, ops);

sys/arch/arm/arm/bus_dma.c

591

bus_size_t len, int ops)

sys/arch/arm/arm/bus_dma.c

605

_bus_dmamap_sync_segment(va, pa, seglen, ops);

sys/arch/arm/arm/bus_dma.c

626

bus_size_t len, int ops)

sys/arch/arm/arm/bus_dma.c

631

t, map, offset, len, ops);

sys/arch/arm/arm/bus_dma.c

637

if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&

sys/arch/arm/arm/bus_dma.c

638

(ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)

sys/arch/arm/arm/bus_dma.c

686

_bus_dmamap_sync_linear(t, map, offset, len, ops);

sys/arch/arm/arm/bus_dma.c

690

_bus_dmamap_sync_mbuf(t, map, offset, len, ops);

sys/arch/arm/arm/bus_dma.c

694

_bus_dmamap_sync_uio(t, map, offset, len, ops);

sys/arch/arm/arm/bus_dma.c

698

_bus_dmamap_sync_raw(t, map, offset, len, ops);

sys/arch/arm/include/bus.h

729

#define bus_dmamap_sync(t, p, o, l, ops) \

sys/arch/arm/include/bus.h

731

(*(t)->_dmamap_sync)((t), (p), (o), (l), (ops)) : (void)0)

sys/arch/arm64/arm64/bus_dma.c

362

_dmamap_sync_segment(vaddr_t va, vsize_t len, int ops)

sys/arch/arm64/arm64/bus_dma.c

364

switch (ops) {

sys/arch/hppa/dev/astro.c

522

bus_size_t len, int ops)

sys/arch/hppa/dev/dino.c

1583

bus_size_t len, int ops)

sys/arch/hppa/dev/dino.c

1587

return (bus_dmamap_sync(sc->sc_dmat, map, off, len, ops));

sys/arch/hppa/dev/elroy.c

1079

bus_size_t len, int ops);

sys/arch/hppa/dev/elroy.c

1155

bus_size_t len, int ops)

sys/arch/hppa/dev/elroy.c

1159

bus_dmamap_sync(sc->sc_dmat, map, off, len, ops);

sys/arch/hppa/hppa/mainbus.c

1002

int ops)

sys/arch/hppa/hppa/mainbus.c

712

bus_size_t len, int ops);

sys/arch/i386/include/bus.h

627

#define bus_dmamap_sync(t, p, o, l, ops) \

sys/arch/i386/include/bus.h

628

(*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))

sys/arch/landisk/landisk/bus_dma.c

346

bus_size_t len, int ops)

sys/arch/landisk/landisk/bus_dma.c

352

DPRINTF(("bus_dmamap_sync: t = %p, map = %p, offset = %ld, len = %ld, ops = %x\n", t, map, offset, len, ops));

sys/arch/landisk/landisk/bus_dma.c

358

if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&

sys/arch/landisk/landisk/bus_dma.c

359

(ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)

sys/arch/landisk/landisk/bus_dma.c

404

switch (ops) {

sys/arch/riscv64/riscv64/bus_dma.c

369

_dmamap_sync_segment(vaddr_t va, vsize_t len, int ops)

sys/arch/riscv64/riscv64/bus_dma.c

371

switch (ops) {

sys/arch/sparc64/dev/iommu.c

1530

bus_addr_t offset, bus_size_t len, int ops)

sys/arch/sparc64/dev/iommu.c

1569

bus_addr_t offset, bus_size_t len, int ops)

sys/arch/sparc64/dev/iommu.c

1577

if (ops & (BUS_DMASYNC_PREWRITE | BUS_DMASYNC_POSTREAD))

sys/arch/sparc64/dev/iommu.c

1584

if (ops & BUS_DMASYNC_PREWRITE)

sys/arch/sparc64/dev/iommu.c

1588

(ops & (BUS_DMASYNC_POSTREAD | BUS_DMASYNC_PREWRITE)))

sys/arch/sparc64/dev/iommu.c

1589

_iommu_dvmamap_sync(t, t0, map, offset, len, ops);

sys/arch/sparc64/dev/iommu.c

1591

if (ops & BUS_DMASYNC_POSTREAD)

sys/arch/sparc64/dev/psycho.c

1330

bus_size_t offset, bus_size_t len, int ops)

sys/arch/sparc64/dev/psycho.c

1335

if (ops & BUS_DMASYNC_POSTREAD)

sys/arch/sparc64/dev/psycho.c

1338

if (ops & (BUS_DMASYNC_POSTREAD | BUS_DMASYNC_PREWRITE))

sys/arch/sparc64/dev/viommu.c

873

bus_addr_t offset, bus_size_t len, int ops)

sys/arch/sparc64/dev/viommu.c

886

if (ops & BUS_DMASYNC_PREWRITE)

sys/arch/sparc64/dev/viommu.c

890

if (ops & (BUS_DMASYNC_POSTREAD | BUS_DMASYNC_PREWRITE))

sys/arch/sparc64/dev/viommu.c

891

_viommu_dvmamap_sync(t, t0, map, offset, len, ops);

sys/arch/sparc64/dev/viommu.c

894

if (ops & BUS_DMASYNC_POSTREAD)

sys/arch/sparc64/include/bus.h

555

int ops)

sys/arch/sparc64/include/bus.h

559

_BD_CALL(t, _dmamap_sync)(t, t0, p, o, l, ops);

sys/arch/sparc64/sparc64/machdep.c

1215

bus_addr_t offset, bus_size_t len, int ops)

sys/arch/sparc64/sparc64/machdep.c

1217

if (ops & (BUS_DMASYNC_PREWRITE | BUS_DMASYNC_POSTREAD))

sys/dev/audio.c

1165

if ((sc->mode & AUMODE_PLAY) && sc->ops->init_output) {

sys/dev/audio.c

1166

error = sc->ops->init_output(sc->arg,

sys/dev/audio.c

1171

if ((sc->mode & AUMODE_RECORD) && sc->ops->init_input) {

sys/dev/audio.c

1172

error = sc->ops->init_input(sc->arg,

sys/dev/audio.c

120

const struct audio_hw_if *ops; /* driver funcs */

sys/dev/audio.c

1202

const struct audio_hw_if *ops = sa->hwif;

sys/dev/audio.c

1211

if (ops == 0 ||

sys/dev/audio.c

1212

ops->open == 0 ||

sys/dev/audio.c

1213

ops->close == 0 ||

sys/dev/audio.c

1214

ops->set_params == 0 ||

sys/dev/audio.c

1215

(ops->start_output == 0 && ops->trigger_output == 0) ||

sys/dev/audio.c

1216

(ops->start_input == 0 && ops->trigger_input == 0) ||

sys/dev/audio.c

1217

ops->halt_output == 0 ||

sys/dev/audio.c

1218

ops->halt_input == 0 ||

sys/dev/audio.c

1219

ops->set_port == 0 ||

sys/dev/audio.c

1220

ops->get_port == 0 ||

sys/dev/audio.c

1221

ops->query_devinfo == 0) {

sys/dev/audio.c

1223

sc->ops = 0;

sys/dev/audio.c

1227

sc->ops = ops;

sys/dev/audio.c

1237

sc->ops = 0;

sys/dev/audio.c

1244

sc->ops = 0;

sys/dev/audio.c

1277

if (sc->ops->query_devinfo(sc->arg, mi) != 0)

sys/dev/audio.c

1290

if (sc->ops->query_devinfo(sc->arg, mi) != 0)

sys/dev/audio.c

1340

sc->ops->get_port(sc->arg, sc->mix_ents + i);

sys/dev/audio.c

1351

sc->ops->set_port(sc->arg, sc->mix_ents + i);

sys/dev/audio.c

1415

sc->ops->close(sc->arg);

sys/dev/audio.c

1442

audio_attach_mi(const struct audio_hw_if *ops, void *arg, void *cookie,

sys/dev/audio.c

1448

aa.hwif = ops;

sys/dev/audio.c

1491

error = sc->ops->open(sc->arg, flags);

sys/dev/audio.c

1516

sc->ops->close(sc->arg);

sys/dev/audio.c

1590

sc->ops->close(sc->arg);

sys/dev/audio.c

1721

if (sc->ops->copy_output)

sys/dev/audio.c

1722

sc->ops->copy_output(sc->arg, count);

sys/dev/audio.c

1748

if (sc->ops->display_name)

sys/dev/audio.c

1749

sz = sc->ops->display_name(sc->arg, p->name, sizeof(p->name));

sys/dev/audio.c

1826

return sc->ops->query_devinfo(sc->arg, devinfo);

sys/dev/audio.c

1862

return sc->ops->get_port(sc->arg, c);

sys/dev/audio.c

1883

error = sc->ops->set_port(sc->arg, c);

sys/dev/audio.c

1886

if (sc->ops->commit_settings)

sys/dev/audio.c

1887

return sc->ops->commit_settings(sc->arg);

sys/dev/audio.c

2029

if (sc->ops == NULL)

sys/dev/audio.c

2287

if (sc->ops->query_devinfo(sc->arg, mi) != 0)

sys/dev/audio.c

2309

if (sc->ops->query_devinfo(sc->arg, dev) != 0)

sys/dev/audio.c

2314

if (sc->ops->query_devinfo(sc->arg, cls) != 0)

sys/dev/audio.c

2379

if (sc->ops == NULL)

sys/dev/audio.c

2384

error = sc->ops->get_port(sc->arg, &ctrl);

sys/dev/audio.c

2402

error = sc->ops->set_port(sc->arg, &ctrl);

sys/dev/audio.c

2413

error = sc->ops->get_port(sc->arg, &ctrl);

sys/dev/audio.c

2428

error = sc->ops->set_port(sc->arg, &ctrl);

sys/dev/audio.c

314

if (sc->ops->round_buffersize) {

sys/dev/audio.c

315

buf->datalen = sc->ops->round_buffersize(sc->arg,

sys/dev/audio.c

319

if (sc->ops->allocm) {

sys/dev/audio.c

320

buf->data = sc->ops->allocm(sc->arg, dir, buf->datalen,

sys/dev/audio.c

334

if (sc->ops->freem)

sys/dev/audio.c

335

sc->ops->freem(sc->arg, buf->data, M_DEVBUF);

sys/dev/audio.c

508

if ((sc->mode & AUMODE_RECORD) && sc->ops->underrun == NULL) {

sys/dev/audio.c

522

if (!sc->ops->underrun) {

sys/dev/audio.c

531

if (sc->ops->underrun)

sys/dev/audio.c

532

sc->ops->underrun(sc->arg);

sys/dev/audio.c

538

if (!sc->ops->trigger_output) {

sys/dev/audio.c

540

error = sc->ops->start_output(sc->arg,

sys/dev/audio.c

587

if ((sc->mode & AUMODE_PLAY) && sc->ops->underrun == NULL) {

sys/dev/audio.c

615

if (!sc->ops->trigger_input) {

sys/dev/audio.c

617

error = sc->ops->start_input(sc->arg,

sys/dev/audio.c

645

if (sc->ops->trigger_output) {

sys/dev/audio.c

652

error = sc->ops->trigger_output(sc->arg,

sys/dev/audio.c

660

error = sc->ops->start_output(sc->arg,

sys/dev/audio.c

668

if (sc->ops->trigger_input) {

sys/dev/audio.c

675

error = sc->ops->trigger_input(sc->arg,

sys/dev/audio.c

683

error = sc->ops->start_input(sc->arg,

sys/dev/audio.c

697

sc->ops->halt_output(sc->arg);

sys/dev/audio.c

699

sc->ops->halt_input(sc->arg);

sys/dev/audio.c

744

if (sc->ops->set_blksz) {

sys/dev/audio.c

759

sc->round = sc->ops->set_blksz(sc->arg, sc->mode,

sys/dev/audio.c

769

if (sc->ops->round_blocksize) {

sys/dev/audio.c

770

blk_mult = sc->ops->round_blocksize(sc->arg, 1);

sys/dev/audio.c

800

if (sc->ops->round_blocksize)

sys/dev/audio.c

801

blk_max = sc->ops->round_blocksize(sc->arg, AUDIO_BUFSZ);

sys/dev/audio.c

856

if (sc->ops->set_nblks) {

sys/dev/audio.c

857

sc->play.nblks = sc->ops->set_nblks(sc->arg, sc->mode,

sys/dev/audio.c

870

if (sc->ops->set_nblks) {

sys/dev/audio.c

871

max = sc->ops->set_nblks(sc->arg, sc->mode,

sys/dev/audio.c

944

error = sc->ops->set_params(sc->arg, sc->mode, sc->mode, &p, &r);

sys/dev/audio.c

979

if (sc->ops->commit_settings) {

sys/dev/audio.c

980

error = sc->ops->commit_settings(sc->arg);

sys/dev/cardbus/if_athn_cardbus.c

127

sc->ops.read = athn_cardbus_read;

sys/dev/cardbus/if_athn_cardbus.c

128

sc->ops.write = athn_cardbus_write;

sys/dev/cardbus/if_athn_cardbus.c

129

sc->ops.write_barrier = athn_cardbus_write_barrier;

sys/dev/fdt/if_mvneta.c

946

mvneta_sync_txring(struct mvneta_softc *sc, int ops)

sys/dev/fdt/if_mvneta.c

949

MVNETA_DMA_LEN(sc->sc_txring), ops);

sys/dev/hid/hidms.c

464

hidms_attach(struct hidms *ms, const struct wsmouse_accessops *ops)

sys/dev/hid/hidms.c

512

a.accessops = ops;

sys/dev/hid/hidmt.c

286

hidmt_attach(struct hidmt *mt, const struct wsmouse_accessops *ops)

sys/dev/hid/hidmt.c

294

a.accessops = ops;

sys/dev/i2c/i2c_bitbang.c

111

i2c_bitbang_ops_t ops)

sys/dev/i2c/i2c_bitbang.c

121

(void) i2c_bitbang_send_start(v, flags, ops);

sys/dev/i2c/i2c_bitbang.c

122

return (i2c_bitbang_write_byte(v, i2caddr, flags & ~I2C_F_STOP, ops));

sys/dev/i2c/i2c_bitbang.c

127

i2c_bitbang_ops_t ops)

sys/dev/i2c/i2c_bitbang.c

139

if (i2c_wait_for_scl(v, ops) != 0)

sys/dev/i2c/i2c_bitbang.c

153

if (i2c_wait_for_scl(v, ops) != 0)

sys/dev/i2c/i2c_bitbang.c

164

(void) i2c_bitbang_send_stop(v, flags, ops);

sys/dev/i2c/i2c_bitbang.c

172

i2c_bitbang_ops_t ops)

sys/dev/i2c/i2c_bitbang.c

185

if (i2c_wait_for_scl(v, ops) != 0)

sys/dev/i2c/i2c_bitbang.c

197

if (i2c_wait_for_scl(v, ops) != 0)

sys/dev/i2c/i2c_bitbang.c

205

(void) i2c_bitbang_send_stop(v, flags, ops);

sys/dev/i2c/i2c_bitbang.c

48

#define BB_SET(x) ops->ibo_set_bits(v, (x))

sys/dev/i2c/i2c_bitbang.c

49

#define BB_DIR(x) ops->ibo_set_dir(v, (x))

sys/dev/i2c/i2c_bitbang.c

50

#define BB_READ ops->ibo_read_bits(v)

sys/dev/i2c/i2c_bitbang.c

52

#define SDA ops->ibo_bits[I2C_BIT_SDA] /* i2c signal */

sys/dev/i2c/i2c_bitbang.c

53

#define SCL ops->ibo_bits[I2C_BIT_SCL] /* i2c signal */

sys/dev/i2c/i2c_bitbang.c

54

#define OUTPUT ops->ibo_bits[I2C_BIT_OUTPUT] /* SDA is output */

sys/dev/i2c/i2c_bitbang.c

55

#define INPUT ops->ibo_bits[I2C_BIT_INPUT] /* SDA is input */

sys/dev/i2c/i2c_bitbang.c

62

i2c_wait_for_scl(void *v, i2c_bitbang_ops_t ops)

sys/dev/i2c/i2c_bitbang.c

71

i2c_bitbang_send_stop(v, 0, ops);

sys/dev/i2c/i2c_bitbang.c

79

i2c_bitbang_send_start(void *v, int flags, i2c_bitbang_ops_t ops)

sys/dev/i2c/i2c_bitbang.c

87

if (i2c_wait_for_scl(v, ops) != 0)

sys/dev/i2c/i2c_bitbang.c

97

i2c_bitbang_send_stop(void *v, int flags, i2c_bitbang_ops_t ops)

sys/dev/ic/aic6915.h

808

#define SF_CDTXDSYNC(sc, x, ops) \

sys/dev/ic/aic6915.h

810

SF_CDTXDOFF((x)), sizeof(struct sf_txdesc0), (ops))

sys/dev/ic/aic6915.h

812

#define SF_CDTXCSYNC(sc, x, ops) \

sys/dev/ic/aic6915.h

814

SF_CDTXCOFF((x)), sizeof(struct sf_tcd), (ops))

sys/dev/ic/aic6915.h

816

#define SF_CDRXDSYNC(sc, x, ops) \

sys/dev/ic/aic6915.h

818

SF_CDRXDOFF((x)), sizeof(struct sf_rbd32), (ops))

sys/dev/ic/aic6915.h

820

#define SF_CDRXCSYNC(sc, x, ops) \

sys/dev/ic/aic6915.h

822

SF_CDRXCOFF((x)), sizeof(struct sf_rcd_full), (ops))

sys/dev/ic/ar5008.c

1345

if (sc->ops.tx(sc, m, ni, ATHN_TXFLAG_CAB) != 0) {

sys/dev/ic/ar5008.c

154

struct athn_ops *ops = &sc->ops;

sys/dev/ic/ar5008.c

161

ops->gpio_read = ar5008_gpio_read;

sys/dev/ic/ar5008.c

162

ops->gpio_write = ar5008_gpio_write;

sys/dev/ic/ar5008.c

163

ops->gpio_config_input = ar5008_gpio_config_input;

sys/dev/ic/ar5008.c

164

ops->gpio_config_output = ar5008_gpio_config_output;

sys/dev/ic/ar5008.c

165

ops->rfsilent_init = ar5008_rfsilent_init;

sys/dev/ic/ar5008.c

167

ops->dma_alloc = ar5008_dma_alloc;

sys/dev/ic/ar5008.c

168

ops->dma_free = ar5008_dma_free;

sys/dev/ic/ar5008.c

169

ops->rx_enable = ar5008_rx_enable;

sys/dev/ic/ar5008.c

170

ops->intr = ar5008_intr;

sys/dev/ic/ar5008.c

171

ops->tx = ar5008_tx;

sys/dev/ic/ar5008.c

173

ops->set_rf_mode = ar5008_set_rf_mode;

sys/dev/ic/ar5008.c

174

ops->rf_bus_request = ar5008_rf_bus_request;

sys/dev/ic/ar5008.c

175

ops->rf_bus_release = ar5008_rf_bus_release;

sys/dev/ic/ar5008.c

176

ops->set_phy = ar5008_set_phy;

sys/dev/ic/ar5008.c

177

ops->set_delta_slope = ar5008_set_delta_slope;

sys/dev/ic/ar5008.c

178

ops->enable_antenna_diversity = ar5008_enable_antenna_diversity;

sys/dev/ic/ar5008.c

179

ops->init_baseband = ar5008_init_baseband;

sys/dev/ic/ar5008.c

180

ops->disable_phy = ar5008_disable_phy;

sys/dev/ic/ar5008.c

181

ops->set_rxchains = ar5008_set_rxchains;

sys/dev/ic/ar5008.c

182

ops->noisefloor_calib = ar5008_do_noisefloor_calib;

sys/dev/ic/ar5008.c

183

ops->init_noisefloor_calib = ar5008_init_noisefloor_calib;

sys/dev/ic/ar5008.c

184

ops->get_noisefloor = ar5008_get_noisefloor;

sys/dev/ic/ar5008.c

185

ops->apply_noisefloor = ar5008_apply_noisefloor;

sys/dev/ic/ar5008.c

186

ops->do_calib = ar5008_do_calib;

sys/dev/ic/ar5008.c

187

ops->next_calib = ar5008_next_calib;

sys/dev/ic/ar5008.c

188

ops->hw_init = ar5008_hw_init;

sys/dev/ic/ar5008.c

190

ops->set_noise_immunity_level = ar5008_set_noise_immunity_level;

sys/dev/ic/ar5008.c

191

ops->enable_ofdm_weak_signal = ar5008_enable_ofdm_weak_signal;

sys/dev/ic/ar5008.c

192

ops->disable_ofdm_weak_signal = ar5008_disable_ofdm_weak_signal;

sys/dev/ic/ar5008.c

193

ops->set_cck_weak_signal = ar5008_set_cck_weak_signal;

sys/dev/ic/ar5008.c

194

ops->set_firstep_level = ar5008_set_firstep_level;

sys/dev/ic/ar5008.c

195

ops->set_spur_immunity_level = ar5008_set_spur_immunity_level;

sys/dev/ic/ar5008.c

2516

struct athn_ops *ops = &sc->ops;

sys/dev/ic/ar5008.c

2639

ops->olpc_init(sc);

sys/dev/ic/ar5008.c

2642

ops->set_txpower(sc, c, extc);

sys/dev/ic/ar5008.c

271

ops->setup(sc);

sys/dev/ic/ar5008.c

364

sc->ops.swap_rom(sc);

sys/dev/ic/ar5416.c

118

sc->ops.setup = ar5416_setup;

sys/dev/ic/ar5416.c

119

sc->ops.swap_rom = ar5416_swap_rom;

sys/dev/ic/ar5416.c

120

sc->ops.init_from_rom = ar5416_init_from_rom;

sys/dev/ic/ar5416.c

121

sc->ops.set_txpower = ar5416_set_txpower;

sys/dev/ic/ar5416.c

122

sc->ops.set_synth = ar5416_set_synth;

sys/dev/ic/ar5416.c

123

sc->ops.spur_mitigate = ar5416_spur_mitigate;

sys/dev/ic/ar5416.c

124

sc->ops.get_spur_chans = ar5416_get_spur_chans;

sys/dev/ic/ar5416.c

684

spurchans = sc->ops.get_spur_chans(sc, IEEE80211_IS_CHAN_2GHZ(c));

sys/dev/ic/ar9003.c

1295

if (sc->ops.tx(sc, m, ni, ATHN_TXFLAG_CAB) != 0) {

sys/dev/ic/ar9003.c

163

struct athn_ops *ops = &sc->ops;

sys/dev/ic/ar9003.c

167

ops->gpio_read = ar9003_gpio_read;

sys/dev/ic/ar9003.c

168

ops->gpio_write = ar9003_gpio_write;

sys/dev/ic/ar9003.c

169

ops->gpio_config_input = ar9003_gpio_config_input;

sys/dev/ic/ar9003.c

170

ops->gpio_config_output = ar9003_gpio_config_output;

sys/dev/ic/ar9003.c

171

ops->rfsilent_init = ar9003_rfsilent_init;

sys/dev/ic/ar9003.c

173

ops->dma_alloc = ar9003_dma_alloc;

sys/dev/ic/ar9003.c

174

ops->dma_free = ar9003_dma_free;

sys/dev/ic/ar9003.c

175

ops->rx_enable = ar9003_rx_enable;

sys/dev/ic/ar9003.c

176

ops->intr = ar9003_intr;

sys/dev/ic/ar9003.c

177

ops->tx = ar9003_tx;

sys/dev/ic/ar9003.c

179

ops->set_rf_mode = ar9003_set_rf_mode;

sys/dev/ic/ar9003.c

180

ops->rf_bus_request = ar9003_rf_bus_request;

sys/dev/ic/ar9003.c

181

ops->rf_bus_release = ar9003_rf_bus_release;

sys/dev/ic/ar9003.c

182

ops->set_phy = ar9003_set_phy;

sys/dev/ic/ar9003.c

183

ops->set_delta_slope = ar9003_set_delta_slope;

sys/dev/ic/ar9003.c

184

ops->enable_antenna_diversity = ar9003_enable_antenna_diversity;

sys/dev/ic/ar9003.c

185

ops->init_baseband = ar9003_init_baseband;

sys/dev/ic/ar9003.c

186

ops->disable_phy = ar9003_disable_phy;

sys/dev/ic/ar9003.c

187

ops->set_rxchains = ar9003_set_rxchains;

sys/dev/ic/ar9003.c

188

ops->noisefloor_calib = ar9003_do_noisefloor_calib;

sys/dev/ic/ar9003.c

189

ops->init_noisefloor_calib = ar9003_init_noisefloor_calib;

sys/dev/ic/ar9003.c

190

ops->get_noisefloor = ar9003_get_noisefloor;

sys/dev/ic/ar9003.c

191

ops->apply_noisefloor = ar9003_apply_noisefloor;

sys/dev/ic/ar9003.c

192

ops->do_calib = ar9003_do_calib;

sys/dev/ic/ar9003.c

193

ops->next_calib = ar9003_next_calib;

sys/dev/ic/ar9003.c

194

ops->hw_init = ar9003_hw_init;

sys/dev/ic/ar9003.c

196

ops->set_noise_immunity_level = ar9003_set_noise_immunity_level;

sys/dev/ic/ar9003.c

197

ops->enable_ofdm_weak_signal = ar9003_enable_ofdm_weak_signal;

sys/dev/ic/ar9003.c

198

ops->disable_ofdm_weak_signal = ar9003_disable_ofdm_weak_signal;

sys/dev/ic/ar9003.c

199

ops->set_cck_weak_signal = ar9003_set_cck_weak_signal;

sys/dev/ic/ar9003.c

200

ops->set_firstep_level = ar9003_set_firstep_level;

sys/dev/ic/ar9003.c

201

ops->set_spur_immunity_level = ar9003_set_spur_immunity_level;

sys/dev/ic/ar9003.c

227

ops->setup(sc);

sys/dev/ic/ar9003.c

2429

struct athn_ops *ops = &sc->ops;

sys/dev/ic/ar9003.c

2434

ops->get_paprd_masks(sc, c, &ht20mask, &ht40mask);

sys/dev/ic/ar9003.c

3109

struct athn_ops *ops = &sc->ops;

sys/dev/ic/ar9003.c

3190

ops->set_txpower(sc, c, extc);

sys/dev/ic/ar9003.c

340

struct athn_ops *ops = &sc->ops;

sys/dev/ic/ar9003.c

345

ops->read_rom_data = ar9003_read_eep_data;

sys/dev/ic/ar9003.c

349

error = ops->read_rom_data(sc, sc->eep_base, &hdr, sizeof(hdr));

sys/dev/ic/ar9003.c

355

error = ops->read_rom_data(sc, sc->eep_base, &hdr, sizeof(hdr));

sys/dev/ic/ar9003.c

360

ops->read_rom_data = ar9003_read_otp_data;

sys/dev/ic/ar9003.c

364

error = ops->read_rom_data(sc, sc->eep_base, &hdr, sizeof(hdr));

sys/dev/ic/ar9003.c

370

error = ops->read_rom_data(sc, sc->eep_base, &hdr, sizeof(hdr));

sys/dev/ic/ar9003.c

387

def = sc->ops.get_rom_template(sc, ref);

sys/dev/ic/ar9003.c

428

struct athn_ops *ops = &sc->ops;

sys/dev/ic/ar9003.c

448

error = ops->read_rom_data(sc, addr, &hdr, sizeof(hdr));

sys/dev/ic/ar9003.c

464

error = ops->read_rom_data(sc, addr, buf, len);

sys/dev/ic/ar9003.c

470

error = ops->read_rom_data(sc, addr, &sum, sizeof(sum));

sys/dev/ic/ar9003.c

491

ops->swap_rom(sc);

sys/dev/ic/ar9280.c

100

sc->ops.swap_rom = ar5416_swap_rom;

sys/dev/ic/ar9280.c

101

sc->ops.init_from_rom = ar9280_init_from_rom;

sys/dev/ic/ar9280.c

102

sc->ops.set_txpower = ar5416_set_txpower;

sys/dev/ic/ar9280.c

103

sc->ops.set_synth = ar9280_set_synth;

sys/dev/ic/ar9280.c

104

sc->ops.spur_mitigate = ar9280_spur_mitigate;

sys/dev/ic/ar9280.c

105

sc->ops.get_spur_chans = ar5416_get_spur_chans;

sys/dev/ic/ar9280.c

106

sc->ops.olpc_init = ar9280_olpc_init;

sys/dev/ic/ar9280.c

107

sc->ops.olpc_temp_compensation = ar9280_olpc_temp_compensation;

sys/dev/ic/ar9280.c

478

spurchans = sc->ops.get_spur_chans(sc, IEEE80211_IS_CHAN_2GHZ(c));

sys/dev/ic/ar9280.c

99

sc->ops.setup = ar9280_setup;

sys/dev/ic/ar9285.c

110

sc->ops.setup = ar9285_setup;

sys/dev/ic/ar9285.c

111

sc->ops.swap_rom = ar9285_swap_rom;

sys/dev/ic/ar9285.c

112

sc->ops.init_from_rom = ar9285_init_from_rom;

sys/dev/ic/ar9285.c

113

sc->ops.set_txpower = ar9285_set_txpower;

sys/dev/ic/ar9285.c

114

sc->ops.set_synth = ar9280_set_synth;

sys/dev/ic/ar9285.c

115

sc->ops.spur_mitigate = ar9280_spur_mitigate;

sys/dev/ic/ar9285.c

116

sc->ops.get_spur_chans = ar9285_get_spur_chans;

sys/dev/ic/ar9287.c

109

sc->ops.setup = ar9287_setup;

sys/dev/ic/ar9287.c

110

sc->ops.swap_rom = ar9287_swap_rom;

sys/dev/ic/ar9287.c

111

sc->ops.init_from_rom = ar9287_init_from_rom;

sys/dev/ic/ar9287.c

112

sc->ops.set_txpower = ar9287_set_txpower;

sys/dev/ic/ar9287.c

113

sc->ops.set_synth = ar9280_set_synth;

sys/dev/ic/ar9287.c

114

sc->ops.spur_mitigate = ar9280_spur_mitigate;

sys/dev/ic/ar9287.c

115

sc->ops.get_spur_chans = ar9287_get_spur_chans;

sys/dev/ic/ar9287.c

116

sc->ops.olpc_init = ar9287_olpc_init;

sys/dev/ic/ar9287.c

117

sc->ops.olpc_temp_compensation = ar9287_olpc_temp_compensation;

sys/dev/ic/ar9380.c

104

sc->ops.setup = ar9380_setup;

sys/dev/ic/ar9380.c

105

sc->ops.get_rom_template = ar9380_get_rom_template;

sys/dev/ic/ar9380.c

106

sc->ops.swap_rom = ar9380_swap_rom;

sys/dev/ic/ar9380.c

107

sc->ops.init_from_rom = ar9380_init_from_rom;

sys/dev/ic/ar9380.c

108

sc->ops.set_txpower = ar9380_set_txpower;

sys/dev/ic/ar9380.c

109

sc->ops.set_synth = ar9380_set_synth;

sys/dev/ic/ar9380.c

110

sc->ops.spur_mitigate = ar9380_spur_mitigate;

sys/dev/ic/ar9380.c

111

sc->ops.get_paprd_masks = ar9380_get_paprd_masks;

sys/dev/ic/athn.c

1117

struct athn_ops *ops = &sc->ops;

sys/dev/ic/athn.c

1119

ops->gpio_config_output(sc, sc->led_pin, AR_GPIO_OUTPUT_MUX_AS_OUTPUT);

sys/dev/ic/athn.c

1127

struct athn_ops *ops = &sc->ops;

sys/dev/ic/athn.c

1130

ops->gpio_write(sc, sc->led_pin, !sc->led_state);

sys/dev/ic/athn.c

1137

struct athn_ops *ops = &sc->ops;

sys/dev/ic/athn.c

1154

ops->gpio_config_input(sc, AR_GPIO_BTACTIVE_PIN);

sys/dev/ic/athn.c

1168

ops->gpio_config_input(sc, AR_GPIO_BTACTIVE_PIN);

sys/dev/ic/athn.c

1169

ops->gpio_config_input(sc, AR_GPIO_BTPRIORITY_PIN);

sys/dev/ic/athn.c

1176

struct athn_ops *ops = &sc->ops;

sys/dev/ic/athn.c

1198

ops->gpio_config_output(sc, AR_GPIO_WLANACTIVE_PIN,

sys/dev/ic/athn.c

1202

ops->gpio_config_output(sc, AR_GPIO_WLANACTIVE_PIN,

sys/dev/ic/athn.c

1221

struct athn_ops *ops = &sc->ops;

sys/dev/ic/athn.c

1223

ops->gpio_write(sc, AR_GPIO_WLANACTIVE_PIN, 0);

sys/dev/ic/athn.c

1225

ops->gpio_config_output(sc, AR_GPIO_WLANACTIVE_PIN,

sys/dev/ic/athn.c

1335

sc->ops.noisefloor_calib(sc);

sys/dev/ic/athn.c

1343

struct athn_ops *ops = &sc->ops;

sys/dev/ic/athn.c

1361

if (sc->nf_calib_pending && ops->get_noisefloor(sc)) {

sys/dev/ic/athn.c

1365

ops->apply_noisefloor(sc);

sys/dev/ic/athn.c

1375

ops->olpc_temp_compensation(sc);

sys/dev/ic/athn.c

1385

ops->next_calib(sc);

sys/dev/ic/athn.c

1391

ops->do_calib(sc);

sys/dev/ic/athn.c

1409

struct athn_ops *ops = &sc->ops;

sys/dev/ic/athn.c

1434

ops->init_noisefloor_calib(sc);

sys/dev/ic/athn.c

1471

struct athn_ops *ops = &sc->ops;

sys/dev/ic/athn.c

1477

ops->set_noise_immunity_level(sc, ani->noise_immunity_level);

sys/dev/ic/athn.c

1484

ops->set_spur_immunity_level(sc, ani->spur_immunity_level);

sys/dev/ic/athn.c

1492

ops->set_firstep_level(sc, ani->firstep_level);

sys/dev/ic/athn.c

1505

ops->disable_ofdm_weak_signal(sc);

sys/dev/ic/athn.c

1507

ops->set_spur_immunity_level(sc, 0);

sys/dev/ic/athn.c

1510

ops->set_firstep_level(sc, ani->firstep_level);

sys/dev/ic/athn.c

1519

ops->enable_ofdm_weak_signal(sc);

sys/dev/ic/athn.c

1523

ops->set_firstep_level(sc, ani->firstep_level);

sys/dev/ic/athn.c

1533

ops->disable_ofdm_weak_signal(sc);

sys/dev/ic/athn.c

1537

ops->set_firstep_level(sc, 0);

sys/dev/ic/athn.c

1546

struct athn_ops *ops = &sc->ops;

sys/dev/ic/athn.c

1552

ops->set_noise_immunity_level(sc, ani->noise_immunity_level);

sys/dev/ic/athn.c

1560

ops->set_firstep_level(sc, ani->firstep_level);

sys/dev/ic/athn.c

1573

ops->set_firstep_level(sc, ani->firstep_level);

sys/dev/ic/athn.c

1582

ops->set_firstep_level(sc, 0);

sys/dev/ic/athn.c

1591

struct athn_ops *ops = &sc->ops;

sys/dev/ic/athn.c

1598

ops->set_firstep_level(sc, ani->firstep_level);

sys/dev/ic/athn.c

1616

ops->enable_ofdm_weak_signal(sc);

sys/dev/ic/athn.c

1621

ops->set_firstep_level(sc, ani->firstep_level);

sys/dev/ic/athn.c

1628

ops->set_firstep_level(sc, ani->firstep_level);

sys/dev/ic/athn.c

1638

ops->set_spur_immunity_level(sc, ani->spur_immunity_level);

sys/dev/ic/athn.c

1641

ops->set_noise_immunity_level(sc, ani->noise_immunity_level);

sys/dev/ic/athn.c

2243

struct athn_ops *ops = &sc->ops;

sys/dev/ic/athn.c

2263

ops->disable_phy(sc);

sys/dev/ic/athn.c

2292

ops->set_rf_mode(sc, c);

sys/dev/ic/athn.c

2296

reg = ops->gpio_read(sc, sc->rfsilent_pin);

sys/dev/ic/athn.c

2323

ops->hw_init(sc, c, extc);

sys/dev/ic/athn.c

2346

ops->set_delta_slope(sc, c, extc);

sys/dev/ic/athn.c

2348

ops->spur_mitigate(sc, c, extc);

sys/dev/ic/athn.c

2349

ops->init_from_rom(sc, c, extc);

sys/dev/ic/athn.c

2371

if ((error = ops->set_synth(sc, c, extc)) != 0) {

sys/dev/ic/athn.c

2437

ops->init_baseband(sc);

sys/dev/ic/athn.c

2445

ops->set_rxchains(sc);

sys/dev/ic/athn.c

2663

sc->ops.do_calib(sc);

sys/dev/ic/athn.c

272

error = sc->ops.dma_alloc(sc);

sys/dev/ic/athn.c

2857

if (sc->ops.tx(sc, m, ni, 0) != 0) {

sys/dev/ic/athn.c

3002

struct athn_ops *ops = &sc->ops;

sys/dev/ic/athn.c

3031

ops->enable_antenna_diversity(sc);

sys/dev/ic/athn.c

3044

ops->rfsilent_init(sc);

sys/dev/ic/athn.c

411

sc->ops.dma_free(sc);

sys/dev/ic/athn.c

481

sc->ops.rx_enable(sc);

sys/dev/ic/athn.c

559

return (sc->ops.intr(sc));

sys/dev/ic/athn.c

874

struct athn_ops *ops = &sc->ops;

sys/dev/ic/athn.c

883

if ((error = ops->rf_bus_request(sc)) != 0)

sys/dev/ic/athn.c

886

ops->set_phy(sc, c, extc);

sys/dev/ic/athn.c

889

if ((error = ops->set_synth(sc, c, extc)) != 0)

sys/dev/ic/athn.c

896

ops->set_txpower(sc, c, extc);

sys/dev/ic/athn.c

899

ops->rf_bus_release(sc);

sys/dev/ic/athn.c

903

ops->set_delta_slope(sc, c, extc);

sys/dev/ic/athn.c

905

ops->spur_mitigate(sc, c, extc);

sys/dev/ic/athnreg.h

1472

(sc)->ops.read((sc), (reg))

sys/dev/ic/athnreg.h

1475

(sc)->ops.write((sc), (reg), (val))

sys/dev/ic/athnreg.h

1478

(sc)->ops.write_barrier((sc))

sys/dev/ic/athnvar.h

547

struct athn_ops ops;

sys/dev/ic/atwvar.h

357

#define ATW_CDTXSYNC(sc, x, n, ops) \

sys/dev/ic/atwvar.h

368

(ATW_NTXDESC - __x), (ops)); \

sys/dev/ic/atwvar.h

375

ATW_CDTXOFF(__x), sizeof(struct atw_txdesc) * __n, (ops)); \

sys/dev/ic/atwvar.h

378

#define ATW_CDRXSYNC(sc, x, ops) \

sys/dev/ic/atwvar.h

380

ATW_CDRXOFF((x)), sizeof(struct atw_rxdesc), (ops))

sys/dev/ic/dl10019.c

200

const struct mii_bitbang_ops *ops;

sys/dev/ic/dl10019.c

202

ops = (nsc->sc_type == NE2000_TYPE_DL10022) ?

sys/dev/ic/dl10019.c

205

return (mii_bitbang_readreg(self, ops, phy, reg));

sys/dev/ic/dl10019.c

212

const struct mii_bitbang_ops *ops;

sys/dev/ic/dl10019.c

214

ops = (nsc->sc_type == NE2000_TYPE_DL10022) ?

sys/dev/ic/dl10019.c

217

mii_bitbang_writereg(self, ops, phy, reg, val);

sys/dev/ic/gemvar.h

231

#define GEM_CDTXSYNC(sc, x, n, ops) \

sys/dev/ic/gemvar.h

242

(GEM_NTXDESC - __x), (ops)); \

sys/dev/ic/gemvar.h

249

GEM_CDTXOFF(__x), sizeof(struct gem_desc) * __n, (ops)); \

sys/dev/ic/gemvar.h

252

#define GEM_CDRXSYNC(sc, x, ops) \

sys/dev/ic/gemvar.h

254

GEM_CDRXOFF((x)), sizeof(struct gem_desc), (ops))

sys/dev/ic/gemvar.h

256

#define GEM_CDSPSYNC(sc, ops) \

sys/dev/ic/gemvar.h

258

GEM_CDSPOFF, GEM_SETUP_PACKET_LEN, (ops))

sys/dev/ic/nvme.c

1642

nvme_dmamem_sync(struct nvme_softc *sc, struct nvme_dmamem *mem, int ops)

sys/dev/ic/nvme.c

1645

0, NVME_DMA_LEN(mem), ops);

sys/dev/ic/oosiopvar.h

56

#define OOSIOP_XFERSCR_SYNC(sc, cb, ops) \

sys/dev/ic/oosiopvar.h

58

OOSIOP_MSGINOFF - OOSIOP_DINSCROFF, (ops))

sys/dev/ic/oosiopvar.h

59

#define OOSIOP_DINSCR_SYNC(sc, cb, ops) \

sys/dev/ic/oosiopvar.h

61

OOSIOP_DOUTSCROFF - OOSIOP_DINSCROFF, (ops))

sys/dev/ic/oosiopvar.h

62

#define OOSIOP_DOUTSCR_SYNC(sc, cb, ops) \

sys/dev/ic/oosiopvar.h

64

OOSIOP_MSGINOFF - OOSIOP_DOUTSCROFF, (ops))

sys/dev/ic/oosiopvar.h

65

#define OOSIOP_XFERMSG_SYNC(sc, cb, ops) \

sys/dev/ic/oosiopvar.h

67

sizeof(struct oosiop_xfer) - OOSIOP_MSGINOFF, (ops))

sys/dev/ic/oosiopvar.h

69

#define OOSIOP_SCRIPT_SYNC(sc, ops) \

sys/dev/ic/oosiopvar.h

71

0, sizeof(oosiop_script), (ops))

sys/dev/ic/qwx.c

10403

ctrl_reg_val = sc->ops.read32(sc, HAL_SEQ_WCSS_UMAC_TCL_REG +

sys/dev/ic/qwx.c

10408

sc->ops.write32(sc, HAL_SEQ_WCSS_UMAC_TCL_REG +

sys/dev/ic/qwx.c

10439

sc->ops.write32(sc, addr, *(uint32_t *)&hw_map_val[i]);

sys/dev/ic/qwx.c

10444

ctrl_reg_val = sc->ops.read32(sc, HAL_SEQ_WCSS_UMAC_TCL_REG +

sys/dev/ic/qwx.c

10447

sc->ops.write32(sc, HAL_SEQ_WCSS_UMAC_TCL_REG +

sys/dev/ic/qwx.c

1288

val = sc->ops.read32(sc, reo_base + HAL_REO1_GEN_ENABLE);

sys/dev/ic/qwx.c

1295

sc->ops.write32(sc, reo_base + HAL_REO1_GEN_ENABLE, val);

sys/dev/ic/qwx.c

1297

sc->ops.write32(sc, reo_base + HAL_REO1_AGING_THRESH_IX_0(sc),

sys/dev/ic/qwx.c

1299

sc->ops.write32(sc, reo_base + HAL_REO1_AGING_THRESH_IX_1(sc),

sys/dev/ic/qwx.c

1301

sc->ops.write32(sc, reo_base + HAL_REO1_AGING_THRESH_IX_2(sc),

sys/dev/ic/qwx.c

1303

sc->ops.write32(sc, reo_base + HAL_REO1_AGING_THRESH_IX_3(sc),

sys/dev/ic/qwx.c

1306

sc->ops.write32(sc, reo_base + HAL_REO1_DEST_RING_CTRL_IX_0,

sys/dev/ic/qwx.c

1308

sc->ops.write32(sc, reo_base + HAL_REO1_DEST_RING_CTRL_IX_1,

sys/dev/ic/qwx.c

1310

sc->ops.write32(sc, reo_base + HAL_REO1_DEST_RING_CTRL_IX_2,

sys/dev/ic/qwx.c

1312

sc->ops.write32(sc, reo_base + HAL_REO1_DEST_RING_CTRL_IX_3,

sys/dev/ic/qwx.c

1391

val = sc->ops.read32(sc, reo_base + HAL_REO1_GEN_ENABLE);

sys/dev/ic/qwx.c

1394

sc->ops.write32(sc, reo_base + HAL_REO1_GEN_ENABLE, val);

sys/dev/ic/qwx.c

1396

val = sc->ops.read32(sc, reo_base + HAL_REO1_MISC_CTL(sc));

sys/dev/ic/qwx.c

1400

sc->ops.write32(sc, reo_base + HAL_REO1_MISC_CTL(sc), val);

sys/dev/ic/qwx.c

1402

sc->ops.write32(sc, reo_base + HAL_REO1_AGING_THRESH_IX_0(sc),

sys/dev/ic/qwx.c

1404

sc->ops.write32(sc, reo_base + HAL_REO1_AGING_THRESH_IX_1(sc),

sys/dev/ic/qwx.c

1406

sc->ops.write32(sc, reo_base + HAL_REO1_AGING_THRESH_IX_2(sc),

sys/dev/ic/qwx.c

1408

sc->ops.write32(sc, reo_base + HAL_REO1_AGING_THRESH_IX_3(sc),

sys/dev/ic/qwx.c

1411

sc->ops.write32(sc, reo_base + HAL_REO1_DEST_RING_CTRL_IX_2,

sys/dev/ic/qwx.c

1413

sc->ops.write32(sc, reo_base + HAL_REO1_DEST_RING_CTRL_IX_3,

sys/dev/ic/qwx.c

1433

val = sc->ops.read32(sc, reo_base + HAL_REO1_GEN_ENABLE);

sys/dev/ic/qwx.c

1440

sc->ops.write32(sc, reo_base + HAL_REO1_GEN_ENABLE, val);

sys/dev/ic/qwx.c

1442

sc->ops.write32(sc, reo_base + HAL_REO1_AGING_THRESH_IX_0(sc),

sys/dev/ic/qwx.c

1444

sc->ops.write32(sc, reo_base + HAL_REO1_AGING_THRESH_IX_1(sc),

sys/dev/ic/qwx.c

1446

sc->ops.write32(sc, reo_base + HAL_REO1_AGING_THRESH_IX_2(sc),

sys/dev/ic/qwx.c

1448

sc->ops.write32(sc, reo_base + HAL_REO1_AGING_THRESH_IX_3(sc),

sys/dev/ic/qwx.c

1451

sc->ops.write32(sc, reo_base + HAL_REO1_DEST_RING_CTRL_IX_0,

sys/dev/ic/qwx.c

14512

status = sc->ops.map_service_to_pipe(htc->sc, ep->service_id,

sys/dev/ic/qwx.c

1453

sc->ops.write32(sc, reo_base + HAL_REO1_DEST_RING_CTRL_IX_1,

sys/dev/ic/qwx.c

1455

sc->ops.write32(sc, reo_base + HAL_REO1_DEST_RING_CTRL_IX_2,

sys/dev/ic/qwx.c

1457

sc->ops.write32(sc, reo_base + HAL_REO1_DEST_RING_CTRL_IX_3,

sys/dev/ic/qwx.c

20330

ret = sc->ops.start(sc);

sys/dev/ic/qwx.c

20430

sc->ops.stop(sc);

sys/dev/ic/qwx.c

20484

sc->ops.stop(sc);

sys/dev/ic/qwx.c

20553

sc->ops.irq_disable(sc);

sys/dev/ic/qwx.c

20560

sc->ops.power_down(sc);

sys/dev/ic/qwx.c

20642

sc->ops.irq_enable(sc);

sys/dev/ic/qwx.c

20756

error = sc->ops.power_up(sc);

sys/dev/ic/qwx.c

21311

sc->ops.write32(sc,

sys/dev/ic/qwx.c

21318

sc->ops.write32(sc,

sys/dev/ic/qwx.c

21321

sc->ops.write32(sc,

sys/dev/ic/qwx.c

21326

sc->ops.write32(sc, reg_base, srng->ring_base_paddr);

sys/dev/ic/qwx.c

21332

sc->ops.write32(sc,

sys/dev/ic/qwx.c

21337

sc->ops.write32(sc, reg_base + HAL_REO1_RING_ID_OFFSET(sc), val);

sys/dev/ic/qwx.c

21346

sc->ops.write32(sc,

sys/dev/ic/qwx.c

21351

sc->ops.write32(sc, reg_base + HAL_REO1_RING_HP_ADDR_LSB_OFFSET(sc),

sys/dev/ic/qwx.c

21353

sc->ops.write32(sc, reg_base + HAL_REO1_RING_HP_ADDR_MSB_OFFSET(sc),

sys/dev/ic/qwx.c

21358

sc->ops.write32(sc, reg_base, 0);

sys/dev/ic/qwx.c

21359

sc->ops.write32(sc, reg_base + HAL_REO1_RING_TP_OFFSET(sc), 0);

sys/dev/ic/qwx.c

21372

sc->ops.write32(sc, reg_base + HAL_REO1_RING_MISC_OFFSET(sc), val);

sys/dev/ic/qwx.c

21386

sc->ops.write32(sc,

sys/dev/ic/qwx.c

21393

sc->ops.write32(sc,

sys/dev/ic/qwx.c

21397

sc->ops.write32(sc,

sys/dev/ic/qwx.c

21402

sc->ops.write32(sc, reg_base, srng->ring_base_paddr);

sys/dev/ic/qwx.c

21408

sc->ops.write32(sc, reg_base + HAL_TCL1_RING_BASE_MSB_OFFSET(sc), val);

sys/dev/ic/qwx.c

21411

sc->ops.write32(sc, reg_base + HAL_TCL1_RING_ID_OFFSET(sc), val);

sys/dev/ic/qwx.c

21414

sc->ops.write32(sc, reg_base, (uint32_t)srng->ring_base_paddr);

sys/dev/ic/qwx.c

21420

sc->ops.write32(sc,

sys/dev/ic/qwx.c

21434

sc->ops.write32(sc,

sys/dev/ic/qwx.c

21442

sc->ops.write32(sc,

sys/dev/ic/qwx.c

21449

sc->ops.write32(sc,

sys/dev/ic/qwx.c

21452

sc->ops.write32(sc,

sys/dev/ic/qwx.c

21459

sc->ops.write32(sc, reg_base, 0);

sys/dev/ic/qwx.c

21460

sc->ops.write32(sc, reg_base + HAL_TCL1_RING_TP_OFFSET, 0);

sys/dev/ic/qwx.c

21477

sc->ops.write32(sc, reg_base + HAL_TCL1_RING_MISC_OFFSET(sc), val);

sys/dev/ic/qwx.c

21500

val = sc->ops.read32(sc, addr);

sys/dev/ic/qwx.c

21504

sc->ops.write32(sc, addr, val);

sys/dev/ic/qwx.c

22403

ret = sc->ops.get_user_msi_vector(sc, "CE",

sys/dev/ic/qwx.c

26639

sc->ops.irq_enable(sc);

sys/dev/ic/qwx.c

26690

sc->ops.irq_disable(sc);

sys/dev/ic/qwx.c

7678

err = sc->ops.submit_xfer(sc, m);

sys/dev/ic/qwx.c

7744

err = sc->ops.submit_xfer(sc, m);

sys/dev/ic/qwx.c

8308

err = sc->ops.submit_xfer(sc, m);

sys/dev/ic/qwx.c

9623

ret = sc->ops.get_user_msi_vector(sc, "DP",

sys/dev/ic/qwx.c

9802

sc->ops.write32(sc,

sys/dev/ic/qwx.c

9807

sc->ops.write32(sc,

sys/dev/ic/qwx.c

9926

sc->ops.write32(sc,

sys/dev/ic/qwx.c

9930

sc->ops.write32(sc,

sys/dev/ic/qwx.c

9934

sc->ops.write32(sc,

sys/dev/ic/qwx.c

9938

sc->ops.write32(sc, HAL_SEQ_WCSS_UMAC_WBM_REG +

sys/dev/ic/qwx.c

9946

sc->ops.write32(sc,

sys/dev/ic/qwx.c

9950

sc->ops.write32(sc,

sys/dev/ic/qwx.c

9956

sc->ops.write32(sc,

sys/dev/ic/qwx.c

9961

sc->ops.write32(sc,

sys/dev/ic/qwx.c

9964

sc->ops.write32(sc,

sys/dev/ic/qwx.c

9969

sc->ops.write32(sc,

sys/dev/ic/qwx.c

9974

sc->ops.write32(sc,

sys/dev/ic/qwxvar.h

1973

struct qwx_ops ops;

sys/dev/ic/qwz.c

1017

val = sc->ops.read32(sc, reo_base + HAL_REO1_GEN_ENABLE);

sys/dev/ic/qwz.c

1020

sc->ops.write32(sc, reo_base + HAL_REO1_GEN_ENABLE, val);

sys/dev/ic/qwz.c

1022

val = sc->ops.read32(sc, reo_base + HAL_REO1_MISC_CTRL_ADDR(sc));

sys/dev/ic/qwz.c

1029

sc->ops.write32(sc, reo_base + HAL_REO1_MISC_CTRL_ADDR(sc), val);

sys/dev/ic/qwz.c

1031

sc->ops.write32(sc, reo_base + HAL_REO1_AGING_THRESH_IX_0(sc),

sys/dev/ic/qwz.c

1033

sc->ops.write32(sc, reo_base + HAL_REO1_AGING_THRESH_IX_1(sc),

sys/dev/ic/qwz.c

1035

sc->ops.write32(sc, reo_base + HAL_REO1_AGING_THRESH_IX_2(sc),

sys/dev/ic/qwz.c

1037

sc->ops.write32(sc, reo_base + HAL_REO1_AGING_THRESH_IX_3(sc),

sys/dev/ic/qwz.c

1040

sc->ops.write32(sc, reo_base + HAL_REO1_DEST_RING_CTRL_IX_2,

sys/dev/ic/qwz.c

1042

sc->ops.write32(sc, reo_base + HAL_REO1_DEST_RING_CTRL_IX_3,

sys/dev/ic/qwz.c

12179

status = sc->ops.map_service_to_pipe(htc->sc, ep->service_id,

sys/dev/ic/qwz.c

17610

ret = sc->ops.start(sc);

sys/dev/ic/qwz.c

17713

sc->ops.stop(sc);

sys/dev/ic/qwz.c

17725

sc->ops.stop(sc);

sys/dev/ic/qwz.c

17794

sc->ops.irq_disable(sc);

sys/dev/ic/qwz.c

17801

sc->ops.power_down(sc);

sys/dev/ic/qwz.c

17884

sc->ops.irq_enable(sc);

sys/dev/ic/qwz.c

18005

error = sc->ops.power_up(sc);

sys/dev/ic/qwz.c

18613

sc->ops.write32(sc,

sys/dev/ic/qwz.c

18620

sc->ops.write32(sc,

sys/dev/ic/qwz.c

18623

sc->ops.write32(sc,

sys/dev/ic/qwz.c

18628

sc->ops.write32(sc, reg_base, srng->ring_base_paddr);

sys/dev/ic/qwz.c

18634

sc->ops.write32(sc,

sys/dev/ic/qwz.c

18639

sc->ops.write32(sc, reg_base + HAL_REO1_RING_ID_OFFSET(sc), val);

sys/dev/ic/qwz.c

18648

sc->ops.write32(sc,

sys/dev/ic/qwz.c

18653

sc->ops.write32(sc, reg_base + HAL_REO1_RING_HP_ADDR_LSB_OFFSET(sc),

sys/dev/ic/qwz.c

18655

sc->ops.write32(sc, reg_base + HAL_REO1_RING_HP_ADDR_MSB_OFFSET(sc),

sys/dev/ic/qwz.c

18660

sc->ops.write32(sc, reg_base, 0);

sys/dev/ic/qwz.c

18661

sc->ops.write32(sc, reg_base + HAL_REO1_RING_TP_OFFSET, 0);

sys/dev/ic/qwz.c

18674

sc->ops.write32(sc, reg_base + HAL_REO1_RING_MISC_OFFSET(sc), val);

sys/dev/ic/qwz.c

18688

sc->ops.write32(sc,

sys/dev/ic/qwz.c

18695

sc->ops.write32(sc,

sys/dev/ic/qwz.c

18699

sc->ops.write32(sc,

sys/dev/ic/qwz.c

18704

sc->ops.write32(sc, reg_base, srng->ring_base_paddr);

sys/dev/ic/qwz.c

18710

sc->ops.write32(sc, reg_base + HAL_TCL1_RING_BASE_MSB_OFFSET, val);

sys/dev/ic/qwz.c

18713

sc->ops.write32(sc, reg_base + HAL_TCL1_RING_ID_OFFSET(sc), val);

sys/dev/ic/qwz.c

18725

sc->ops.write32(sc,

sys/dev/ic/qwz.c

18733

sc->ops.write32(sc,

sys/dev/ic/qwz.c

18740

sc->ops.write32(sc,

sys/dev/ic/qwz.c

18743

sc->ops.write32(sc,

sys/dev/ic/qwz.c

18750

sc->ops.write32(sc, reg_base, 0);

sys/dev/ic/qwz.c

18751

sc->ops.write32(sc, reg_base + HAL_TCL1_RING_TP_OFFSET, 0);

sys/dev/ic/qwz.c

18771

sc->ops.write32(sc, reg_base + HAL_TCL1_RING_MISC_OFFSET(sc), val);

sys/dev/ic/qwz.c

18794

val = sc->ops.read32(sc, addr);

sys/dev/ic/qwz.c

18798

sc->ops.write32(sc, addr, val);

sys/dev/ic/qwz.c

19648

ret = sc->ops.get_user_msi_vector(sc, "CE",

sys/dev/ic/qwz.c

23397

sc->ops.irq_enable(sc);

sys/dev/ic/qwz.c

23411

sc->ops.irq_disable(sc);

sys/dev/ic/qwz.c

5161

err = sc->ops.submit_xfer(sc, m);

sys/dev/ic/qwz.c

5227

err = sc->ops.submit_xfer(sc, m);

sys/dev/ic/qwz.c

5791

err = sc->ops.submit_xfer(sc, m);

sys/dev/ic/qwz.c

6981

ret = sc->ops.get_user_msi_vector(sc, "DP",

sys/dev/ic/qwz.c

7135

sc->ops.write32(sc,

sys/dev/ic/qwz.c

7140

sc->ops.write32(sc,

sys/dev/ic/qwz.c

7260

sc->ops.write32(sc,

sys/dev/ic/qwz.c

7264

sc->ops.write32(sc,

sys/dev/ic/qwz.c

7268

sc->ops.write32(sc,

sys/dev/ic/qwz.c

7272

sc->ops.write32(sc, HAL_SEQ_WCSS_UMAC_WBM_REG +

sys/dev/ic/qwz.c

7280

sc->ops.write32(sc,

sys/dev/ic/qwz.c

7284

sc->ops.write32(sc,

sys/dev/ic/qwz.c

7290

sc->ops.write32(sc,

sys/dev/ic/qwz.c

7295

sc->ops.write32(sc,

sys/dev/ic/qwz.c

7298

sc->ops.write32(sc,

sys/dev/ic/qwz.c

7303

sc->ops.write32(sc,

sys/dev/ic/qwz.c

7310

sc->ops.write32(sc,

sys/dev/ic/qwz.c

7668

ctrl_reg_val = sc->ops.read32(sc, HAL_SEQ_WCSS_UMAC_TCL_REG +

sys/dev/ic/qwz.c

7673

sc->ops.write32(sc, HAL_SEQ_WCSS_UMAC_TCL_REG +

sys/dev/ic/qwz.c

7704

sc->ops.write32(sc, addr, *(uint32_t *)&hw_map_val[i]);

sys/dev/ic/qwz.c

7709

ctrl_reg_val = sc->ops.read32(sc, HAL_SEQ_WCSS_UMAC_TCL_REG +

sys/dev/ic/qwz.c

7712

sc->ops.write32(sc, HAL_SEQ_WCSS_UMAC_TCL_REG +

sys/dev/ic/qwz.c

8177

sc->ops.write32(sc, cmem_base + ATH12K_PPT_ADDR_OFFSET(i),

sys/dev/ic/qwz.c

8191

sc->ops.write32(sc, reo_base + HAL_REO1_SW_COOKIE_CFG0(sc), cmem_base);

sys/dev/ic/qwz.c

8200

sc->ops.write32(sc, reo_base + HAL_REO1_SW_COOKIE_CFG1(sc), val);

sys/dev/ic/qwz.c

8203

sc->ops.write32(sc, wbm_base + HAL_WBM_SW_COOKIE_CFG0, cmem_base);

sys/dev/ic/qwz.c

8210

sc->ops.write32(sc, wbm_base + HAL_WBM_SW_COOKIE_CFG1, val);

sys/dev/ic/qwz.c

8213

val = sc->ops.read32(sc, wbm_base + HAL_WBM_SW_COOKIE_CFG2);

sys/dev/ic/qwz.c

8218

sc->ops.write32(sc, wbm_base + HAL_WBM_SW_COOKIE_CFG2, val);

sys/dev/ic/qwz.c

8221

val = sc->ops.read32(sc, wbm_base + HAL_WBM_SW_COOKIE_CONVERT_CFG);

sys/dev/ic/qwz.c

8225

sc->ops.write32(sc, wbm_base + HAL_WBM_SW_COOKIE_CONVERT_CFG, val);

sys/dev/ic/qwzvar.h

2042

struct qwz_ops ops;

sys/dev/ic/rtl81x9reg.h

759

#define RL_TXDESCSYNC(sc, idx, ops) \

sys/dev/ic/rtl81x9reg.h

764

(ops))

sys/dev/ic/rtl81x9reg.h

765

#define RL_RXDESCSYNC(sc, idx, ops) \

sys/dev/ic/rtl81x9reg.h

770

(ops))

sys/dev/ic/rtw.c

879

rtw_rxdescs_sync(struct rtw_rxdesc_blk *rdb, int desc0, int nsync, int ops)

sys/dev/ic/rtw.c

886

sizeof(struct rtw_rxdesc) * (rdb->rdb_ndesc - desc0), ops);

sys/dev/ic/rtw.c

898

sizeof(struct rtw_rxdesc) * nsync, ops);

sys/dev/ic/rtw.c

902

rtw_txdescs_sync(struct rtw_txdesc_blk *tdb, u_int desc0, u_int nsync, int ops)

sys/dev/ic/rtw.c

909

ops);

sys/dev/ic/rtw.c

917

sizeof(struct rtw_txdesc) * nsync, ops);

sys/dev/ic/siop.c

125

siop_table_sync(struct siop_cmd *siop_cmd, int ops)

sys/dev/ic/siop.c

134

sizeof(struct siop_xfer), ops);

sys/dev/ic/siop.c

138

siop_script_sync(struct siop_softc *sc, int ops)

sys/dev/ic/siop.c

142

PAGE_SIZE, ops);

sys/dev/ic/smc83c170var.h

147

#define EPIC_CDTXSYNC(sc, x, ops) \

sys/dev/ic/smc83c170var.h

149

EPIC_CDTXOFF((x)), sizeof(struct epic_txdesc), (ops))

sys/dev/ic/smc83c170var.h

151

#define EPIC_CDRXSYNC(sc, x, ops) \

sys/dev/ic/smc83c170var.h

153

EPIC_CDRXOFF((x)), sizeof(struct epic_rxdesc), (ops))

sys/dev/ic/smc83c170var.h

155

#define EPIC_CDFLSYNC(sc, x, ops) \

sys/dev/ic/smc83c170var.h

157

EPIC_CDFLOFF((x)), sizeof(struct epic_fraglist), (ops))

sys/dev/mii/mii_bitbang.c

114

mii_bitbang_readreg(struct device *sc, mii_bitbang_ops_t ops, int phy,

sys/dev/mii/mii_bitbang.c

119

mii_bitbang_sync(sc, ops);

sys/dev/mii/mii_bitbang.c

121

mii_bitbang_sendbits(sc, ops, MII_COMMAND_START, 2);

sys/dev/mii/mii_bitbang.c

122

mii_bitbang_sendbits(sc, ops, MII_COMMAND_READ, 2);

sys/dev/mii/mii_bitbang.c

123

mii_bitbang_sendbits(sc, ops, phy, 5);

sys/dev/mii/mii_bitbang.c

124

mii_bitbang_sendbits(sc, ops, reg, 5);

sys/dev/mii/mii_bitbang.c

162

mii_bitbang_writereg(struct device *sc, mii_bitbang_ops_t ops,

sys/dev/mii/mii_bitbang.c

166

mii_bitbang_sync(sc, ops);

sys/dev/mii/mii_bitbang.c

168

mii_bitbang_sendbits(sc, ops, MII_COMMAND_START, 2);

sys/dev/mii/mii_bitbang.c

169

mii_bitbang_sendbits(sc, ops, MII_COMMAND_WRITE, 2);

sys/dev/mii/mii_bitbang.c

170

mii_bitbang_sendbits(sc, ops, phy, 5);

sys/dev/mii/mii_bitbang.c

171

mii_bitbang_sendbits(sc, ops, reg, 5);

sys/dev/mii/mii_bitbang.c

172

mii_bitbang_sendbits(sc, ops, MII_COMMAND_ACK, 2);

sys/dev/mii/mii_bitbang.c

173

mii_bitbang_sendbits(sc, ops, val, 16);

sys/dev/mii/mii_bitbang.c

50

ops->mbo_write(sc, (x)); \

sys/dev/mii/mii_bitbang.c

54

#define READ ops->mbo_read(sc)

sys/dev/mii/mii_bitbang.c

56

#define MDO ops->mbo_bits[MII_BIT_MDO]

sys/dev/mii/mii_bitbang.c

57

#define MDI ops->mbo_bits[MII_BIT_MDI]

sys/dev/mii/mii_bitbang.c

58

#define MDC ops->mbo_bits[MII_BIT_MDC]

sys/dev/mii/mii_bitbang.c

59

#define MDIRPHY ops->mbo_bits[MII_BIT_DIR_HOST_PHY]

sys/dev/mii/mii_bitbang.c

60

#define MDIRHOST ops->mbo_bits[MII_BIT_DIR_PHY_HOST]

sys/dev/mii/mii_bitbang.c

68

mii_bitbang_sync(struct device *sc, mii_bitbang_ops_t ops)

sys/dev/mii/mii_bitbang.c

88

mii_bitbang_sendbits(struct device *sc, mii_bitbang_ops_t ops,

sys/dev/onewire/onewire_bitbang.c

30

onewire_bb_reset(const struct onewire_bbops *ops, void *arg)

sys/dev/onewire/onewire_bitbang.c

35

ops->bb_tx(arg);

sys/dev/onewire/onewire_bitbang.c

36

ops->bb_set(arg, 0);

sys/dev/onewire/onewire_bitbang.c

38

ops->bb_set(arg, 1);

sys/dev/onewire/onewire_bitbang.c

39

ops->bb_rx(arg);

sys/dev/onewire/onewire_bitbang.c

42

if ((rv = ops->bb_get(arg)) == 0)

sys/dev/onewire/onewire_bitbang.c

53

onewire_bb_bit(const struct onewire_bbops *ops, void *arg, int value)

sys/dev/onewire/onewire_bitbang.c

58

ops->bb_tx(arg);

sys/dev/onewire/onewire_bitbang.c

59

ops->bb_set(arg, 0);

sys/dev/onewire/onewire_bitbang.c

63

ops->bb_set(arg, 1);

sys/dev/onewire/onewire_bitbang.c

64

ops->bb_rx(arg);

sys/dev/onewire/onewire_bitbang.c

66

if ((rv = ops->bb_get(arg)) == 0)

sys/dev/onewire/onewire_bitbang.c

70

ops->bb_tx(arg);

sys/dev/onewire/onewire_bitbang.c

73

ops->bb_set(arg, 1);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd.c

550

if (dma_buf->ops != &amdgpu_dmabuf_ops)

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

93

if (f->ops == &amdkfd_fence_ops)

sys/dev/pci/drm/amd/amdgpu/amdgpu_cgs.c

409

cgs_device->base.ops = &amdgpu_cgs_ops;

sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c

1866

fence = sched->ops->run_job(s_job);

sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c

1901

sched->ops->free_job(s_job);

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

3099

.ops = &amdgpu_sched_ops,

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

5025

adev->virt.ops = NULL;

sys/dev/pci/drm/amd/amdgpu/amdgpu_dma_buf.c

390

buf->ops = &amdgpu_dmabuf_ops;

sys/dev/pci/drm/amd/amdgpu/amdgpu_dma_buf.c

419

if (dma_buf->ops == &amdgpu_dmabuf_ops) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_dma_buf.c

544

if (dma_buf->ops == &amdgpu_dmabuf_ops) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_dma_buf.c

599

if (dma_buf->ops != &amdgpu_dmabuf_ops)

sys/dev/pci/drm/amd/amdgpu/amdgpu_fence.c

53

if (__f->base.ops == &amdgpu_fence_ops ||

sys/dev/pci/drm/amd/amdgpu/amdgpu_fence.c

54

__f->base.ops == &amdgpu_job_fence_ops)

sys/dev/pci/drm/amd/amdgpu/amdgpu_fence.c

635

if (ring->sched.ops)

sys/dev/pci/drm/amd/amdgpu/amdgpu_fence.c

690

if (old && old->ops == &amdgpu_job_fence_ops) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_job.c

254

if (job->base.s_fence && job->base.s_fence->finished.ops)

sys/dev/pci/drm/amd/amdgpu/amdgpu_job.c

256

else if (job->hw_fence.base.ops)

sys/dev/pci/drm/amd/amdgpu/amdgpu_job.c

274

if (!job->hw_fence.base.ops)

sys/dev/pci/drm/amd/amdgpu/amdgpu_job.c

306

if (!job->hw_fence.base.ops)

sys/dev/pci/drm/amd/amdgpu/amdgpu_psp.h

161

int (*mem_training)(struct psp_context *psp, uint32_t ops);

sys/dev/pci/drm/amd/amdgpu/amdgpu_psp.h

490

#define psp_mem_training(psp, ops) \

sys/dev/pci/drm/amd/amdgpu/amdgpu_psp.h

491

((psp)->funcs->mem_training ? (psp)->funcs->mem_training((psp), (ops)) : 0)

sys/dev/pci/drm/amd/amdgpu/amdgpu_trace.h

36

job->base.s_fence->finished.ops->get_timeline_name(&job->base.s_fence->finished)

sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.c

260

if (adev->virt.ops && adev->virt.ops->ras_poison_handler)

sys/dev/pci/drm/amd/amdgpu/amdgpu_umc.c

261

adev->virt.ops->ras_poison_handler(adev, block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_userq_fence.c

70

if (!f || f->ops != &amdgpu_userq_fence_ops)

sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c

1276

if (adev->virt.ops && adev->virt.ops->ras_poison_handler)

sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c

1277

adev->virt.ops->ras_poison_handler(adev, ras_if->block);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vf_error.c

58

(!adev->virt.ops) || (!adev->virt.ops->trans_msg)) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_vf_error.c

82

adev->virt.ops->trans_msg(adev, IDH_LOG_VF_ERROR, data1, data2, data3);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

113

if (virt->ops && virt->ops->rel_full_gpu) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

114

r = virt->ops->rel_full_gpu(adev, init);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1331

if (!virt->ops || !virt->ops->req_ras_err_count)

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

134

if (virt->ops && virt->ops->reset_gpu) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1340

if (!virt->ops->req_ras_err_count(adev))

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

135

r = virt->ops->reset_gpu(adev);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1438

if (!virt->ops || !virt->ops->req_ras_cper_dump)

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1442

if (!virt->ops->req_ras_cper_dump(adev, virt->ras.cper_rptr))

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

149

if (virt->ops && virt->ops->req_init_data)

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

150

virt->ops->req_init_data(adev);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1506

if (virt->ops && virt->ops->req_bad_pages)

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1507

virt->ops->req_bad_pages(adev);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1544

if (!virt->ops || !virt->ops->req_ras_chk_criti)

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1553

if (!virt->ops->req_ras_chk_criti(adev, addr))

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

168

if (virt->ops && virt->ops->reset_gpu)

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

169

virt->ops->ready_to_reset(adev);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

182

if (!virt->ops || !virt->ops->wait_reset)

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

185

return virt->ops->wait_reset(adev);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

245

if (!virt->ops || !virt->ops->rcvd_ras_intr)

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

248

return virt->ops->rcvd_ras_intr(adev);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

88

if (virt->ops && virt->ops->req_full_gpu) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

89

r = virt->ops->req_full_gpu(adev, init);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.h

294

const struct amdgpu_virt_ops *ops;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0_3.c

71

if (adev->virt.ops && adev->virt.ops->ras_poison_handler)

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0_3.c

72

adev->virt.ops->ras_poison_handler(adev, ras_if->block);

sys/dev/pci/drm/amd/amdgpu/nv.c

534

adev->virt.ops = &xgpu_nv_virt_ops;

sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c

462

static int psp_v11_0_memory_training(struct psp_context *psp, uint32_t ops)

sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c

490

if (ops & PSP_MEM_TRAIN_SEND_SHORT_MSG) {

sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c

492

ops |= PSP_MEM_TRAIN_RESTORE;

sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c

495

if ((ops & PSP_MEM_TRAIN_RESTORE) &&

sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c

498

ops |= PSP_MEM_TRAIN_SAVE;

sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c

505

ops |= PSP_MEM_TRAIN_SAVE;

sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c

508

if ((ops & PSP_MEM_TRAIN_SAVE) &&

sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c

511

ops |= PSP_MEM_TRAIN_SEND_LONG_MSG;

sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c

514

if (ops & PSP_MEM_TRAIN_SEND_LONG_MSG) {

sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c

515

ops &= ~PSP_MEM_TRAIN_SEND_SHORT_MSG;

sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c

516

ops |= PSP_MEM_TRAIN_SAVE;

sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c

519

DRM_DEBUG("Memory training ops:%x.\n", ops);

sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c

521

if (ops & PSP_MEM_TRAIN_SEND_LONG_MSG) {

sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c

563

if (ops & PSP_MEM_TRAIN_SAVE) {

sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c

567

if (ops & PSP_MEM_TRAIN_RESTORE) {

sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c

571

if (ops & PSP_MEM_TRAIN_SEND_SHORT_MSG) {

sys/dev/pci/drm/amd/amdgpu/psp_v13_0.c

551

static int psp_v13_0_memory_training(struct psp_context *psp, uint32_t ops)

sys/dev/pci/drm/amd/amdgpu/psp_v13_0.c

579

if (ops & PSP_MEM_TRAIN_SEND_SHORT_MSG) {

sys/dev/pci/drm/amd/amdgpu/psp_v13_0.c

581

ops |= PSP_MEM_TRAIN_RESTORE;

sys/dev/pci/drm/amd/amdgpu/psp_v13_0.c

584

if ((ops & PSP_MEM_TRAIN_RESTORE) &&

sys/dev/pci/drm/amd/amdgpu/psp_v13_0.c

587

ops |= PSP_MEM_TRAIN_SAVE;

sys/dev/pci/drm/amd/amdgpu/psp_v13_0.c

594

ops |= PSP_MEM_TRAIN_SAVE;

sys/dev/pci/drm/amd/amdgpu/psp_v13_0.c

597

if ((ops & PSP_MEM_TRAIN_SAVE) &&

sys/dev/pci/drm/amd/amdgpu/psp_v13_0.c

600

ops |= PSP_MEM_TRAIN_SEND_LONG_MSG;

sys/dev/pci/drm/amd/amdgpu/psp_v13_0.c

603

if (ops & PSP_MEM_TRAIN_SEND_LONG_MSG) {

sys/dev/pci/drm/amd/amdgpu/psp_v13_0.c

604

ops &= ~PSP_MEM_TRAIN_SEND_SHORT_MSG;

sys/dev/pci/drm/amd/amdgpu/psp_v13_0.c

605

ops |= PSP_MEM_TRAIN_SAVE;

sys/dev/pci/drm/amd/amdgpu/psp_v13_0.c

608

dev_dbg(adev->dev, "Memory training ops:%x.\n", ops);

sys/dev/pci/drm/amd/amdgpu/psp_v13_0.c

610

if (ops & PSP_MEM_TRAIN_SEND_LONG_MSG) {

sys/dev/pci/drm/amd/amdgpu/psp_v13_0.c

652

if (ops & PSP_MEM_TRAIN_SAVE) {

sys/dev/pci/drm/amd/amdgpu/psp_v13_0.c

656

if (ops & PSP_MEM_TRAIN_RESTORE) {

sys/dev/pci/drm/amd/amdgpu/psp_v13_0.c

660

if (ops & PSP_MEM_TRAIN_SEND_SHORT_MSG) {

sys/dev/pci/drm/amd/amdgpu/psp_v14_0.c

416

static int psp_v14_0_memory_training(struct psp_context *psp, uint32_t ops)

sys/dev/pci/drm/amd/amdgpu/psp_v14_0.c

444

if (ops & PSP_MEM_TRAIN_SEND_SHORT_MSG) {

sys/dev/pci/drm/amd/amdgpu/psp_v14_0.c

446

ops |= PSP_MEM_TRAIN_RESTORE;

sys/dev/pci/drm/amd/amdgpu/psp_v14_0.c

449

if ((ops & PSP_MEM_TRAIN_RESTORE) &&

sys/dev/pci/drm/amd/amdgpu/psp_v14_0.c

452

ops |= PSP_MEM_TRAIN_SAVE;

sys/dev/pci/drm/amd/amdgpu/psp_v14_0.c

459

ops |= PSP_MEM_TRAIN_SAVE;

sys/dev/pci/drm/amd/amdgpu/psp_v14_0.c

462

if ((ops & PSP_MEM_TRAIN_SAVE) &&

sys/dev/pci/drm/amd/amdgpu/psp_v14_0.c

465

ops |= PSP_MEM_TRAIN_SEND_LONG_MSG;

sys/dev/pci/drm/amd/amdgpu/psp_v14_0.c

468

if (ops & PSP_MEM_TRAIN_SEND_LONG_MSG) {

sys/dev/pci/drm/amd/amdgpu/psp_v14_0.c

469

ops &= ~PSP_MEM_TRAIN_SEND_SHORT_MSG;

sys/dev/pci/drm/amd/amdgpu/psp_v14_0.c

470

ops |= PSP_MEM_TRAIN_SAVE;

sys/dev/pci/drm/amd/amdgpu/psp_v14_0.c

473

dev_dbg(adev->dev, "Memory training ops:%x.\n", ops);

sys/dev/pci/drm/amd/amdgpu/psp_v14_0.c

475

if (ops & PSP_MEM_TRAIN_SEND_LONG_MSG) {

sys/dev/pci/drm/amd/amdgpu/psp_v14_0.c

517

if (ops & PSP_MEM_TRAIN_SAVE) {

sys/dev/pci/drm/amd/amdgpu/psp_v14_0.c

521

if (ops & PSP_MEM_TRAIN_RESTORE) {

sys/dev/pci/drm/amd/amdgpu/psp_v14_0.c

525

if (ops & PSP_MEM_TRAIN_SEND_SHORT_MSG) {

sys/dev/pci/drm/amd/amdgpu/soc15.c

743

adev->virt.ops = &xgpu_ai_virt_ops;

sys/dev/pci/drm/amd/amdgpu/vi.c

2051

adev->virt.ops = &xgpu_vi_virt_ops;

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

597

if (!pdd->dev->dqm->ops.set_cache_memory_policy(pdd->dev->dqm,

sys/dev/pci/drm/amd/amdkfd/kfd_debug.c

316

err = q->device->dqm->ops.update_queue(q->device->dqm, q, &minfo);

sys/dev/pci/drm/amd/amdkfd/kfd_device.c

1056

node->dqm->ops.stop(node->dqm);

sys/dev/pci/drm/amd/amdkfd/kfd_device.c

1111

err = node->dqm->ops.start(node->dqm);

sys/dev/pci/drm/amd/amdkfd/kfd_device.c

1564

ret = node->dqm->ops.unhalt(node->dqm);

sys/dev/pci/drm/amd/amdkfd/kfd_device.c

1581

r = node->dqm->ops.unhalt(node->dqm);

sys/dev/pci/drm/amd/amdkfd/kfd_device.c

1604

return node->dqm->ops.halt(node->dqm);

sys/dev/pci/drm/amd/amdkfd/kfd_device.c

1617

r = node->dqm->ops.halt(node->dqm);

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2947

dqm->ops.create_queue = create_queue_cpsch;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2948

dqm->ops.initialize = initialize_cpsch;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2949

dqm->ops.start = start_cpsch;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2950

dqm->ops.stop = stop_cpsch;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2951

dqm->ops.halt = halt_cpsch;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2952

dqm->ops.unhalt = unhalt_cpsch;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2953

dqm->ops.destroy_queue = destroy_queue_cpsch;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2954

dqm->ops.update_queue = update_queue;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2955

dqm->ops.register_process = register_process;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2956

dqm->ops.unregister_process = unregister_process;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2957

dqm->ops.uninitialize = uninitialize;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2958

dqm->ops.create_kernel_queue = create_kernel_queue_cpsch;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2959

dqm->ops.destroy_kernel_queue = destroy_kernel_queue_cpsch;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2960

dqm->ops.set_cache_memory_policy = set_cache_memory_policy;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2961

dqm->ops.process_termination = process_termination_cpsch;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2962

dqm->ops.evict_process_queues = evict_process_queues_cpsch;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2963

dqm->ops.restore_process_queues = restore_process_queues_cpsch;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2964

dqm->ops.get_wave_state = get_wave_state;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2965

dqm->ops.reset_queues = reset_queues_cpsch;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2966

dqm->ops.get_queue_checkpoint_info = get_queue_checkpoint_info;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2967

dqm->ops.checkpoint_mqd = checkpoint_mqd;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2971

dqm->ops.start = start_nocpsch;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2972

dqm->ops.stop = stop_nocpsch;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2973

dqm->ops.create_queue = create_queue_nocpsch;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2974

dqm->ops.destroy_queue = destroy_queue_nocpsch;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2975

dqm->ops.update_queue = update_queue;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2976

dqm->ops.register_process = register_process;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2977

dqm->ops.unregister_process = unregister_process;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2978

dqm->ops.initialize = initialize_nocpsch;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2979

dqm->ops.uninitialize = uninitialize;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2980

dqm->ops.set_cache_memory_policy = set_cache_memory_policy;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2981

dqm->ops.process_termination = process_termination_nocpsch;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2982

dqm->ops.evict_process_queues = evict_process_queues_nocpsch;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2983

dqm->ops.restore_process_queues =

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2985

dqm->ops.get_wave_state = get_wave_state;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2986

dqm->ops.get_queue_checkpoint_info = get_queue_checkpoint_info;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

2987

dqm->ops.checkpoint_mqd = checkpoint_mqd;

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

3034

if (!dqm->ops.initialize(dqm)) {

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

3049

dqm->ops.stop(dqm);

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

3050

dqm->ops.uninitialize(dqm);

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

3117

return dqm->ops.evict_process_queues(dqm, &pdd->qpd);

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.h

242

struct device_queue_manager_ops ops;

sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v11.c

238

if (dev->dqm->ops.reset_queues)

sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v11.c

239

ret = dev->dqm->ops.reset_queues(dev->dqm, pasid);

sys/dev/pci/drm/amd/amdkfd/kfd_migrate.c

1055

pgmap->ops = &svm_migrate_pgmap_ops;

sys/dev/pci/drm/amd/amdkfd/kfd_process.c

1897

r = pdd->dev->dqm->ops.evict_process_queues(pdd->dev->dqm,

sys/dev/pci/drm/amd/amdkfd/kfd_process.c

1926

if (pdd->dev->dqm->ops.restore_process_queues(pdd->dev->dqm,

sys/dev/pci/drm/amd/amdkfd/kfd_process.c

1949

r = pdd->dev->dqm->ops.restore_process_queues(pdd->dev->dqm,

sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c

1093

if (!pqn->q->device->dqm->ops.get_queue_checkpoint_info) {

sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c

1098

pqn->q->device->dqm->ops.get_queue_checkpoint_info(pqn->q->device->dqm,

sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c

163

return pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm,

sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c

366

dev->dqm->ops.register_process(dev->dqm, &pdd->qpd);

sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c

404

retval = dev->dqm->ops.create_queue(dev->dqm, q, &pdd->qpd, q_data,

sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c

425

retval = dev->dqm->ops.create_queue(dev->dqm, q, &pdd->qpd, q_data,

sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c

442

retval = dev->dqm->ops.create_kernel_queue(dev->dqm,

sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c

501

dev->dqm->ops.unregister_process(dev->dqm, &pdd->qpd);

sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c

540

dqm->ops.destroy_kernel_queue(dqm, pqn->kq, &pdd->qpd);

sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c

550

retval = dqm->ops.destroy_queue(dqm, &pdd->qpd, pqn->q);

sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c

570

dqm->ops.unregister_process(dqm, &pdd->qpd);

sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c

626

retval = pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm,

sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c

665

retval = pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm,

sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c

700

return pqn->q->device->dqm->ops.get_wave_state(pqn->q->device->dqm,

sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c

817

if (!pqn->q->device->dqm->ops.checkpoint_mqd) {

sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c

822

return pqn->q->device->dqm->ops.checkpoint_mqd(pqn->q->device->dqm,

sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c

93

dev->dqm->ops.process_termination(dev->dqm, &pdd->qpd);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1166

acomp->ops = &amdgpu_dm_audio_component_ops;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1179

acomp->ops = NULL;

sys/dev/pci/drm/amd/include/cgs_common.h

153

const struct cgs_ops *ops;

sys/dev/pci/drm/amd/include/cgs_common.h

160

(((struct cgs_device *)dev)->ops->func(dev, ##__VA_ARGS__))

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

4396

.ops = {

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

4404

.ops = {

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

4412

.ops = {

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

4420

.ops = {

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

4428

.ops = {

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

4436

.ops = {

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

4444

.ops = {

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

4525

&container->sub_feature[i].ops))

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

4572

&container->ops))

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

4587

container->ops.is_visible(adev);

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

4590

container->ops.show;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

4592

container->ops.store;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

4622

&feature->ops))

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

4637

feature->ops.is_visible(adev);

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

4640

feature->ops.show;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

4642

feature->ops.store;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

65

struct od_feature_ops ops;

sys/dev/pci/drm/amd/pm/amdgpu_pm.c

70

struct od_feature_ops ops;

sys/dev/pci/drm/apple/afk.c

186

const struct apple_epic_service_ops *ops;

sys/dev/pci/drm/apple/afk.c

190

if (!ep->ops)

sys/dev/pci/drm/apple/afk.c

193

for (ops = ep->ops; ops->name[0]; ops++) {

sys/dev/pci/drm/apple/afk.c

194

if (strcmp(ops->name, name))

sys/dev/pci/drm/apple/afk.c

197

return ops;

sys/dev/pci/drm/apple/afk.c

221

const struct apple_epic_service_ops *ops;

sys/dev/pci/drm/apple/afk.c

268

ops = afk_match_service(ep, service_name);

sys/dev/pci/drm/apple/afk.c

269

if (!ops) {

sys/dev/pci/drm/apple/afk.c

279

ep->services[ch_idx].ops = ops;

sys/dev/pci/drm/apple/afk.c

283

ops->init(&ep->services[ch_idx], epic_name, epic_class, epic_unit);

sys/dev/pci/drm/apple/afk.c

294

const struct apple_epic_service_ops *ops;

sys/dev/pci/drm/apple/afk.c

307

ops = service->ops;

sys/dev/pci/drm/apple/afk.c

310

if (ops->teardown)

sys/dev/pci/drm/apple/afk.c

311

ops->teardown(service);

sys/dev/pci/drm/apple/afk.c

425

if (!service->ops->call)

sys/dev/pci/drm/apple/afk.c

431

ret = service->ops->call(service, le32_to_cpu(call->type),

sys/dev/pci/drm/apple/afk.c

449

if (service->ops->report)

sys/dev/pci/drm/apple/afk.c

450

service->ops->report(service, le16_to_cpu(eshdr->type),

sys/dev/pci/drm/apple/afk.c

54

const struct apple_epic_service_ops *ops)

sys/dev/pci/drm/apple/afk.c

63

afkep->ops = ops;

sys/dev/pci/drm/apple/afk.h

174

const struct apple_epic_service_ops *ops;

sys/dev/pci/drm/apple/afk.h

180

const struct apple_epic_service_ops *ops);

sys/dev/pci/drm/apple/afk.h

38

const struct apple_epic_service_ops *ops;

sys/dev/pci/drm/apple/apldcp.c

123

const struct apple_rtkit_ops *ops;

sys/dev/pci/drm/apple/apldcp.c

188

rtk->ops->recv_message(rtk->cookie, rtkep->ep, rtktask->msg);

sys/dev/pci/drm/apple/apldcp.c

246

const char *mbox_name, int mbox_idx, const struct apple_rtkit_ops *ops)

sys/dev/pci/drm/apple/apldcp.c

270

rtk->ops = ops;

sys/dev/pci/drm/display/drm_hdmi_audio_helper.c

165

.ops = &drm_connector_hdmi_audio_ops,

sys/dev/pci/drm/drm_bridge.c

1261

if (!(bridge->ops & DRM_BRIDGE_OP_DETECT))

sys/dev/pci/drm/drm_bridge.c

1285

if (!(bridge->ops & DRM_BRIDGE_OP_MODES))

sys/dev/pci/drm/drm_bridge.c

1307

if (!(bridge->ops & DRM_BRIDGE_OP_EDID))

sys/dev/pci/drm/drm_bridge.c

1337

if (!(bridge->ops & DRM_BRIDGE_OP_HPD))

sys/dev/pci/drm/drm_bridge.c

1370

if (!(bridge->ops & DRM_BRIDGE_OP_HPD))

sys/dev/pci/drm/drm_bridge.c

1470

drm_printf(p, "\tops: [0x%x]", bridge->ops);

sys/dev/pci/drm/drm_bridge.c

1471

if (bridge->ops & DRM_BRIDGE_OP_DETECT)

sys/dev/pci/drm/drm_bridge.c

1473

if (bridge->ops & DRM_BRIDGE_OP_EDID)

sys/dev/pci/drm/drm_bridge.c

1475

if (bridge->ops & DRM_BRIDGE_OP_HPD)

sys/dev/pci/drm/drm_bridge.c

1477

if (bridge->ops & DRM_BRIDGE_OP_MODES)

sys/dev/pci/drm/drm_bridge.c

1479

if (bridge->ops & DRM_BRIDGE_OP_HDMI)

sys/dev/pci/drm/drm_bridge.c

311

if (bridge->ops & DRM_BRIDGE_OP_HDMI)

sys/dev/pci/drm/drm_crtc.c

161

BUG_ON(fence->ops != &drm_crtc_fence_ops);

sys/dev/pci/drm/drm_gpusvm.c

1030

else if (dpagemap && dpagemap->ops->device_unmap)

sys/dev/pci/drm/drm_gpusvm.c

1031

dpagemap->ops->device_unmap(dpagemap,

sys/dev/pci/drm/drm_gpusvm.c

1156

if (gpusvm->ops->range_free)

sys/dev/pci/drm/drm_gpusvm.c

1157

gpusvm->ops->range_free(range);

sys/dev/pci/drm/drm_gpusvm.c

1390

dpagemap->ops->device_map(dpagemap,

sys/dev/pci/drm/drm_gpusvm.c

345

gpusvm->ops->invalidate(gpusvm, notifier, mmu_range);

sys/dev/pci/drm/drm_gpusvm.c

388

const struct drm_gpusvm_ops *ops,

sys/dev/pci/drm/drm_gpusvm.c

392

if (!ops->invalidate || !num_chunks)

sys/dev/pci/drm/drm_gpusvm.c

397

if (ops || num_chunks || mm_range || notifier_size)

sys/dev/pci/drm/drm_gpusvm.c

407

gpusvm->ops = ops;

sys/dev/pci/drm/drm_gpusvm.c

522

if (gpusvm->ops->notifier_alloc)

sys/dev/pci/drm/drm_gpusvm.c

523

notifier = gpusvm->ops->notifier_alloc();

sys/dev/pci/drm/drm_gpusvm.c

552

if (gpusvm->ops->notifier_free)

sys/dev/pci/drm/drm_gpusvm.c

553

gpusvm->ops->notifier_free(notifier);

sys/dev/pci/drm/drm_gpusvm.c

629

if (gpusvm->ops->range_alloc)

sys/dev/pci/drm/drm_gpusvm.c

630

range = gpusvm->ops->range_alloc(gpusvm);

sys/dev/pci/drm/drm_gpuvm.c

1073

const struct drm_gpuvm_ops *ops)

sys/dev/pci/drm/drm_gpuvm.c

1088

gpuvm->ops = ops;

sys/dev/pci/drm/drm_gpuvm.c

1136

if (drm_WARN_ON(gpuvm->drm, !gpuvm->ops->vm_free))

sys/dev/pci/drm/drm_gpuvm.c

1139

gpuvm->ops->vm_free(gpuvm);

sys/dev/pci/drm/drm_gpuvm.c

1435

const struct drm_gpuvm_ops *ops = gpuvm->ops;

sys/dev/pci/drm/drm_gpuvm.c

1441

ret = ops->vm_bo_validate(vm_bo, exec);

sys/dev/pci/drm/drm_gpuvm.c

1455

const struct drm_gpuvm_ops *ops = gpuvm->ops;

sys/dev/pci/drm/drm_gpuvm.c

1463

ret = ops->vm_bo_validate(vm_bo, exec);

sys/dev/pci/drm/drm_gpuvm.c

1488

const struct drm_gpuvm_ops *ops = gpuvm->ops;

sys/dev/pci/drm/drm_gpuvm.c

1490

if (unlikely(!ops || !ops->vm_bo_validate))

sys/dev/pci/drm/drm_gpuvm.c

1542

const struct drm_gpuvm_ops *ops = gpuvm->ops;

sys/dev/pci/drm/drm_gpuvm.c

1545

if (ops && ops->vm_bo_alloc)

sys/dev/pci/drm/drm_gpuvm.c

1546

vm_bo = ops->vm_bo_alloc();

sys/dev/pci/drm/drm_gpuvm.c

1574

const struct drm_gpuvm_ops *ops = gpuvm->ops;

sys/dev/pci/drm/drm_gpuvm.c

1587

if (ops && ops->vm_bo_free)

sys/dev/pci/drm/drm_gpuvm.c

1588

ops->vm_bo_free(vm_bo);

sys/dev/pci/drm/drm_gpuvm.c

2177

const struct drm_gpuvm_ops *ops, void *priv,

sys/dev/pci/drm/drm_gpuvm.c

2209

ret = op_unmap_cb(ops, priv, va, merge, madvise);

sys/dev/pci/drm/drm_gpuvm.c

2216

ret = op_unmap_cb(ops, priv, va, merge, madvise);

sys/dev/pci/drm/drm_gpuvm.c

2234

ret = op_remap_cb(ops, priv, NULL, &n, &u);

sys/dev/pci/drm/drm_gpuvm.c

2257

ret = op_remap_cb(ops, priv, &p, NULL, &u);

sys/dev/pci/drm/drm_gpuvm.c

2267

ret = op_remap_cb(ops, priv, &p, NULL, &u);

sys/dev/pci/drm/drm_gpuvm.c

2277

ret = op_map_cb(ops, priv, &map_req);

sys/dev/pci/drm/drm_gpuvm.c

2294

ret = op_remap_cb(ops, priv, &p, &n, &u);

sys/dev/pci/drm/drm_gpuvm.c

2308

ret = op_unmap_cb(ops, priv, va, merge, madvise);

sys/dev/pci/drm/drm_gpuvm.c

2316

ret = op_unmap_cb(ops, priv, va, merge, madvise);

sys/dev/pci/drm/drm_gpuvm.c

2335

ret = op_remap_cb(ops, priv, NULL, &n, &u);

sys/dev/pci/drm/drm_gpuvm.c

2345

return op_map_cb(ops, priv, &map_req);

sys/dev/pci/drm/drm_gpuvm.c

2351

return op_map_cb(ops, priv, op_map);

sys/dev/pci/drm/drm_gpuvm.c

2356

const struct drm_gpuvm_ops *ops, void *priv,

sys/dev/pci/drm/drm_gpuvm.c

2396

ret = op_remap_cb(ops, priv,

sys/dev/pci/drm/drm_gpuvm.c

2403

ret = op_unmap_cb(ops, priv, va, false, false);

sys/dev/pci/drm/drm_gpuvm.c

2445

const struct drm_gpuvm_ops *ops = gpuvm->ops;

sys/dev/pci/drm/drm_gpuvm.c

2447

if (unlikely(!(ops && ops->sm_step_map &&

sys/dev/pci/drm/drm_gpuvm.c

2448

ops->sm_step_remap &&

sys/dev/pci/drm/drm_gpuvm.c

2449

ops->sm_step_unmap)))

sys/dev/pci/drm/drm_gpuvm.c

2452

return __drm_gpuvm_sm_map(gpuvm, ops, priv, req, false);

sys/dev/pci/drm/drm_gpuvm.c

2487

const struct drm_gpuvm_ops *ops = gpuvm->ops;

sys/dev/pci/drm/drm_gpuvm.c

2489

if (unlikely(!(ops && ops->sm_step_remap &&

sys/dev/pci/drm/drm_gpuvm.c

2490

ops->sm_step_unmap)))

sys/dev/pci/drm/drm_gpuvm.c

2493

return __drm_gpuvm_sm_unmap(gpuvm, ops, priv,

sys/dev/pci/drm/drm_gpuvm.c

2621

const struct drm_gpuvm_ops *fn = gpuvm->ops;

sys/dev/pci/drm/drm_gpuvm.c

2639

const struct drm_gpuvm_ops *fn = gpuvm->ops;

sys/dev/pci/drm/drm_gpuvm.c

2653

struct drm_gpuva_ops *ops;

sys/dev/pci/drm/drm_gpuvm.c

2656

struct drm_gpuva_ops *ops = args->ops;

sys/dev/pci/drm/drm_gpuvm.c

2689

list_add_tail(&op->entry, &ops->list);

sys/dev/pci/drm/drm_gpuvm.c

2714

struct drm_gpuva_ops *ops;

sys/dev/pci/drm/drm_gpuvm.c

2717

struct drm_gpuva_ops *ops;

sys/dev/pci/drm/drm_gpuvm.c

2721

ops = kzalloc(sizeof(*ops), GFP_KERNEL);

sys/dev/pci/drm/drm_gpuvm.c

2722

if (unlikely(!ops))

sys/dev/pci/drm/drm_gpuvm.c

2725

INIT_LIST_HEAD(&ops->list);

sys/dev/pci/drm/drm_gpuvm.c

2728

args.ops = ops;

sys/dev/pci/drm/drm_gpuvm.c

2734

return ops;

sys/dev/pci/drm/drm_gpuvm.c

2737

drm_gpuva_ops_free(gpuvm, ops);

sys/dev/pci/drm/drm_gpuvm.c

2848

struct drm_gpuva_ops *ops;

sys/dev/pci/drm/drm_gpuvm.c

2851

struct drm_gpuva_ops *ops;

sys/dev/pci/drm/drm_gpuvm.c

2855

ops = kzalloc(sizeof(*ops), GFP_KERNEL);

sys/dev/pci/drm/drm_gpuvm.c

2856

if (unlikely(!ops))

sys/dev/pci/drm/drm_gpuvm.c

2859

INIT_LIST_HEAD(&ops->list);

sys/dev/pci/drm/drm_gpuvm.c

2862

args.ops = ops;

sys/dev/pci/drm/drm_gpuvm.c

2869

return ops;

sys/dev/pci/drm/drm_gpuvm.c

2872

drm_gpuva_ops_free(gpuvm, ops);

sys/dev/pci/drm/drm_gpuvm.c

2899

struct drm_gpuva_ops *ops;

sys/dev/pci/drm/drm_gpuvm.c

2905

ops = kzalloc(sizeof(*ops), GFP_KERNEL);

sys/dev/pci/drm/drm_gpuvm.c

2906

if (!ops)

sys/dev/pci/drm/drm_gpuvm.c

2909

INIT_LIST_HEAD(&ops->list);

sys/dev/pci/drm/drm_gpuvm.c

2920

list_add_tail(&op->entry, &ops->list);

sys/dev/pci/drm/drm_gpuvm.c

2923

return ops;

sys/dev/pci/drm/drm_gpuvm.c

2926

drm_gpuva_ops_free(gpuvm, ops);

sys/dev/pci/drm/drm_gpuvm.c

2952

struct drm_gpuva_ops *ops;

sys/dev/pci/drm/drm_gpuvm.c

2959

ops = kzalloc(sizeof(*ops), GFP_KERNEL);

sys/dev/pci/drm/drm_gpuvm.c

2960

if (!ops)

sys/dev/pci/drm/drm_gpuvm.c

2963

INIT_LIST_HEAD(&ops->list);

sys/dev/pci/drm/drm_gpuvm.c

2974

list_add_tail(&op->entry, &ops->list);

sys/dev/pci/drm/drm_gpuvm.c

2977

return ops;

sys/dev/pci/drm/drm_gpuvm.c

2980

drm_gpuva_ops_free(vm_bo->vm, ops);

sys/dev/pci/drm/drm_gpuvm.c

2995

struct drm_gpuva_ops *ops)

sys/dev/pci/drm/drm_gpuvm.c

2999

drm_gpuva_for_each_op_safe(op, next, ops) {

sys/dev/pci/drm/drm_gpuvm.c

3011

kfree(ops);

sys/dev/pci/drm/drm_linux.c

1612

const struct backlight_ops *ops, const struct backlight_properties *props)

sys/dev/pci/drm/drm_linux.c

1617

bd->ops = ops;

sys/dev/pci/drm/drm_linux.c

1650

return bd->ops->update_status(bd);

sys/dev/pci/drm/drm_linux.c

1661

return bd->ops->update_status(bd);

sys/dev/pci/drm/drm_linux.c

1778

if (fence->ops && fence->ops->release)

sys/dev/pci/drm/drm_linux.c

1779

fence->ops->release(fence);

sys/dev/pci/drm/drm_linux.c

1861

if (fence->ops->signaled && fence->ops->signaled(fence)) {

sys/dev/pci/drm/drm_linux.c

1875

if (fence->ops->signaled && fence->ops->signaled(fence)) {

sys/dev/pci/drm/drm_linux.c

1923

if (fence->ops->wait)

sys/dev/pci/drm/drm_linux.c

1924

return fence->ops->wait(fence, intr, timeout);

sys/dev/pci/drm/drm_linux.c

1946

fence->ops->enable_signaling) {

sys/dev/pci/drm/drm_linux.c

1948

if (!fence->ops->enable_signaling(fence))

sys/dev/pci/drm/drm_linux.c

1955

dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,

sys/dev/pci/drm/drm_linux.c

1958

fence->ops = ops;

sys/dev/pci/drm/drm_linux.c

1969

dma_fence_init64(struct dma_fence *fence, const struct dma_fence_ops *ops,

sys/dev/pci/drm/drm_linux.c

1972

dma_fence_init(fence, ops, lock, context, seqno);

sys/dev/pci/drm/drm_linux.c

1997

else if (!was_set && fence->ops->enable_signaling) {

sys/dev/pci/drm/drm_linux.c

1998

if (!fence->ops->enable_signaling(fence)) {

sys/dev/pci/drm/drm_linux.c

2073

if (!was_set && fence->ops->enable_signaling) {

sys/dev/pci/drm/drm_linux.c

2074

if (!fence->ops->enable_signaling(fence)) {

sys/dev/pci/drm/drm_linux.c

2184

if (f->ops->set_deadline == NULL)

sys/dev/pci/drm/drm_linux.c

2187

f->ops->set_deadline(f, t);

sys/dev/pci/drm/drm_linux.c

2208

if (dma_fence_stub.ops == NULL) {

sys/dev/pci/drm/drm_linux.c

2571

return (fence->ops == &dma_fence_chain_ops) ||

sys/dev/pci/drm/drm_linux.c

2572

(fence->ops == &dma_fence_array_ops);

sys/dev/pci/drm/drm_linux.c

2617

dmabuf->ops->release(dmabuf);

sys/dev/pci/drm/drm_linux.c

2673

dmabuf->ops = info->ops;

sys/dev/pci/drm/drm_linux.c

3524

const struct component_ops *ops;

sys/dev/pci/drm/drm_linux.c

3531

component_add(struct device *dev, const struct component_ops *ops)

sys/dev/pci/drm/drm_linux.c

3537

component->ops = ops;

sys/dev/pci/drm/drm_linux.c

3543

component_add_typed(struct device *dev, const struct component_ops *ops,

sys/dev/pci/drm/drm_linux.c

3546

return component_add(dev, ops);

sys/dev/pci/drm/drm_linux.c

3557

ret = component->ops->bind(component->dev, NULL, data);

sys/dev/pci/drm/drm_linux.c

3578

const struct component_master_ops *ops, struct component_match *match)

sys/dev/pci/drm/drm_linux.c

3596

ret = ops->bind(dev);

sys/dev/pci/drm/drm_mipi_dsi.c

385

const struct mipi_dsi_host_ops *ops = dsi->host->ops;

sys/dev/pci/drm/drm_mipi_dsi.c

388

if (!ops || !ops->attach)

sys/dev/pci/drm/drm_mipi_dsi.c

391

ret = ops->attach(dsi->host, dsi);

sys/dev/pci/drm/drm_mipi_dsi.c

407

const struct mipi_dsi_host_ops *ops = dsi->host->ops;

sys/dev/pci/drm/drm_mipi_dsi.c

412

if (!ops || !ops->detach)

sys/dev/pci/drm/drm_mipi_dsi.c

417

return ops->detach(dsi->host, dsi);

sys/dev/pci/drm/drm_mipi_dsi.c

463

const struct mipi_dsi_host_ops *ops = dsi->host->ops;

sys/dev/pci/drm/drm_mipi_dsi.c

465

if (!ops || !ops->transfer)

sys/dev/pci/drm/drm_mipi_dsi.c

471

return ops->transfer(dsi->host, msg);

sys/dev/pci/drm/drm_mode_object.c

336

*val = bd->ops->get_brightness(bd);

sys/dev/pci/drm/drm_pagemap.c

134

if (devmem->ops->devmem_release)

sys/dev/pci/drm/drm_pagemap.c

135

devmem->ops->devmem_release(devmem);

sys/dev/pci/drm/drm_pagemap.c

324

const struct drm_pagemap_devmem_ops *ops = devmem_allocation->ops;

sys/dev/pci/drm/drm_pagemap.c

341

if (!ops->populate_devmem_pfn || !ops->copy_to_devmem ||

sys/dev/pci/drm/drm_pagemap.c

342

!ops->copy_to_ram)

sys/dev/pci/drm/drm_pagemap.c

394

err = ops->populate_devmem_pfn(devmem_allocation, npages, migrate.dst);

sys/dev/pci/drm/drm_pagemap.c

412

err = ops->copy_to_devmem(pages, pagemap_addr, npages,

sys/dev/pci/drm/drm_pagemap.c

557

const struct drm_pagemap_devmem_ops *ops = devmem_allocation->ops;

sys/dev/pci/drm/drm_pagemap.c

583

err = ops->populate_devmem_pfn(devmem_allocation, npages, src);

sys/dev/pci/drm/drm_pagemap.c

604

err = ops->copy_to_ram(pages, pagemap_addr, npages, NULL);

sys/dev/pci/drm/drm_pagemap.c

660

const struct drm_pagemap_devmem_ops *ops;

sys/dev/pci/drm/drm_pagemap.c

723

ops = zdd->devmem_allocation->ops;

sys/dev/pci/drm/drm_pagemap.c

740

err = ops->copy_to_ram(pages, pagemap_addr, npages, NULL);

sys/dev/pci/drm/drm_pagemap.c

826

const struct drm_pagemap_devmem_ops *ops,

sys/dev/pci/drm/drm_pagemap.c

833

devmem_allocation->ops = ops;

sys/dev/pci/drm/drm_pagemap.c

884

err = dpagemap->ops->populate_mm(dpagemap, start, end, mm,

sys/dev/pci/drm/drm_prime.c

615

if (dma_buf->ops->map_dma_buf == drm_gem_map_dma_buf &&

sys/dev/pci/drm/drm_prime.c

962

.ops = &drm_gem_prime_dmabuf_ops,

sys/dev/pci/drm/drm_prime.c

989

return (dma_buf->ops == &drm_gem_prime_dmabuf_ops) && (obj->dev == dev);

sys/dev/pci/drm/drm_privacy_screen.c

216

if (!priv->ops) {

sys/dev/pci/drm/drm_privacy_screen.c

234

ret = priv->ops->set_sw_state(priv, sw_state);

sys/dev/pci/drm/drm_privacy_screen.c

318

if (!priv->ops)

sys/dev/pci/drm/drm_privacy_screen.c

348

if (!priv->ops)

sys/dev/pci/drm/drm_privacy_screen.c

392

struct device *parent, const struct drm_privacy_screen_ops *ops,

sys/dev/pci/drm/drm_privacy_screen.c

411

priv->ops = ops;

sys/dev/pci/drm/drm_privacy_screen.c

413

priv->ops->get_hw_state(priv);

sys/dev/pci/drm/drm_privacy_screen.c

447

priv->ops = NULL;

sys/dev/pci/drm/i915/display/intel_audio.c

1265

if (drm_WARN_ON(display->drm, acomp->base.ops || acomp->base.dev))

sys/dev/pci/drm/i915/display/intel_audio.c

1274

acomp->base.ops = &intel_audio_component_ops;

sys/dev/pci/drm/i915/display/intel_audio.c

1292

acomp->base.ops = NULL;

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1065

.ops = &gen9_dc_off_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1072

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1081

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1095

.ops = &icl_ddi_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1103

.ops = &icl_aux_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

114

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1152

.ops = &gen9_dc_off_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1159

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1167

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1176

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1184

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1316

.ops = &gen9_dc_off_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1327

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1335

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1343

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1351

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1359

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1374

.ops = &icl_ddi_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1383

.ops = &icl_aux_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1392

.ops = &icl_aux_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1403

.ops = &icl_aux_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1430

.ops = &gen9_dc_off_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

148

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1484

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1492

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1500

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1508

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1516

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1528

.ops = &xelpdp_aux_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1560

.ops = &xe2lpd_pica_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1577

.ops = &gen9_dc_off_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1645

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1653

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1661

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1669

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1677

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1689

.ops = &xelpdp_aux_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1708

.ops = &gen9_dc_off_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1727

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1735

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1743

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1751

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1761

.ops = &xelpdp_aux_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

207

.ops = &vlv_display_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

219

.ops = &vlv_dpio_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

226

.ops = &vlv_dpio_cmn_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

287

.ops = &chv_pipe_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

297

.ops = &chv_dpio_cmn_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

364

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

378

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

385

.ops = &gen9_dc_off_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

392

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

403

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

464

.ops = &gen9_dc_off_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

471

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

484

.ops = &bxt_dpio_cmn_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

567

.ops = &gen9_dc_off_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

57

.ops = &i9xx_always_on_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

574

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

590

.ops = &bxt_dpio_cmn_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

600

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

723

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

735

.ops = &gen9_dc_off_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

742

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

750

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

763

.ops = &icl_ddi_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

773

.ops = &icl_aux_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

781

.ops = &icl_aux_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

788

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

80

.ops = &i830_pipes_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

901

.ops = &gen9_dc_off_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

908

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

916

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

932

.ops = &icl_ddi_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

938

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

946

.ops = &hsw_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

958

.ops = &tgl_tc_cold_off_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

975

.ops = &icl_aux_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_map.c

985

.ops = &icl_aux_power_well_ops,

sys/dev/pci/drm/i915/display/intel_display_power_well.c

119

power_well->desc->ops->enable(display, power_well);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

128

power_well->desc->ops->disable(display, power_well);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

134

power_well->desc->ops->sync_hw(display, power_well);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

135

power_well->hw_enabled = power_well->desc->ops->is_enabled(display, power_well);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

159

return power_well->desc->ops->is_enabled(display, power_well);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

279

const struct i915_power_well_regs *regs = power_well->desc->ops->regs;

sys/dev/pci/drm/i915/display/intel_display_power_well.c

323

const struct i915_power_well_regs *regs = power_well->desc->ops->regs;

sys/dev/pci/drm/i915/display/intel_display_power_well.c

367

const struct i915_power_well_regs *regs = power_well->desc->ops->regs;

sys/dev/pci/drm/i915/display/intel_display_power_well.c

410

const struct i915_power_well_regs *regs = power_well->desc->ops->regs;

sys/dev/pci/drm/i915/display/intel_display_power_well.c

431

const struct i915_power_well_regs *regs = power_well->desc->ops->regs;

sys/dev/pci/drm/i915/display/intel_display_power_well.c

458

const struct i915_power_well_regs *regs = power_well->desc->ops->regs;

sys/dev/pci/drm/i915/display/intel_display_power_well.c

528

const struct i915_power_well_regs *regs = power_well->desc->ops->regs;

sys/dev/pci/drm/i915/display/intel_display_power_well.c

605

const struct i915_power_well_regs *regs = power_well->desc->ops->regs;

sys/dev/pci/drm/i915/display/intel_display_power_well.c

930

const struct i915_power_well_regs *regs = power_well->desc->ops->regs;

sys/dev/pci/drm/i915/display/intel_display_power_well.h

91

const struct i915_power_well_ops *ops;

sys/dev/pci/drm/i915/display/intel_dsi.c

94

host->base.ops = funcs;

sys/dev/pci/drm/i915/display/intel_hdcp.c

1234

if (!arbiter || !arbiter->ops) {

sys/dev/pci/drm/i915/display/intel_hdcp.c

1239

ret = arbiter->ops->initiate_hdcp2_session(arbiter->hdcp_dev, data, ake_data);

sys/dev/pci/drm/i915/display/intel_hdcp.c

1264

if (!arbiter || !arbiter->ops) {

sys/dev/pci/drm/i915/display/intel_hdcp.c

1269

ret = arbiter->ops->verify_receiver_cert_prepare_km(arbiter->hdcp_dev, data,

sys/dev/pci/drm/i915/display/intel_hdcp.c

1292

if (!arbiter || !arbiter->ops) {

sys/dev/pci/drm/i915/display/intel_hdcp.c

1297

ret = arbiter->ops->verify_hprime(arbiter->hdcp_dev, data, rx_hprime);

sys/dev/pci/drm/i915/display/intel_hdcp.c

1318

if (!arbiter || !arbiter->ops) {

sys/dev/pci/drm/i915/display/intel_hdcp.c

1323

ret = arbiter->ops->store_pairing_info(arbiter->hdcp_dev, data, pairing_info);

sys/dev/pci/drm/i915/display/intel_hdcp.c

1345

if (!arbiter || !arbiter->ops) {

sys/dev/pci/drm/i915/display/intel_hdcp.c

1350

ret = arbiter->ops->initiate_locality_check(arbiter->hdcp_dev, data, lc_init);

sys/dev/pci/drm/i915/display/intel_hdcp.c

1372

if (!arbiter || !arbiter->ops) {

sys/dev/pci/drm/i915/display/intel_hdcp.c

1377

ret = arbiter->ops->verify_lprime(arbiter->hdcp_dev, data, rx_lprime);

sys/dev/pci/drm/i915/display/intel_hdcp.c

1398

if (!arbiter || !arbiter->ops) {

sys/dev/pci/drm/i915/display/intel_hdcp.c

1403

ret = arbiter->ops->get_session_key(arbiter->hdcp_dev, data, ske_data);

sys/dev/pci/drm/i915/display/intel_hdcp.c

1427

if (!arbiter || !arbiter->ops) {

sys/dev/pci/drm/i915/display/intel_hdcp.c

1432

ret = arbiter->ops->repeater_check_flow_prepare_ack(arbiter->hdcp_dev,

sys/dev/pci/drm/i915/display/intel_hdcp.c

1457

if (!arbiter || !arbiter->ops) {

sys/dev/pci/drm/i915/display/intel_hdcp.c

1462

ret = arbiter->ops->verify_mprime(arbiter->hdcp_dev, data, stream_ready);

sys/dev/pci/drm/i915/display/intel_hdcp.c

1481

if (!arbiter || !arbiter->ops) {

sys/dev/pci/drm/i915/display/intel_hdcp.c

1486

ret = arbiter->ops->enable_hdcp_authentication(arbiter->hdcp_dev, data);

sys/dev/pci/drm/i915/display/intel_hdcp.c

1505

if (!arbiter || !arbiter->ops) {

sys/dev/pci/drm/i915/display/intel_hdcp.c

1510

ret = arbiter->ops->close_hdcp_session(arbiter->hdcp_dev,

sys/dev/pci/drm/i915/display/intel_hdcp_gsc_message.c

701

display->hdcp.arbiter->ops = &gsc_hdcp_ops;

sys/dev/pci/drm/i915/gem/i915_gem_create.c

127

ret = mr->ops->init_object(mr, obj, I915_BO_INVALID_OFFSET, size, 0, flags);

sys/dev/pci/drm/i915/gem/i915_gem_dmabuf.c

229

exp_info.ops = &i915_dmabuf_ops;

sys/dev/pci/drm/i915/gem/i915_gem_dmabuf.c

235

if (obj->ops->dmabuf_export) {

sys/dev/pci/drm/i915/gem/i915_gem_dmabuf.c

236

int ret = obj->ops->dmabuf_export(obj);

sys/dev/pci/drm/i915/gem/i915_gem_dmabuf.c

302

if (dma_buf->ops == &i915_dmabuf_ops) {

sys/dev/pci/drm/i915/gem/i915_gem_internal.c

140

const struct drm_i915_gem_object_ops *ops,

sys/dev/pci/drm/i915/gem/i915_gem_internal.c

158

i915_gem_object_init(obj, ops, &lock_class, 0);

sys/dev/pci/drm/i915/gem/i915_gem_internal.h

20

const struct drm_i915_gem_object_ops *ops,

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1027

if (obj->ops->unmap_virtual)

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1028

obj->ops->unmap_virtual(obj);

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1120

GEM_BUG_ON(obj->ops->mmap_offset || obj->ops->mmap_ops);

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1174

if (obj->ops->mmap_offset) {

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1178

*offset = obj->ops->mmap_offset(obj);

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1421

if (obj->ops->mmap_ops) {

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1423

vma->vm_ops = obj->ops->mmap_ops;

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1494

GEM_BUG_ON(obj && obj->ops->mmap_ops);

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1500

GEM_BUG_ON(obj && !obj->ops->mmap_ops);

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1547

GEM_BUG_ON(obj && obj->ops->mmap_ops);

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1553

GEM_BUG_ON(obj && !obj->ops->mmap_ops);

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1568

if (obj->ops->mmap_ops)

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1569

uvm_obj_init(&obj->base.uobj, obj->ops->mmap_ops, 1);

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1589

if (obj->ops->mmap_ops) {

sys/dev/pci/drm/i915/gem/i915_gem_object.c

103

const struct drm_i915_gem_object_ops *ops,

sys/dev/pci/drm/i915/gem/i915_gem_object.c

130

obj->ops = ops;

sys/dev/pci/drm/i915/gem/i915_gem_object.c

411

if (obj->ops->release)

sys/dev/pci/drm/i915/gem/i915_gem_object.c

412

obj->ops->release(obj);

sys/dev/pci/drm/i915/gem/i915_gem_object.c

427

if (obj->ops->delayed_free) {

sys/dev/pci/drm/i915/gem/i915_gem_object.c

428

obj->ops->delayed_free(obj);

sys/dev/pci/drm/i915/gem/i915_gem_object.c

721

if (!obj->ops->migrate)

sys/dev/pci/drm/i915/gem/i915_gem_object.c

815

if (!obj->ops->migrate) {

sys/dev/pci/drm/i915/gem/i915_gem_object.c

821

return obj->ops->migrate(obj, mr, flags);

sys/dev/pci/drm/i915/gem/i915_gem_object.h

213

if (obj->ops->adjust_lru)

sys/dev/pci/drm/i915/gem/i915_gem_object.h

214

obj->ops->adjust_lru(obj);

sys/dev/pci/drm/i915/gem/i915_gem_object.h

277

return obj->ops->flags & flags;

sys/dev/pci/drm/i915/gem/i915_gem_object.h

48

const struct drm_i915_gem_object_ops *ops,

sys/dev/pci/drm/i915/gem/i915_gem_object_types.h

255

const struct drm_i915_gem_object_ops *ops;

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

113

err = obj->ops->get_pages(obj);

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

171

if (obj->ops->truncate)

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

172

return obj->ops->truncate(obj);

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

267

obj->ops->put_pages(obj, pages);

sys/dev/pci/drm/i915/gem/i915_gem_region.c

157

const struct i915_gem_apply_to_region_ops *ops = apply->ops;

sys/dev/pci/drm/i915/gem/i915_gem_region.c

195

ret = ops->process_obj(apply, obj);

sys/dev/pci/drm/i915/gem/i915_gem_region.c

94

err = mem->ops->init_object(mem, obj, offset, size, page_size, flags);

sys/dev/pci/drm/i915/gem/i915_gem_region.h

45

const struct i915_gem_apply_to_region_ops *ops;

sys/dev/pci/drm/i915/gem/i915_gem_shmem.c

866

return obj->ops == &i915_gem_shmem_ops;

sys/dev/pci/drm/i915/gem/i915_gem_shrinker.c

60

if (obj->ops->shrink) {

sys/dev/pci/drm/i915/gem/i915_gem_shrinker.c

69

return obj->ops->shrink(obj, shrink_flags);

sys/dev/pci/drm/i915/gem/i915_gem_stolen.c

1064

return obj->ops == &i915_gem_object_stolen_ops;

sys/dev/pci/drm/i915/gem/i915_gem_ttm_pm.c

137

struct i915_gem_apply_to_region apply = {.ops = &recover_ops};

sys/dev/pci/drm/i915/gem/i915_gem_ttm_pm.c

160

.base = {.ops = &backup_ops},

sys/dev/pci/drm/i915/gem/i915_gem_ttm_pm.c

227

.base = {.ops = &restore_ops},

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

876

if (obj->ops->mmap_offset)

sys/dev/pci/drm/i915/gem/selftests/mock_dmabuf.c

117

exp_info.ops = &mock_dmabuf_ops;

sys/dev/pci/drm/i915/gt/gen6_ppgtt.c

410

ppgtt->vma->ops = &pd_vma_ops;

sys/dev/pci/drm/i915/gt/intel_context.c

256

err = ce->ops->pre_pin(ce, ww, &vaddr);

sys/dev/pci/drm/i915/gt/intel_context.c

280

err = ce->ops->pin(ce, vaddr);

sys/dev/pci/drm/i915/gt/intel_context.c

305

ce->ops->post_unpin(ce);

sys/dev/pci/drm/i915/gt/intel_context.c

343

ce->ops->unpin(ce);

sys/dev/pci/drm/i915/gt/intel_context.c

344

ce->ops->post_unpin(ce);

sys/dev/pci/drm/i915/gt/intel_context.c

408

ce->ops = engine->cops;

sys/dev/pci/drm/i915/gt/intel_context.c

618

if (ce->ops->update_stats)

sys/dev/pci/drm/i915/gt/intel_context.c

619

ce->ops->update_stats(ce);

sys/dev/pci/drm/i915/gt/intel_context.c

622

if (ce->ops->flags & COPS_RUNTIME_CYCLES)

sys/dev/pci/drm/i915/gt/intel_context.c

636

if (ce->ops->flags & COPS_RUNTIME_CYCLES)

sys/dev/pci/drm/i915/gt/intel_context.c

648

if (ce->ops->revoke)

sys/dev/pci/drm/i915/gt/intel_context.c

649

ce->ops->revoke(ce, rq,

sys/dev/pci/drm/i915/gt/intel_context.c

659

if (ce->ops->revoke)

sys/dev/pci/drm/i915/gt/intel_context.c

660

ce->ops->revoke(ce, NULL, ce->engine->props.preempt_timeout_ms);

sys/dev/pci/drm/i915/gt/intel_context.c

76

err = ce->ops->alloc(ce);

sys/dev/pci/drm/i915/gt/intel_context.h

130

GEM_BUG_ON(!ce->ops->cancel_request);

sys/dev/pci/drm/i915/gt/intel_context.h

131

return ce->ops->cancel_request(ce, rq);

sys/dev/pci/drm/i915/gt/intel_context.h

187

if (!ce->ops->sched_disable) {

sys/dev/pci/drm/i915/gt/intel_context.h

198

ce->ops->sched_disable(ce);

sys/dev/pci/drm/i915/gt/intel_context.h

214

ce->ops->enter(ce);

sys/dev/pci/drm/i915/gt/intel_context.h

233

ce->ops->exit(ce);

sys/dev/pci/drm/i915/gt/intel_context.h

244

kref_put(&ce->ref, ce->ops->destroy);

sys/dev/pci/drm/i915/gt/intel_context.h

289

if (ce->ops->close)

sys/dev/pci/drm/i915/gt/intel_context.h

290

ce->ops->close(ce);

sys/dev/pci/drm/i915/gt/intel_context.h

300

return test_bit(COPS_HAS_INFLIGHT_BIT, &ce->ops->flags);

sys/dev/pci/drm/i915/gt/intel_context_types.h

176

const struct intel_context_ops *ops;

sys/dev/pci/drm/i915/gt/intel_engine_pm.c

322

ce->ops->reset(ce);

sys/dev/pci/drm/i915/gt/intel_engine_pm.c

81

ce->ops->reset(ce);

sys/dev/pci/drm/i915/gt/intel_ggtt.c

1785

vma->ops->bind_vma(vm, NULL, vma->resource,

sys/dev/pci/drm/i915/gt/uc/intel_gsc_proxy.c

110

ret = comp->ops->send(comp->mei_dev, in, in_size);

sys/dev/pci/drm/i915/gt/uc/intel_gsc_proxy.c

116

ret = comp->ops->recv(comp->mei_dev, out, GSC_PROXY_MAX_MSG_SIZE);

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

4244

parent->ops = &virtual_parent_context_ops;

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

4246

ce->ops = &virtual_child_context_ops;

sys/dev/pci/drm/i915/gt/uc/intel_uc.c

126

uc->ops = &uc_ops_on;

sys/dev/pci/drm/i915/gt/uc/intel_uc.c

128

uc->ops = &uc_ops_off;

sys/dev/pci/drm/i915/gt/uc/intel_uc.h

107

if (uc->ops->_OPS) \

sys/dev/pci/drm/i915/gt/uc/intel_uc.h

108

return uc->ops->_OPS(uc); \

sys/dev/pci/drm/i915/gt/uc/intel_uc.h

31

struct intel_uc_ops const *ops;

sys/dev/pci/drm/i915/gvt/gtt.c

1009

const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

sys/dev/pci/drm/i915/gvt/gtt.c

1017

ips = vgpu_ips_enabled(vgpu) && ops->test_ips(we);

sys/dev/pci/drm/i915/gvt/gtt.c

1019

spt = intel_vgpu_find_spt_by_gfn(vgpu, ops->get_pfn(we));

sys/dev/pci/drm/i915/gvt/gtt.c

1042

spt = ppgtt_alloc_spt_gfn(vgpu, type, ops->get_pfn(we), ips);

sys/dev/pci/drm/i915/gvt/gtt.c

1073

const struct intel_gvt_gtt_pte_ops *ops = s->vgpu->gvt->gtt.pte_ops;

sys/dev/pci/drm/i915/gvt/gtt.c

1080

ops->clear_ips(se);

sys/dev/pci/drm/i915/gvt/gtt.c

1082

ops->set_pfn(se, s->shadow_page.mfn);

sys/dev/pci/drm/i915/gvt/gtt.c

1089

const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

sys/dev/pci/drm/i915/gvt/gtt.c

1099

start_gfn = ops->get_pfn(se);

sys/dev/pci/drm/i915/gvt/gtt.c

1116

ops->set_pfn(&sub_se, dma_addr >> PAGE_SHIFT);

sys/dev/pci/drm/i915/gvt/gtt.c

1123

ops->clear_pse(se);

sys/dev/pci/drm/i915/gvt/gtt.c

1124

ops->clear_ips(se);

sys/dev/pci/drm/i915/gvt/gtt.c

1125

ops->set_pfn(se, sub_spt->shadow_page.mfn);

sys/dev/pci/drm/i915/gvt/gtt.c

1145

const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

sys/dev/pci/drm/i915/gvt/gtt.c

1155

start_gfn = ops->get_pfn(se);

sys/dev/pci/drm/i915/gvt/gtt.c

1158

ops->set_64k_splited(&entry);

sys/dev/pci/drm/i915/gvt/gtt.c

1166

ops->set_pfn(&entry, dma_addr >> PAGE_SHIFT);

sys/dev/pci/drm/i915/gvt/gtt.c

1261

const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

sys/dev/pci/drm/i915/gvt/gtt.c

1270

if (!ops->test_present(se))

sys/dev/pci/drm/i915/gvt/gtt.c

1273

if (ops->get_pfn(se) ==

sys/dev/pci/drm/i915/gvt/gtt.c

1279

intel_vgpu_find_spt_by_mfn(vgpu, ops->get_pfn(se));

sys/dev/pci/drm/i915/gvt/gtt.c

1342

const struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;

sys/dev/pci/drm/i915/gvt/gtt.c

1356

ops->get_entry(oos_page->mem, &old, index, false, 0, vgpu);

sys/dev/pci/drm/i915/gvt/gtt.c

1357

ops->get_entry(NULL, &new, index, true,

sys/dev/pci/drm/i915/gvt/gtt.c

1372

ops->set_entry(oos_page->mem, &new, index, false, 0, vgpu);

sys/dev/pci/drm/i915/gvt/gtt.c

1513

const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

sys/dev/pci/drm/i915/gvt/gtt.c

1518

new_present = ops->test_present(we);

sys/dev/pci/drm/i915/gvt/gtt.c

1539

if (ops->test_64k_splited(&old_se) &&

sys/dev/pci/drm/i915/gvt/gtt.c

1543

ops->clear_64k_splited(&old_se);

sys/dev/pci/drm/i915/gvt/gtt.c

1544

ops->set_pfn(&old_se,

sys/dev/pci/drm/i915/gvt/gtt.c

1550

ops->clear_pse(&old_se);

sys/dev/pci/drm/i915/gvt/gtt.c

1551

ops->set_pfn(&old_se,

sys/dev/pci/drm/i915/gvt/gtt.c

1555

ops->set_pfn(&old_se,

sys/dev/pci/drm/i915/gvt/gtt.c

1630

const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

sys/dev/pci/drm/i915/gvt/gtt.c

1664

ops->set_pfn(&se, vgpu->gtt.scratch_pt[type].page_mfn);

sys/dev/pci/drm/i915/gvt/gtt.c

1676

ops->set_entry(spt->guest_page.oos_page->mem, &we, index,

sys/dev/pci/drm/i915/gvt/gtt.c

1695

const struct intel_gvt_gtt_pte_ops *ops = gtt->pte_ops;

sys/dev/pci/drm/i915/gvt/gtt.c

1705

if (!ops->test_present(&se))

sys/dev/pci/drm/i915/gvt/gtt.c

1725

const struct intel_gvt_gtt_pte_ops *ops = gtt->pte_ops;

sys/dev/pci/drm/i915/gvt/gtt.c

1741

if (!ops->test_present(&ge))

sys/dev/pci/drm/i915/gvt/gtt.c

1980

const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

sys/dev/pci/drm/i915/gvt/gtt.c

1983

s = intel_vgpu_find_spt_by_mfn(vgpu, ops->get_pfn(e));

sys/dev/pci/drm/i915/gvt/gtt.c

2148

const struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;

sys/dev/pci/drm/i915/gvt/gtt.c

2217

if (!partial_update && (ops->test_present(&e))) {

sys/dev/pci/drm/i915/gvt/gtt.c

2218

gfn = ops->get_pfn(&e);

sys/dev/pci/drm/i915/gvt/gtt.c

2230

ops->set_pfn(&m, gvt->gtt.scratch_mfn);

sys/dev/pci/drm/i915/gvt/gtt.c

2232

ops->set_pfn(&m, dma_addr >> PAGE_SHIFT);

sys/dev/pci/drm/i915/gvt/gtt.c

2234

ops->set_pfn(&m, gvt->gtt.scratch_mfn);

sys/dev/pci/drm/i915/gvt/gtt.c

2235

ops->clear_present(&m);

sys/dev/pci/drm/i915/gvt/gtt.c

2294

const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

sys/dev/pci/drm/i915/gvt/gtt.c

2337

ops->set_pfn(&se, gtt->scratch_pt[type - 1].page_mfn);

sys/dev/pci/drm/i915/gvt/gtt.c

2347

ops->set_entry(scratch_pt, &se, i, false, 0, vgpu);

sys/dev/pci/drm/i915/gvt/gtt.c

592

const struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;

sys/dev/pci/drm/i915/gvt/gtt.c

600

ret = ops->get_entry(page_table, e, index, guest,

sys/dev/pci/drm/i915/gvt/gtt.c

606

update_entry_type_for_real(ops, e, guest ?

sys/dev/pci/drm/i915/gvt/gtt.c

621

const struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;

sys/dev/pci/drm/i915/gvt/gtt.c

629

return ops->set_entry(page_table, e, index, guest,

sys/dev/pci/drm/i915/gvt/gtt.c

884

const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

sys/dev/pci/drm/i915/gvt/gtt.c

904

if (ops->get_pfn(e) ==

sys/dev/pci/drm/i915/gvt/gtt.c

908

s = intel_vgpu_find_spt_by_mfn(vgpu, ops->get_pfn(e));

sys/dev/pci/drm/i915/gvt/gtt.c

911

ops->get_pfn(e));

sys/dev/pci/drm/i915/gvt/gtt.c

921

const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

sys/dev/pci/drm/i915/gvt/gtt.c

925

pfn = ops->get_pfn(entry);

sys/dev/pci/drm/i915/gvt/gvt.h

164

const struct intel_vgpu_submission_ops *ops;

sys/dev/pci/drm/i915/gvt/interrupt.c

199

const struct intel_gvt_irq_ops *ops = gvt->irq.ops;

sys/dev/pci/drm/i915/gvt/interrupt.c

207

ops->check_pending_irq(vgpu);

sys/dev/pci/drm/i915/gvt/interrupt.c

229

const struct intel_gvt_irq_ops *ops = gvt->irq.ops;

sys/dev/pci/drm/i915/gvt/interrupt.c

246

ops->check_pending_irq(vgpu);

sys/dev/pci/drm/i915/gvt/interrupt.c

269

const struct intel_gvt_irq_ops *ops = gvt->irq.ops;

sys/dev/pci/drm/i915/gvt/interrupt.c

285

ops->check_pending_irq(vgpu);

sys/dev/pci/drm/i915/gvt/interrupt.c

684

const struct intel_gvt_irq_ops *ops = gvt->irq.ops;

sys/dev/pci/drm/i915/gvt/interrupt.c

691

ops->check_pending_irq(vgpu);

sys/dev/pci/drm/i915/gvt/interrupt.c

721

irq->ops = &gen8_irq_ops;

sys/dev/pci/drm/i915/gvt/interrupt.c

728

irq->ops->init_irq(irq);

sys/dev/pci/drm/i915/gvt/interrupt.h

186

const struct intel_gvt_irq_ops *ops;

sys/dev/pci/drm/i915/gvt/kvmgt.c

1629

if (vgpu->region[i].ops->release)

sys/dev/pci/drm/i915/gvt/kvmgt.c

1630

vgpu->region[i].ops->release(vgpu,

sys/dev/pci/drm/i915/gvt/kvmgt.c

542

const struct intel_vgpu_regops *ops,

sys/dev/pci/drm/i915/gvt/kvmgt.c

556

vgpu->region[vgpu->num_regions].ops = ops;

sys/dev/pci/drm/i915/gvt/kvmgt.c

82

const struct intel_vgpu_regops *ops;

sys/dev/pci/drm/i915/gvt/kvmgt.c

840

return vgpu->region[index].ops->rw(vgpu, buf, count,

sys/dev/pci/drm/i915/gvt/scheduler.c

1352

s->ops->reset(vgpu, engine_mask);

sys/dev/pci/drm/i915/gvt/scheduler.c

1473

const struct intel_vgpu_submission_ops *ops[] = {

sys/dev/pci/drm/i915/gvt/scheduler.c

1479

if (drm_WARN_ON(&i915->drm, interface >= ARRAY_SIZE(ops)))

sys/dev/pci/drm/i915/gvt/scheduler.c

1487

s->ops->clean(vgpu, engine_mask);

sys/dev/pci/drm/i915/gvt/scheduler.c

1490

s->ops = NULL;

sys/dev/pci/drm/i915/gvt/scheduler.c

1497

ret = ops[interface]->init(vgpu, engine_mask);

sys/dev/pci/drm/i915/gvt/scheduler.c

1501

s->ops = ops[interface];

sys/dev/pci/drm/i915/gvt/scheduler.c

1506

vgpu->id, s->ops->name);

sys/dev/pci/drm/i915/i915_driver.c

1998

dp->curval = bd->ops->get_brightness(bd);

sys/dev/pci/drm/i915/i915_gem.c

1069

if (obj->ops->adjust_lru)

sys/dev/pci/drm/i915/i915_gem.c

1070

obj->ops->adjust_lru(obj);

sys/dev/pci/drm/i915/i915_gem.c

488

if (obj->ops->pread)

sys/dev/pci/drm/i915/i915_gem.c

489

ret = obj->ops->pread(obj, args);

sys/dev/pci/drm/i915/i915_gem.c

776

if (obj->ops->pwrite)

sys/dev/pci/drm/i915/i915_gem.c

777

ret = obj->ops->pwrite(obj, args);

sys/dev/pci/drm/i915/i915_hwmon.c

793

.ops = &hwm_ops,

sys/dev/pci/drm/i915/i915_hwmon.c

831

.ops = &hwm_gt_ops,

sys/dev/pci/drm/i915/i915_mitigations.c

129

static const struct kernel_param_ops ops = {

sys/dev/pci/drm/i915/i915_mitigations.c

134

module_param_cb_unsafe(mitigations, &ops, NULL, 0600);

sys/dev/pci/drm/i915/i915_perf.c

1000

stream->perf->ops.oa_enable(stream);

sys/dev/pci/drm/i915/i915_perf.c

1212

stream->perf->ops.oa_disable(stream);

sys/dev/pci/drm/i915/i915_perf.c

1213

stream->perf->ops.oa_enable(stream);

sys/dev/pci/drm/i915/i915_perf.c

1290

return stream->perf->ops.read(stream, buf, count, offset);

sys/dev/pci/drm/i915/i915_perf.c

1697

perf->ops.disable_metric_set(stream);

sys/dev/pci/drm/i915/i915_perf.c

3084

stream->perf->ops.oa_enable(stream);

sys/dev/pci/drm/i915/i915_perf.c

3151

stream->perf->ops.oa_disable(stream);

sys/dev/pci/drm/i915/i915_perf.c

3175

err = stream->perf->ops.enable_metric_set(stream, active);

sys/dev/pci/drm/i915/i915_perf.c

3297

if (!perf->ops.enable_metric_set) {

sys/dev/pci/drm/i915/i915_perf.c

3381

stream->ops = &i915_oa_stream_ops;

sys/dev/pci/drm/i915/i915_perf.c

3407

perf->ops.disable_metric_set(stream);

sys/dev/pci/drm/i915/i915_perf.c

3488

ret = stream->ops->wait_unlocked(stream);

sys/dev/pci/drm/i915/i915_perf.c

3493

ret = stream->ops->read(stream, buf, count, &offset);

sys/dev/pci/drm/i915/i915_perf.c

3498

ret = stream->ops->read(stream, buf, count, &offset);

sys/dev/pci/drm/i915/i915_perf.c

3554

stream->ops->poll_wait(stream, file, wait);

sys/dev/pci/drm/i915/i915_perf.c

3611

if (stream->ops->enable)

sys/dev/pci/drm/i915/i915_perf.c

3612

stream->ops->enable(stream);

sys/dev/pci/drm/i915/i915_perf.c

3643

if (stream->ops->disable)

sys/dev/pci/drm/i915/i915_perf.c

3644

stream->ops->disable(stream);

sys/dev/pci/drm/i915/i915_perf.c

3748

if (stream->ops->destroy)

sys/dev/pci/drm/i915/i915_perf.c

3749

stream->ops->destroy(stream);

sys/dev/pci/drm/i915/i915_perf.c

3959

if (stream->ops->destroy)

sys/dev/pci/drm/i915/i915_perf.c

3960

stream->ops->destroy(stream);

sys/dev/pci/drm/i915/i915_perf.c

4702

perf->ops.is_valid_mux_reg,

sys/dev/pci/drm/i915/i915_perf.c

4716

perf->ops.is_valid_b_counter_reg,

sys/dev/pci/drm/i915/i915_perf.c

4736

perf->ops.is_valid_flex_reg,

sys/dev/pci/drm/i915/i915_perf.c

5116

perf->ops.is_valid_b_counter_reg = gen7_is_valid_b_counter_addr;

sys/dev/pci/drm/i915/i915_perf.c

5117

perf->ops.is_valid_mux_reg = hsw_is_valid_mux_addr;

sys/dev/pci/drm/i915/i915_perf.c

5118

perf->ops.is_valid_flex_reg = NULL;

sys/dev/pci/drm/i915/i915_perf.c

5119

perf->ops.enable_metric_set = hsw_enable_metric_set;

sys/dev/pci/drm/i915/i915_perf.c

5120

perf->ops.disable_metric_set = hsw_disable_metric_set;

sys/dev/pci/drm/i915/i915_perf.c

5121

perf->ops.oa_enable = gen7_oa_enable;

sys/dev/pci/drm/i915/i915_perf.c

5122

perf->ops.oa_disable = gen7_oa_disable;

sys/dev/pci/drm/i915/i915_perf.c

5123

perf->ops.read = gen7_oa_read;

sys/dev/pci/drm/i915/i915_perf.c

5124

perf->ops.oa_hw_tail_read = gen7_oa_hw_tail_read;

sys/dev/pci/drm/i915/i915_perf.c

5132

perf->ops.read = gen8_oa_read;

sys/dev/pci/drm/i915/i915_perf.c

5136

perf->ops.is_valid_b_counter_reg =

sys/dev/pci/drm/i915/i915_perf.c

5138

perf->ops.is_valid_mux_reg =

sys/dev/pci/drm/i915/i915_perf.c

5140

perf->ops.is_valid_flex_reg =

sys/dev/pci/drm/i915/i915_perf.c

5144

perf->ops.is_valid_mux_reg =

sys/dev/pci/drm/i915/i915_perf.c

5148

perf->ops.oa_enable = gen8_oa_enable;

sys/dev/pci/drm/i915/i915_perf.c

5149

perf->ops.oa_disable = gen8_oa_disable;

sys/dev/pci/drm/i915/i915_perf.c

5150

perf->ops.enable_metric_set = gen8_enable_metric_set;

sys/dev/pci/drm/i915/i915_perf.c

5151

perf->ops.disable_metric_set = gen8_disable_metric_set;

sys/dev/pci/drm/i915/i915_perf.c

5152

perf->ops.oa_hw_tail_read = gen8_oa_hw_tail_read;

sys/dev/pci/drm/i915/i915_perf.c

5154

perf->ops.is_valid_b_counter_reg =

sys/dev/pci/drm/i915/i915_perf.c

5156

perf->ops.is_valid_mux_reg =

sys/dev/pci/drm/i915/i915_perf.c

5158

perf->ops.is_valid_flex_reg =

sys/dev/pci/drm/i915/i915_perf.c

5161

perf->ops.oa_enable = gen8_oa_enable;

sys/dev/pci/drm/i915/i915_perf.c

5162

perf->ops.oa_disable = gen8_oa_disable;

sys/dev/pci/drm/i915/i915_perf.c

5163

perf->ops.enable_metric_set = gen8_enable_metric_set;

sys/dev/pci/drm/i915/i915_perf.c

5164

perf->ops.disable_metric_set = gen11_disable_metric_set;

sys/dev/pci/drm/i915/i915_perf.c

5165

perf->ops.oa_hw_tail_read = gen8_oa_hw_tail_read;

sys/dev/pci/drm/i915/i915_perf.c

5167

perf->ops.is_valid_b_counter_reg =

sys/dev/pci/drm/i915/i915_perf.c

5171

perf->ops.is_valid_mux_reg =

sys/dev/pci/drm/i915/i915_perf.c

5173

perf->ops.is_valid_flex_reg =

sys/dev/pci/drm/i915/i915_perf.c

5176

perf->ops.oa_enable = gen12_oa_enable;

sys/dev/pci/drm/i915/i915_perf.c

5177

perf->ops.oa_disable = gen12_oa_disable;

sys/dev/pci/drm/i915/i915_perf.c

5178

perf->ops.enable_metric_set = gen12_enable_metric_set;

sys/dev/pci/drm/i915/i915_perf.c

5179

perf->ops.disable_metric_set = gen12_disable_metric_set;

sys/dev/pci/drm/i915/i915_perf.c

5180

perf->ops.oa_hw_tail_read = gen12_oa_hw_tail_read;

sys/dev/pci/drm/i915/i915_perf.c

5184

if (perf->ops.enable_metric_set) {

sys/dev/pci/drm/i915/i915_perf.c

5278

memset(&perf->ops, 0, sizeof(perf->ops));

sys/dev/pci/drm/i915/i915_perf.c

566

hw_tail = stream->perf->ops.oa_hw_tail_read(stream);

sys/dev/pci/drm/i915/i915_perf.c

999

stream->perf->ops.oa_disable(stream);

sys/dev/pci/drm/i915/i915_perf_types.h

229

const struct i915_perf_stream_ops *ops;

sys/dev/pci/drm/i915/i915_perf_types.h

500

struct i915_oa_ops ops;

sys/dev/pci/drm/i915/i915_request.h

369

return fence->ops == &i915_fence_ops;

sys/dev/pci/drm/i915/i915_scatterlist.h

195

const struct i915_refct_sgt_ops *ops;

sys/dev/pci/drm/i915/i915_scatterlist.h

205

kref_put(&rsgt->kref, rsgt->ops->release);

sys/dev/pci/drm/i915/i915_scatterlist.h

229

const struct i915_refct_sgt_ops *ops)

sys/dev/pci/drm/i915/i915_scatterlist.h

234

rsgt->ops = ops;

sys/dev/pci/drm/i915/i915_sw_fence_work.c

11

if (f->ops->release)

sys/dev/pci/drm/i915/i915_sw_fence_work.c

12

f->ops->release(f);

sys/dev/pci/drm/i915/i915_sw_fence_work.c

20

f->ops->work(f);

sys/dev/pci/drm/i915/i915_sw_fence_work.c

64

return f->ops->name ?: "work";

sys/dev/pci/drm/i915/i915_sw_fence_work.c

84

const struct dma_fence_work_ops *ops)

sys/dev/pci/drm/i915/i915_sw_fence_work.c

86

f->ops = ops;

sys/dev/pci/drm/i915/i915_sw_fence_work.h

32

const struct dma_fence_work_ops *ops;

sys/dev/pci/drm/i915/i915_sw_fence_work.h

40

const struct dma_fence_work_ops *ops);

sys/dev/pci/drm/i915/i915_vma.c

170

vma->ops = &vm->vma_ops;

sys/dev/pci/drm/i915/i915_vma.c

379

vma_res->ops->bind_vma(vma_res->vm, &vw->stash,

sys/dev/pci/drm/i915/i915_vma.c

465

vma->ops, vma->private, __i915_vma_offset(vma),

sys/dev/pci/drm/i915/i915_vma.c

583

vma->ops->bind_vma(vma->vm, NULL, vma->resource, pat_index,

sys/dev/pci/drm/i915/i915_vma_resource.c

252

vma_res->ops->unbind_vma(vm, vma_res);

sys/dev/pci/drm/i915/i915_vma_resource.h

124

const struct i915_vma_ops *ops;

sys/dev/pci/drm/i915/i915_vma_resource.h

209

const struct i915_vma_ops *ops,

sys/dev/pci/drm/i915/i915_vma_resource.h

227

vma_res->ops = ops;

sys/dev/pci/drm/i915/i915_vma_types.h

141

const struct i915_vma_ops *ops;

sys/dev/pci/drm/i915/intel_gvt.c

190

int intel_gvt_set_ops(const struct intel_vgpu_ops *ops)

sys/dev/pci/drm/i915/intel_gvt.c

199

intel_gvt_ops = ops;

sys/dev/pci/drm/i915/intel_gvt.c

209

void intel_gvt_clear_ops(const struct intel_vgpu_ops *ops)

sys/dev/pci/drm/i915/intel_gvt.c

214

if (intel_gvt_ops != ops) {

sys/dev/pci/drm/i915/intel_gvt.h

52

int intel_gvt_set_ops(const struct intel_vgpu_ops *ops);

sys/dev/pci/drm/i915/intel_gvt.h

53

void intel_gvt_clear_ops(const struct intel_vgpu_ops *ops);

sys/dev/pci/drm/i915/intel_memory_region.c

259

const struct intel_memory_region_ops *ops)

sys/dev/pci/drm/i915/intel_memory_region.c

272

mem->ops = ops;

sys/dev/pci/drm/i915/intel_memory_region.c

283

if (ops->init) {

sys/dev/pci/drm/i915/intel_memory_region.c

284

err = ops->init(mem);

sys/dev/pci/drm/i915/intel_memory_region.c

296

if (mem->ops->release)

sys/dev/pci/drm/i915/intel_memory_region.c

297

mem->ops->release(mem);

sys/dev/pci/drm/i915/intel_memory_region.c

331

if (mem->ops->release)

sys/dev/pci/drm/i915/intel_memory_region.c

332

ret = mem->ops->release(mem);

sys/dev/pci/drm/i915/intel_memory_region.h

103

const struct intel_memory_region_ops *ops);

sys/dev/pci/drm/i915/intel_memory_region.h

62

const struct intel_memory_region_ops *ops;

sys/dev/pci/drm/i915/intel_wakeref.c

101

const struct intel_wakeref_ops *ops,

sys/dev/pci/drm/i915/intel_wakeref.c

106

wf->ops = ops;

sys/dev/pci/drm/i915/intel_wakeref.c

32

ret = wf->ops->get(wf);

sys/dev/pci/drm/i915/intel_wakeref.c

62

if (likely(!wf->ops->put(wf))) {

sys/dev/pci/drm/i915/intel_wakeref.h

47

const struct intel_wakeref_ops *ops;

sys/dev/pci/drm/i915/intel_wakeref.h

63

const struct intel_wakeref_ops *ops,

sys/dev/pci/drm/i915/intel_wakeref.h

66

#define intel_wakeref_init(wf, i915, ops, name) do { \

sys/dev/pci/drm/i915/intel_wakeref.h

69

__intel_wakeref_init((wf), (i915), (ops), &__key, name); \

sys/dev/pci/drm/i915/pxp/intel_pxp_tee.c

126

if (unlikely(!pxp_component || !pxp_component->ops->gsc_command)) {

sys/dev/pci/drm/i915/pxp/intel_pxp_tee.c

137

ret = pxp_component->ops->gsc_command(pxp_component->tee_dev, client_id,

sys/dev/pci/drm/i915/pxp/intel_pxp_tee.c

78

ret = pxp_component->ops->send(pxp_component->tee_dev, msg_in, msg_in_size,

sys/dev/pci/drm/i915/pxp/intel_pxp_tee.c

85

ret = pxp_component->ops->recv(pxp_component->tee_dev, msg_out, msg_out_max_size,

sys/dev/pci/drm/i915/selftests/i915_perf.c

430

if (!perf->metrics_kobj || !perf->ops.enable_metric_set)

sys/dev/pci/drm/i915/selftests/mock_gem_device.c

111

.ops = {

sys/dev/pci/drm/include/drm/drm_audio_component.h

118

const struct drm_audio_component_ops *ops;

sys/dev/pci/drm/include/drm/drm_bridge.h

1032

enum drm_bridge_ops ops;

sys/dev/pci/drm/include/drm/drm_gpusvm.h

209

const struct drm_gpusvm_ops *ops;

sys/dev/pci/drm/include/drm/drm_gpusvm.h

256

const struct drm_gpusvm_ops *ops,

sys/dev/pci/drm/include/drm/drm_gpuvm.h

1015

#define drm_gpuva_for_each_op(op, ops) list_for_each_entry(op, &(ops)->list, entry)

sys/dev/pci/drm/include/drm/drm_gpuvm.h

1026

#define drm_gpuva_for_each_op_safe(op, next, ops) \

sys/dev/pci/drm/include/drm/drm_gpuvm.h

1027

list_for_each_entry_safe(op, next, &(ops)->list, entry)

sys/dev/pci/drm/include/drm/drm_gpuvm.h

1037

#define drm_gpuva_for_each_op_from_reverse(op, ops) \

sys/dev/pci/drm/include/drm/drm_gpuvm.h

1038

list_for_each_entry_from_reverse(op, &(ops)->list, entry)

sys/dev/pci/drm/include/drm/drm_gpuvm.h

1047

#define drm_gpuva_for_each_op_reverse(op, ops) \

sys/dev/pci/drm/include/drm/drm_gpuvm.h

1048

list_for_each_entry_reverse(op, &(ops)->list, entry)

sys/dev/pci/drm/include/drm/drm_gpuvm.h

1054

#define drm_gpuva_first_op(ops) \

sys/dev/pci/drm/include/drm/drm_gpuvm.h

1055

list_first_entry(&(ops)->list, struct drm_gpuva_op, entry)

sys/dev/pci/drm/include/drm/drm_gpuvm.h

1061

#define drm_gpuva_last_op(ops) \

sys/dev/pci/drm/include/drm/drm_gpuvm.h

1062

list_last_entry(&(ops)->list, struct drm_gpuva_op, entry)

sys/dev/pci/drm/include/drm/drm_gpuvm.h

1105

struct drm_gpuva_ops *ops);

sys/dev/pci/drm/include/drm/drm_gpuvm.h

284

const struct drm_gpuvm_ops *ops;

sys/dev/pci/drm/include/drm/drm_gpuvm.h

342

const struct drm_gpuvm_ops *ops);

sys/dev/pci/drm/include/drm/drm_mipi_dsi.h

22

const struct mipi_dsi_host_ops *ops;

sys/dev/pci/drm/include/drm/drm_pagemap.h

136

const struct drm_pagemap_ops *ops;

sys/dev/pci/drm/include/drm/drm_pagemap.h

242

const struct drm_pagemap_devmem_ops *ops;

sys/dev/pci/drm/include/drm/drm_pagemap.h

263

const struct drm_pagemap_devmem_ops *ops,

sys/dev/pci/drm/include/drm/drm_privacy_screen_driver.h

63

const struct drm_privacy_screen_ops *ops;

sys/dev/pci/drm/include/drm/drm_privacy_screen_driver.h

89

struct device *parent, const struct drm_privacy_screen_ops *ops,

sys/dev/pci/drm/include/drm/gpu_scheduler.h

578

const struct drm_sched_backend_ops *ops;

sys/dev/pci/drm/include/drm/gpu_scheduler.h

622

const struct drm_sched_backend_ops *ops;

sys/dev/pci/drm/include/drm/intel/i915_gsc_proxy_mei_interface.h

50

const struct i915_gsc_proxy_component_ops *ops;

sys/dev/pci/drm/include/drm/intel/i915_hdcp_interface.h

48

const struct i915_hdcp_ops *ops;

sys/dev/pci/drm/include/drm/intel/i915_pxp_tee_interface.h

54

const struct i915_pxp_component_ops *ops;

sys/dev/pci/drm/include/drm/ttm/ttm_bo.h

228

const struct ttm_lru_walk_ops *ops;

sys/dev/pci/drm/include/drm/ttm/ttm_kmap_iter.h

58

const struct ttm_kmap_iter_ops *ops;

sys/dev/pci/drm/include/linux/backlight.h

37

const struct backlight_ops *ops;

sys/dev/pci/drm/include/linux/backlight.h

74

bd->ops->update_status(bd);

sys/dev/pci/drm/include/linux/backlight.h

80

bd->props.brightness = bd->ops->get_brightness(bd);

sys/dev/pci/drm/include/linux/backlight.h

89

bd->ops->update_status(bd);

sys/dev/pci/drm/include/linux/dma-buf.h

31

const struct dma_buf_ops *ops;

sys/dev/pci/drm/include/linux/dma-buf.h

59

const struct dma_buf_ops *ops;

sys/dev/pci/drm/include/linux/dma-fence-array.h

28

if (fence->ops != &dma_fence_array_ops)

sys/dev/pci/drm/include/linux/dma-fence-array.h

37

return fence->ops == &dma_fence_array_ops;

sys/dev/pci/drm/include/linux/dma-fence-chain.h

29

return fence->ops == &dma_fence_chain_ops;

sys/dev/pci/drm/include/linux/dma-fence-chain.h

35

if ((fence == NULL) || (fence->ops != &dma_fence_chain_ops))

sys/dev/pci/drm/include/linux/dma-fence.h

152

return fence->ops->get_driver_name(fence);

sys/dev/pci/drm/include/linux/dma-fence.h

158

return fence->ops->get_timeline_name(fence);

sys/dev/pci/drm/include/linux/dma-fence.h

17

const struct dma_fence_ops *ops;

sys/dev/pci/drm/include/linux/vga_switcheroo.h

18

const struct vga_switcheroo_client_ops *ops, bool x)

sys/dev/pci/drm/radeon/radeon.h

2537

if (__f->base.ops == &radeon_fence_ops)

sys/dev/pci/drm/radeon/radeon_audio.c

805

acomp->ops = &radeon_audio_component_ops;

sys/dev/pci/drm/radeon/radeon_audio.c

824

acomp->ops = NULL;

sys/dev/pci/drm/scheduler/sched_entity.c

219

job->sched->ops->free_job(job);

sys/dev/pci/drm/scheduler/sched_entity.c

478

if (job->sched->ops->prepare_job)

sys/dev/pci/drm/scheduler/sched_entity.c

479

return job->sched->ops->prepare_job(job, entity);

sys/dev/pci/drm/scheduler/sched_fence.c

219

if (f->ops == &drm_sched_fence_ops_scheduled)

sys/dev/pci/drm/scheduler/sched_fence.c

222

if (f->ops == &drm_sched_fence_ops_finished)

sys/dev/pci/drm/scheduler/sched_main.c

1222

sched->ops->free_job(job);

sys/dev/pci/drm/scheduler/sched_main.c

1267

fence = sched->ops->run_job(sched_job);

sys/dev/pci/drm/scheduler/sched_main.c

1320

sched->ops = args->ops;

sys/dev/pci/drm/scheduler/sched_main.c

1400

sched->ops->cancel_job(job);

sys/dev/pci/drm/scheduler/sched_main.c

1402

sched->ops->free_job(job);

sys/dev/pci/drm/scheduler/sched_main.c

1464

if (sched->ops->cancel_job)

sys/dev/pci/drm/scheduler/sched_main.c

566

status = job->sched->ops->timedout_job(job);

sys/dev/pci/drm/scheduler/sched_main.c

573

job->sched->ops->free_job(job);

sys/dev/pci/drm/scheduler/sched_main.c

664

sched->ops->free_job(s_job);

sys/dev/pci/drm/scheduler/sched_main.c

759

fence = sched->ops->run_job(s_job);

sys/dev/pci/drm/ttm/ttm_bo.c

1247

.ops = &ttm_swap_ops,

sys/dev/pci/drm/ttm/ttm_bo.c

224

if (!fence->ops->signaled)

sys/dev/pci/drm/ttm/ttm_bo.c

568

.ops = &ttm_evict_walk_ops,

sys/dev/pci/drm/ttm/ttm_bo_util.c

190

clear = src_iter->ops->maps_tt && (!ttm || !ttm_tt_is_populated(ttm));

sys/dev/pci/drm/ttm/ttm_bo_util.c

195

if (!src_iter->ops->maps_tt)

sys/dev/pci/drm/ttm/ttm_bo_util.c

200

if (!dst_iter->ops->maps_tt)

sys/dev/pci/drm/ttm/ttm_bo_util.c

916

lret = walk->ops->process_bo(walk, bo);

sys/dev/pci/drm/ttm/ttm_bo_util.c

94

const struct ttm_kmap_iter_ops *dst_ops = dst_iter->ops;

sys/dev/pci/drm/ttm/ttm_bo_util.c

95

const struct ttm_kmap_iter_ops *src_ops = src_iter->ops;

sys/dev/pci/drm/ttm/ttm_resource.c

775

iter_io->base.ops = &ttm_kmap_iter_io_ops;

sys/dev/pci/drm/ttm/ttm_resource.c

906

iter_io->base.ops = &ttm_kmap_iter_linear_io_ops;

sys/dev/pci/drm/ttm/ttm_tt.c

583

iter_tt->base.ops = &ttm_kmap_iter_tt_ops;

sys/dev/pci/if_athn_pci.c

121

sc->ops.read = athn_pci_read;

sys/dev/pci/if_athn_pci.c

122

sc->ops.write = athn_pci_write;

sys/dev/pci/if_athn_pci.c

123

sc->ops.write_barrier = athn_pci_write_barrier;

sys/dev/pci/if_casvar.h

189

#define CAS_CDTXSYNC(sc, x, n, ops) \

sys/dev/pci/if_casvar.h

200

(CAS_NTXDESC - __x), (ops)); \

sys/dev/pci/if_casvar.h

207

CAS_CDTXOFF(__x), sizeof(struct cas_desc) * __n, (ops)); \

sys/dev/pci/if_casvar.h

210

#define CAS_CDRXSYNC(sc, x, ops) \

sys/dev/pci/if_casvar.h

212

CAS_CDRXOFF((x)), sizeof(struct cas_desc), (ops))

sys/dev/pci/if_casvar.h

214

#define CAS_CDRXCSYNC(sc, x, ops) \

sys/dev/pci/if_casvar.h

216

CAS_CDRXCOFF((x)), sizeof(struct cas_desc), (ops))

sys/dev/pci/if_ice.c

3079

module_id_cnt = le16toh(cmd->ops.cfg.mdl_cnt);

sys/dev/pci/if_ice.c

3092

cfg->log_resolution = le16toh(cmd->ops.cfg.log_resolution);

sys/dev/pci/if_ice.c

3187

cmd->ops.cfg.log_resolution = htole16(log_resolution);

sys/dev/pci/if_ice.c

3188

cmd->ops.cfg.mdl_cnt = htole16(num_entries);

sys/dev/pci/if_icereg.h

12448

} ops;

sys/dev/pci/if_icereg.h

9898

} ops;

sys/dev/pci/if_iwn.c

1411

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

1466

ops->read_eeprom(sc);

sys/dev/pci/if_iwn.c

1997

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

2166

rssi = ops->get_rssi(stat);

sys/dev/pci/if_iwn.c

2468

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

2490

temp = ops->get_temperature(sc);

sys/dev/pci/if_iwn.c

2530

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

2538

ops->reset_sched(sc, qid, txq->read);

sys/dev/pci/if_iwn.c

2864

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

2903

ops->tx_done(sc, desc, data);

sys/dev/pci/if_iwn.c

3313

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

3645

ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);

sys/dev/pci/if_iwn.c

3797

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

3861

ops->update_sched(sc, ring->qid, ring->cur, 0, 0);

sys/dev/pci/if_iwn.c

3969

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

3980

if ((error = ops->add_node(sc, &node, async)) != 0)

sys/dev/pci/if_iwn.c

4398

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

4421

if ((error = ops->init_gains(sc)) != 0)

sys/dev/pci/if_iwn.c

4439

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

4469

(void)ops->set_gains(sc);

sys/dev/pci/if_iwn.c

4938

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

5064

if ((error = ops->set_txpower(sc, 0)) != 0) {

sys/dev/pci/if_iwn.c

5432

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

5484

if ((error = ops->set_txpower(sc, 1)) != 0) {

sys/dev/pci/if_iwn.c

5523

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

5591

if ((error = ops->set_txpower(sc, 1)) != 0) {

sys/dev/pci/if_iwn.c

5616

error = ops->add_node(sc, &node, 1);

sys/dev/pci/if_iwn.c

5658

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

5680

return ops->add_node(sc, &node, 1);

sys/dev/pci/if_iwn.c

5688

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

5708

(void)ops->add_node(sc, &node, 1);

sys/dev/pci/if_iwn.c

5720

sc->ops.update_rxon(sc);

sys/dev/pci/if_iwn.c

5745

sc->ops.update_rxon(sc);

sys/dev/pci/if_iwn.c

5766

sc->ops.update_rxon(sc);

sys/dev/pci/if_iwn.c

5773

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

5779

error = ops->set_txpower(sc, 1);

sys/dev/pci/if_iwn.c

586

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

5862

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

5875

return ops->add_node(sc, &node, 1);

sys/dev/pci/if_iwn.c

588

ops->load_firmware = iwn4965_load_firmware;

sys/dev/pci/if_iwn.c

5887

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

589

ops->read_eeprom = iwn4965_read_eeprom;

sys/dev/pci/if_iwn.c

5897

(void)ops->add_node(sc, &node, 1);

sys/dev/pci/if_iwn.c

590

ops->post_alive = iwn4965_post_alive;

sys/dev/pci/if_iwn.c

591

ops->nic_config = iwn4965_nic_config;

sys/dev/pci/if_iwn.c

5910

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

592

ops->reset_sched = iwn4965_reset_sched;

sys/dev/pci/if_iwn.c

5928

error = ops->add_node(sc, &node, 1);

sys/dev/pci/if_iwn.c

593

ops->update_sched = iwn4965_update_sched;

sys/dev/pci/if_iwn.c

5934

ops->ampdu_tx_start(sc, ni, tid, ba->ba_winstart);

sys/dev/pci/if_iwn.c

594

ops->update_rxon = iwn4965_update_rxon;

sys/dev/pci/if_iwn.c

595

ops->get_temperature = iwn4965_get_temperature;

sys/dev/pci/if_iwn.c

5950

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

596

ops->get_rssi = iwn4965_get_rssi;

sys/dev/pci/if_iwn.c

5961

ops->ampdu_tx_stop(sc, tid, ba->ba_winstart);

sys/dev/pci/if_iwn.c

597

ops->set_txpower = iwn4965_set_txpower;

sys/dev/pci/if_iwn.c

5975

ops->add_node(sc, &node, 1);

sys/dev/pci/if_iwn.c

598

ops->init_gains = iwn4965_init_gains;

sys/dev/pci/if_iwn.c

599

ops->set_gains = iwn4965_set_gains;

sys/dev/pci/if_iwn.c

600

ops->add_node = iwn4965_add_node;

sys/dev/pci/if_iwn.c

601

ops->tx_done = iwn4965_tx_done;

sys/dev/pci/if_iwn.c

602

ops->ampdu_tx_start = iwn4965_ampdu_tx_start;

sys/dev/pci/if_iwn.c

603

ops->ampdu_tx_stop = iwn4965_ampdu_tx_stop;

sys/dev/pci/if_iwn.c

626

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

628

ops->load_firmware = iwn5000_load_firmware;

sys/dev/pci/if_iwn.c

629

ops->read_eeprom = iwn5000_read_eeprom;

sys/dev/pci/if_iwn.c

630

ops->post_alive = iwn5000_post_alive;

sys/dev/pci/if_iwn.c

631

ops->nic_config = iwn5000_nic_config;

sys/dev/pci/if_iwn.c

632

ops->reset_sched = iwn5000_reset_sched;

sys/dev/pci/if_iwn.c

633

ops->update_sched = iwn5000_update_sched;

sys/dev/pci/if_iwn.c

634

ops->update_rxon = iwn5000_update_rxon;

sys/dev/pci/if_iwn.c

635

ops->get_temperature = iwn5000_get_temperature;

sys/dev/pci/if_iwn.c

636

ops->get_rssi = iwn5000_get_rssi;

sys/dev/pci/if_iwn.c

637

ops->set_txpower = iwn5000_set_txpower;

sys/dev/pci/if_iwn.c

638

ops->init_gains = iwn5000_init_gains;

sys/dev/pci/if_iwn.c

639

ops->set_gains = iwn5000_set_gains;

sys/dev/pci/if_iwn.c

640

ops->add_node = iwn5000_add_node;

sys/dev/pci/if_iwn.c

641

ops->tx_done = iwn5000_tx_done;

sys/dev/pci/if_iwn.c

642

ops->ampdu_tx_start = iwn5000_ampdu_tx_start;

sys/dev/pci/if_iwn.c

643

ops->ampdu_tx_stop = iwn5000_ampdu_tx_stop;

sys/dev/pci/if_iwn.c

7005

struct iwn_ops *ops = &sc->ops;

sys/dev/pci/if_iwn.c

7024

if ((error = ops->nic_config(sc)) != 0)

sys/dev/pci/if_iwn.c

7092

if ((error = ops->load_firmware(sc)) != 0) {

sys/dev/pci/if_iwn.c

7103

return ops->post_alive(sc);

sys/dev/pci/if_iwnvar.h

221

struct iwn_ops ops;

sys/dev/pci/if_ix.c

1430

hw->mac.ops.setup_link(hw, speed, TRUE);

sys/dev/pci/if_ix.c

1570

sc->hw.mac.ops.update_mc_addr_list(&sc->hw, update_ptr, mcnt,

sys/dev/pci/if_ix.c

1625

sc->hw.mac.ops.fc_enable(&sc->hw);

sys/dev/pci/if_ix.c

1659

sc->hw.mac.ops.reset_hw(&sc->hw);

sys/dev/pci/if_ix.c

1661

sc->hw.mac.ops.stop_adapter(&sc->hw);

sys/dev/pci/if_ix.c

1663

sc->hw.mac.ops.stop_mac_link_on_d3(&sc->hw);

sys/dev/pci/if_ix.c

1665

if (sc->hw.mac.ops.disable_tx_laser)

sys/dev/pci/if_ix.c

1666

sc->hw.mac.ops.disable_tx_laser(&sc->hw);

sys/dev/pci/if_ix.c

2000

sc->phy_layer = hw->mac.ops.get_supported_physical_layer(hw);

sys/dev/pci/if_ix.c

2053

sc->hw.mac.ops.setup_sfp(&sc->hw);

sys/dev/pci/if_ix.c

2054

if (sc->hw.mac.ops.enable_tx_laser)

sys/dev/pci/if_ix.c

2055

sc->hw.mac.ops.enable_tx_laser(&sc->hw);

sys/dev/pci/if_ix.c

2060

if (sc->hw.mac.ops.check_link)

sys/dev/pci/if_ix.c

2061

err = sc->hw.mac.ops.check_link(&sc->hw, &autoneg,

sys/dev/pci/if_ix.c

2066

if ((!autoneg) && (sc->hw.mac.ops.get_link_capabilities))

sys/dev/pci/if_ix.c

2067

err = sc->hw.mac.ops.get_link_capabilities(&sc->hw,

sys/dev/pci/if_ix.c

2071

if (sc->hw.mac.ops.setup_link)

sys/dev/pci/if_ix.c

2072

sc->hw.mac.ops.setup_link(&sc->hw,

sys/dev/pci/if_ix.c

294

if (sc->hw.eeprom.ops.validate_checksum(&sc->hw, &csum) < 0) {

sys/dev/pci/if_ix.c

323

if (sc->hw.mac.ops.enable_tx_laser)

sys/dev/pci/if_ix.c

324

sc->hw.mac.ops.enable_tx_laser(&sc->hw);

sys/dev/pci/if_ix.c

327

if (hw->phy.ops.set_phy_power)

sys/dev/pci/if_ix.c

328

hw->phy.ops.set_phy_power(&sc->hw, TRUE);

sys/dev/pci/if_ix.c

334

hw->mac.ops.get_bus_info(hw);

sys/dev/pci/if_ix.c

3638

err = hw->phy.ops.identify_sfp(hw);

sys/dev/pci/if_ix.c

3644

err = hw->mac.ops.setup_sfp(hw);

sys/dev/pci/if_ix.c

3666

if ((!autoneg) && (hw->mac.ops.get_link_capabilities)) {

sys/dev/pci/if_ix.c

3667

if (hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate))

sys/dev/pci/if_ix.c

3670

if (hw->mac.ops.setup_link)

sys/dev/pci/if_ix.c

3671

hw->mac.ops.setup_link(hw, autoneg, TRUE);

sys/dev/pci/if_ix.c

3687

error = hw->phy.ops.handle_lasi(hw);

sys/dev/pci/if_ix.c

416

if (sc->hw.mac.ops.enable_tx_laser)

sys/dev/pci/if_ix.c

417

sc->hw.mac.ops.enable_tx_laser(&sc->hw);

sys/dev/pci/if_ix.c

420

if (hw->phy.ops.set_phy_power)

sys/dev/pci/if_ix.c

421

hw->phy.ops.set_phy_power(&sc->hw, TRUE);

sys/dev/pci/if_ix.c

424

hw->mac.ops.get_bus_info(hw);

sys/dev/pci/if_ix.c

617

if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))

sys/dev/pci/if_ix.c

621

if (hw->phy.ops.read_i2c_byte_unlocked(hw, 127,

sys/dev/pci/if_ix.c

625

hw->phy.ops.write_i2c_byte_unlocked(hw, 127,

sys/dev/pci/if_ix.c

631

if (hw->phy.ops.read_i2c_byte_unlocked(hw, i,

sys/dev/pci/if_ix.c

638

hw->phy.ops.write_i2c_byte_unlocked(hw, 127,

sys/dev/pci/if_ix.c

645

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/pci/if_ix.c

861

sc->hw.mac.ops.enable_rx_dma(&sc->hw, rxctrl);

sys/dev/pci/if_ix.c

881

err = sc->hw.phy.ops.identify(&sc->hw);

sys/dev/pci/if_ix.c

902

if (sc->hw.phy.ops.set_phy_power)

sys/dev/pci/if_ix.c

903

sc->hw.phy.ops.set_phy_power(&sc->hw, TRUE);

sys/dev/pci/if_ix.c

912

sc->hw.mac.ops.start_hw(&sc->hw);

sys/dev/pci/if_ixl.c

4248

const struct ixl_sff_ops *ops;

sys/dev/pci/if_ixl.c

4259

ops = &ixl_sfp_ops;

sys/dev/pci/if_ixl.c

4264

ops = &ixl_qsfp_ops;

sys/dev/pci/if_ixl.c

4270

error = (*ops->open)(sc, sff, &page);

sys/dev/pci/if_ixl.c

4275

error = (*ops->get)(sc, sff, i);

sys/dev/pci/if_ixl.c

4280

error = (*ops->close)(sc, sff, page);

sys/dev/pci/if_ixv.c

1080

while (hw->mac.ops.set_vfta(hw, vid, 0, TRUE, FALSE)) {

sys/dev/pci/if_ixv.c

279

error = hw->mac.ops.reset_hw(hw);

sys/dev/pci/if_ixv.c

292

error = hw->mac.ops.init_hw(hw);

sys/dev/pci/if_ixv.c

323

if (hw->mac.ops.get_link_state(hw, &sc->link_enabled)) {

sys/dev/pci/if_ixv.c

442

hw->mac.ops.stop_adapter(hw);

sys/dev/pci/if_ixv.c

445

hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);

sys/dev/pci/if_ixv.c

453

hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, 1);

sys/dev/pci/if_ixv.c

464

hw->mac.ops.reset_hw(hw);

sys/dev/pci/if_ixv.c

508

error = hw->mac.ops.get_link_state(hw, &sc->link_enabled);

sys/dev/pci/if_ixv.c

515

hw->mac.ops.check_link(hw, &sc->link_speed, &sc->link_up,

sys/dev/pci/if_ixv.c

667

hw->mac.ops.update_mc_addr_list(hw, update_ptr, mcnt,

sys/dev/pci/if_ixv.c

681

hw->mac.ops.update_xcast_mode(hw, xcast_mode);

sys/dev/pci/if_ixv.c

728

hw->mac.ops.reset_hw(hw);

sys/dev/pci/if_ixv.c

730

hw->mac.ops.stop_adapter(hw);

sys/dev/pci/if_ixv.c

733

hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);

sys/dev/pci/if_mcx.c

3472

mcx_cmdq_mboxes_sync(struct mcx_softc *sc, struct mcx_dmamem *mxm, int ops)

sys/dev/pci/if_mcx.c

3475

0, MCX_DMA_LEN(mxm), ops);

sys/dev/pci/if_mskvar.h

122

#define MSK_CDTXSYNC(sc, x, n, ops) \

sys/dev/pci/if_mskvar.h

134

(ops)); \

sys/dev/pci/if_mskvar.h

141

MSK_CDTXOFF((__x)), sizeof(struct msk_tx_desc) * __n, (ops)); \

sys/dev/pci/if_mskvar.h

144

#define MSK_CDRXSYNC(sc, x, ops) \

sys/dev/pci/if_mskvar.h

147

MSK_CDRXOFF((x)), sizeof(struct msk_rx_desc), (ops)); \

sys/dev/pci/if_mskvar.h

150

#define MSK_CDSTSYNC(sc, x, ops) \

sys/dev/pci/if_mskvar.h

153

MSK_CDSTOFF((x)), sizeof(uint64_t), (ops)); \

sys/dev/pci/if_nfe.c

551

nfe_txdesc32_sync(struct nfe_softc *sc, struct nfe_desc32 *desc32, int ops)

sys/dev/pci/if_nfe.c

555

sizeof (struct nfe_desc32), ops);

sys/dev/pci/if_nfe.c

559

nfe_txdesc64_sync(struct nfe_softc *sc, struct nfe_desc64 *desc64, int ops)

sys/dev/pci/if_nfe.c

563

sizeof (struct nfe_desc64), ops);

sys/dev/pci/if_nfe.c

567

nfe_txdesc32_rsync(struct nfe_softc *sc, int start, int end, int ops)

sys/dev/pci/if_nfe.c

573

(caddr_t)&sc->txq.desc32[start], ops);

sys/dev/pci/if_nfe.c

580

(caddr_t)&sc->txq.desc32[start], ops);

sys/dev/pci/if_nfe.c

584

(caddr_t)&sc->txq.desc32[end] - (caddr_t)sc->txq.desc32, ops);

sys/dev/pci/if_nfe.c

588

nfe_txdesc64_rsync(struct nfe_softc *sc, int start, int end, int ops)

sys/dev/pci/if_nfe.c

594

(caddr_t)&sc->txq.desc64[start], ops);

sys/dev/pci/if_nfe.c

601

(caddr_t)&sc->txq.desc64[start], ops);

sys/dev/pci/if_nfe.c

605

(caddr_t)&sc->txq.desc64[end] - (caddr_t)sc->txq.desc64, ops);

sys/dev/pci/if_nfe.c

609

nfe_rxdesc32_sync(struct nfe_softc *sc, struct nfe_desc32 *desc32, int ops)

sys/dev/pci/if_nfe.c

613

sizeof (struct nfe_desc32), ops);

sys/dev/pci/if_nfe.c

617

nfe_rxdesc64_sync(struct nfe_softc *sc, struct nfe_desc64 *desc64, int ops)

sys/dev/pci/if_nfe.c

621

sizeof (struct nfe_desc64), ops);

sys/dev/pci/if_ngbe.c

1560

hw->mac.ops.update_mc_addr_list(hw, update_ptr, mcnt,

sys/dev/pci/if_ngbe.c

1578

hw->mac.ops.disable_rx(hw);

sys/dev/pci/if_ngbe.c

1658

hw->mac.ops.enable_rx_dma(hw, rxctrl);

sys/dev/pci/if_ngbe.c

1829

status = hw->mac.ops.reset_hw(sc);

sys/dev/pci/if_ngbe.c

1832

status = hw->mac.ops.start_hw(sc);

sys/dev/pci/if_ngbe.c

1844

phy->ops.reset = ngbe_phy_reset;

sys/dev/pci/if_ngbe.c

1845

phy->ops.read_reg = ngbe_phy_read_reg;

sys/dev/pci/if_ngbe.c

1846

phy->ops.write_reg = ngbe_phy_write_reg;

sys/dev/pci/if_ngbe.c

1847

phy->ops.setup_link = ngbe_phy_setup_link;

sys/dev/pci/if_ngbe.c

1848

phy->ops.phy_led_ctrl = ngbe_phy_led_ctrl;

sys/dev/pci/if_ngbe.c

1849

phy->ops.check_overtemp = ngbe_phy_check_overtemp;

sys/dev/pci/if_ngbe.c

1850

phy->ops.identify = ngbe_phy_identify;

sys/dev/pci/if_ngbe.c

1851

phy->ops.init = ngbe_phy_init;

sys/dev/pci/if_ngbe.c

1852

phy->ops.check_event = ngbe_phy_check_event;

sys/dev/pci/if_ngbe.c

1853

phy->ops.get_adv_pause = ngbe_phy_get_advertised_pause;

sys/dev/pci/if_ngbe.c

1854

phy->ops.get_lp_adv_pause = ngbe_phy_get_lp_advertised_pause;

sys/dev/pci/if_ngbe.c

1855

phy->ops.set_adv_pause = ngbe_phy_set_pause_advertisement;

sys/dev/pci/if_ngbe.c

1856

phy->ops.setup_once = ngbe_phy_setup;

sys/dev/pci/if_ngbe.c

1859

mac->ops.init_hw = ngbe_init_hw;

sys/dev/pci/if_ngbe.c

1860

mac->ops.clear_hw_cntrs = ngbe_clear_hw_cntrs;

sys/dev/pci/if_ngbe.c

1861

mac->ops.get_mac_addr = ngbe_get_mac_addr;

sys/dev/pci/if_ngbe.c

1862

mac->ops.stop_adapter = ngbe_stop_adapter;

sys/dev/pci/if_ngbe.c

1863

mac->ops.get_bus_info = ngbe_get_bus_info;

sys/dev/pci/if_ngbe.c

1864

mac->ops.set_lan_id = ngbe_set_lan_id_multi_port_pcie;

sys/dev/pci/if_ngbe.c

1865

mac->ops.acquire_swfw_sync = ngbe_acquire_swfw_sync;

sys/dev/pci/if_ngbe.c

1866

mac->ops.release_swfw_sync = ngbe_release_swfw_sync;

sys/dev/pci/if_ngbe.c

1867

mac->ops.reset_hw = ngbe_reset_hw;

sys/dev/pci/if_ngbe.c

1868

mac->ops.get_media_type = ngbe_get_media_type;

sys/dev/pci/if_ngbe.c

1869

mac->ops.disable_sec_rx_path = ngbe_disable_sec_rx_path;

sys/dev/pci/if_ngbe.c

1870

mac->ops.enable_sec_rx_path = ngbe_enable_sec_rx_path;

sys/dev/pci/if_ngbe.c

1871

mac->ops.enable_rx_dma = ngbe_enable_rx_dma;

sys/dev/pci/if_ngbe.c

1872

mac->ops.start_hw = ngbe_start_hw;

sys/dev/pci/if_ngbe.c

1875

mac->ops.set_rar = ngbe_set_rar;

sys/dev/pci/if_ngbe.c

1876

mac->ops.init_rx_addrs = ngbe_init_rx_addrs;

sys/dev/pci/if_ngbe.c

1877

mac->ops.update_mc_addr_list = ngbe_update_mc_addr_list;

sys/dev/pci/if_ngbe.c

1878

mac->ops.enable_rx = ngbe_enable_rx;

sys/dev/pci/if_ngbe.c

1879

mac->ops.disable_rx = ngbe_disable_rx;

sys/dev/pci/if_ngbe.c

1880

mac->ops.clear_vfta = ngbe_clear_vfta;

sys/dev/pci/if_ngbe.c

1881

mac->ops.init_uta_tables = ngbe_init_uta_tables;

sys/dev/pci/if_ngbe.c

1884

mac->ops.fc_enable = ngbe_fc_enable;

sys/dev/pci/if_ngbe.c

1885

mac->ops.setup_fc = ngbe_setup_fc;

sys/dev/pci/if_ngbe.c

1888

mac->ops.check_link = ngbe_check_mac_link;

sys/dev/pci/if_ngbe.c

1889

mac->ops.setup_rxpba = ngbe_set_rxpba;

sys/dev/pci/if_ngbe.c

1899

eeprom->ops.init_params = ngbe_init_eeprom_params;

sys/dev/pci/if_ngbe.c

1900

eeprom->ops.eeprom_chksum_cap_st = ngbe_eepromcheck_cap;

sys/dev/pci/if_ngbe.c

1901

eeprom->ops.phy_led_oem_chk = ngbe_phy_led_oem_chk;

sys/dev/pci/if_ngbe.c

1904

mac->ops.set_fw_drv_ver = ngbe_set_fw_drv_ver;

sys/dev/pci/if_ngbe.c

1905

mac->ops.init_thermal_sensor_thresh = ngbe_init_thermal_sensor_thresh;

sys/dev/pci/if_ngbe.c

1922

hw->mac.ops.get_mac_addr(hw, hw->mac.addr);

sys/dev/pci/if_ngbe.c

1944

hw->mac.ops.init_uta_tables(hw);

sys/dev/pci/if_ngbe.c

2014

hw->mac.ops.check_link(hw, &speed, &link_up, 0);

sys/dev/pci/if_ngbe.c

2046

hw->phy.ops.get_adv_pause(hw, &technology_ability_reg);

sys/dev/pci/if_ngbe.c

2047

hw->phy.ops.get_lp_adv_pause(hw, &lp_technology_ability_reg);

sys/dev/pci/if_ngbe.c

2282

status = hw->phy.ops.read_reg(hw,

sys/dev/pci/if_ngbe.c

2293

status = hw->phy.ops.read_reg(hw, NGBE_MDIO_AUTO_NEG_STATUS,

sys/dev/pci/if_ngbe.c

2418

hw->mac.ops.setup_rxpba(hw, 0, 0, PBA_STRATEGY_EQUAL);

sys/dev/pci/if_ngbe.c

2611

hw->mac.ops.disable_sec_rx_path(hw);

sys/dev/pci/if_ngbe.c

2614

hw->mac.ops.enable_rx(hw);

sys/dev/pci/if_ngbe.c

2616

hw->mac.ops.disable_rx(hw);

sys/dev/pci/if_ngbe.c

2618

hw->mac.ops.enable_sec_rx_path(hw);

sys/dev/pci/if_ngbe.c

274

sc->hw.mac.ops.set_lan_id(&sc->hw);

sys/dev/pci/if_ngbe.c

285

error = sc->hw.mac.ops.reset_hw(sc);

sys/dev/pci/if_ngbe.c

2869

hw->phy.ops.write_reg(hw, 0x11, 0xa4b, 0x1110);

sys/dev/pci/if_ngbe.c

2870

hw->phy.ops.write_reg(hw, MII_MMDACR, 0x0, MMDACR_FN_ADDRESS | 0x07);

sys/dev/pci/if_ngbe.c

2871

hw->phy.ops.write_reg(hw, MII_MMDAADR, 0x0, 0x003c);

sys/dev/pci/if_ngbe.c

2872

hw->phy.ops.write_reg(hw, MII_MMDACR, 0x0, MMDACR_FN_DATANPI | 0x07);

sys/dev/pci/if_ngbe.c

2873

hw->phy.ops.write_reg(hw, MII_MMDAADR, 0x0, 0);

sys/dev/pci/if_ngbe.c

2877

hw->phy.ops.read_reg(hw, MII_ANAR, 0, &val);

sys/dev/pci/if_ngbe.c

2879

hw->phy.ops.write_reg(hw, MII_ANAR, 0x0, val);

sys/dev/pci/if_ngbe.c

2937

hw->phy.ops.check_event(sc);

sys/dev/pci/if_ngbe.c

2956

if (hw->mac.ops.acquire_swfw_sync(sc, NGBE_MNG_SWFW_SYNC_SW_MB))

sys/dev/pci/if_ngbe.c

299

hw->eeprom.ops.init_params(hw);

sys/dev/pci/if_ngbe.c

300

hw->mac.ops.release_swfw_sync(sc, NGBE_MNG_SWFW_SYNC_SW_MB);

sys/dev/pci/if_ngbe.c

303

if (hw->eeprom.ops.eeprom_chksum_cap_st(sc, NGBE_CALSUM_COMMAND,

sys/dev/pci/if_ngbe.c

3063

hw->mac.ops.release_swfw_sync(sc, NGBE_MNG_SWFW_SYNC_SW_MB);

sys/dev/pci/if_ngbe.c

311

if (hw->eeprom.ops.phy_led_oem_chk(sc, &led_conf))

sys/dev/pci/if_ngbe.c

3189

error = hw->phy.ops.setup_once(sc);

sys/dev/pci/if_ngbe.c

3194

error = hw->mac.ops.setup_link(sc, speed, 0);

sys/dev/pci/if_ngbe.c

3217

hw->phy.ops.read_reg(hw, NGBE_MDIO_AUTO_NEG_LSC,

sys/dev/pci/if_ngbe.c

3241

hw->phy.ops.read_reg(hw, 4, 0, &value);

sys/dev/pci/if_ngbe.c

325

error = hw->mac.ops.start_hw(sc);

sys/dev/pci/if_ngbe.c

3250

hw->phy.ops.read_reg(hw, NGBE_MDIO_AUTO_NEG_LSC,

sys/dev/pci/if_ngbe.c

3252

hw->phy.ops.read_reg(hw, MII_BMSR, 0, &value);

sys/dev/pci/if_ngbe.c

3256

hw->phy.ops.read_reg(hw, MII_ANLPAR, 0, &value);

sys/dev/pci/if_ngbe.c

3293

error = hw->phy.ops.identify(sc);

sys/dev/pci/if_ngbe.c

3300

hw->phy.ops.write_reg(hw, 0x12, 0xa42, value);

sys/dev/pci/if_ngbe.c

332

hw->mac.ops.get_bus_info(sc);

sys/dev/pci/if_ngbe.c

3320

hw->phy.ops.write_reg(hw, 16, 0xd04, value);

sys/dev/pci/if_ngbe.c

3321

hw->phy.ops.write_reg(hw, 17, 0xd04, 0);

sys/dev/pci/if_ngbe.c

3323

hw->phy.ops.read_reg(hw, 18, 0xd04, &value);

sys/dev/pci/if_ngbe.c

3332

hw->phy.ops.write_reg(hw, 18, 0xd04, value);

sys/dev/pci/if_ngbe.c

334

hw->mac.ops.set_fw_drv_ver(sc, 0xff, 0xff, 0xff, 0xff);

sys/dev/pci/if_ngbe.c

3425

if (!hw->phy.reset_if_overtemp && hw->phy.ops.check_overtemp(hw) != 0) {

sys/dev/pci/if_ngbe.c

3436

status = hw->phy.ops.write_reg(hw, 0, 0, value);

sys/dev/pci/if_ngbe.c

3438

status = hw->phy.ops.read_reg(hw, 0, 0, &value);

sys/dev/pci/if_ngbe.c

3458

status = hw->phy.ops.read_reg(hw, MII_ANAR, 0, &value);

sys/dev/pci/if_ngbe.c

3461

status = hw->phy.ops.write_reg(hw, MII_ANAR, 0, value);

sys/dev/pci/if_ngbe.c

3484

hw->phy.ops.write_reg(hw, 20, 0xa46, 2);

sys/dev/pci/if_ngbe.c

3488

hw->phy.ops.read_reg(hw, 16, 0xa42, &value);

sys/dev/pci/if_ngbe.c

3509

status = hw->phy.ops.reset(sc);

sys/dev/pci/if_ngbe.c

3534

hw->phy.ops.write_reg(hw, 0, 0, value);

sys/dev/pci/if_ngbe.c

3540

hw->phy.ops.read_reg(hw, 4, 0, &value);

sys/dev/pci/if_ngbe.c

3542

hw->phy.ops.write_reg(hw, 4, 0, value);

sys/dev/pci/if_ngbe.c

3545

hw->phy.ops.read_reg(hw, 9, 0, &value);

sys/dev/pci/if_ngbe.c

3550

hw->phy.ops.write_reg(hw, 9, 0, value);

sys/dev/pci/if_ngbe.c

3552

hw->phy.ops.read_reg(hw, 4, 0, &value);

sys/dev/pci/if_ngbe.c

3557

hw->phy.ops.write_reg(hw, 4, 0, value);

sys/dev/pci/if_ngbe.c

3559

hw->phy.ops.read_reg(hw, 4, 0, &value);

sys/dev/pci/if_ngbe.c

3564

hw->phy.ops.write_reg(hw, 4, 0, value);

sys/dev/pci/if_ngbe.c

3568

hw->phy.ops.write_reg(hw, 0, 0, value);

sys/dev/pci/if_ngbe.c

3571

hw->phy.ops.phy_led_ctrl(sc);

sys/dev/pci/if_ngbe.c

3572

hw->phy.ops.check_event(sc);

sys/dev/pci/if_ngbe.c

3665

error = hw->mac.ops.init_hw(sc);

sys/dev/pci/if_ngbe.c

3684

status = hw->mac.ops.stop_adapter(sc);

sys/dev/pci/if_ngbe.c

3690

status = hw->phy.ops.init(sc);

sys/dev/pci/if_ngbe.c

3696

mac->ops.setup_link = ngbe_setup_copper_link;

sys/dev/pci/if_ngbe.c

3697

mac->ops.get_link_capabilities =

sys/dev/pci/if_ngbe.c

3752

hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr);

sys/dev/pci/if_ngbe.c

3760

hw->mac.ops.init_rx_addrs(sc);

sys/dev/pci/if_ngbe.c

4056

status = hw->phy.ops.setup_link(sc, speed, need_restart);

sys/dev/pci/if_ngbe.c

4128

error = hw->phy.ops.set_adv_pause(hw, pcap_backplane);

sys/dev/pci/if_ngbe.c

416

hw->mac.ops.set_rar(sc, 0, hw->mac.addr, 0, NGBE_PSR_MAC_SWC_AD_H_AV);

sys/dev/pci/if_ngbe.c

4190

hw->phy.media_type = hw->mac.ops.get_media_type(hw);

sys/dev/pci/if_ngbe.c

4193

hw->mac.ops.clear_vfta(hw);

sys/dev/pci/if_ngbe.c

4196

hw->mac.ops.clear_hw_cntrs(hw);

sys/dev/pci/if_ngbe.c

4201

error = hw->mac.ops.setup_fc(sc);

sys/dev/pci/if_ngbe.c

421

hw->mac.ops.set_rar(sc, 0, hw->mac.addr, 0, 1);

sys/dev/pci/if_ngbe.c

4225

hw->mac.ops.disable_rx(hw);

sys/dev/pci/if_ngbe.c

584

hw->mac.ops.setup_link(sc, advertised, 1);

sys/dev/pci/if_ngbe.c

764

hw->mac.ops.disable_rx(hw);

sys/dev/pci/if_ngbe.c

808

hw->mac.ops.set_rar(sc, 0, hw->mac.addr, 0, NGBE_PSR_MAC_SWC_AD_H_AV);

sys/dev/pci/if_ngbe.c

835

hw->mac.ops.check_link(hw, &sc->link_speed, &sc->link_up, 0);

sys/dev/pci/if_ngbe.c

860

hw->mac.ops.fc_enable(sc);

sys/dev/pci/if_ngbereg.h

834

struct ngbe_eeprom_operations ops;

sys/dev/pci/if_ngbereg.h

840

struct ngbe_mac_operations ops;

sys/dev/pci/if_ngbereg.h

870

struct ngbe_phy_operations ops;

sys/dev/pci/if_pcn.c

332

#define PCN_CDTXSYNC(sc, x, n, ops) \

sys/dev/pci/if_pcn.c

343

(PCN_NTXDESC - __x), (ops)); \

sys/dev/pci/if_pcn.c

350

PCN_CDTXOFF(__x), sizeof(struct letmd) * __n, (ops)); \

sys/dev/pci/if_pcn.c

353

#define PCN_CDRXSYNC(sc, x, ops) \

sys/dev/pci/if_pcn.c

355

PCN_CDRXOFF((x)), sizeof(struct lermd), (ops))

sys/dev/pci/if_pcn.c

357

#define PCN_CDINITSYNC(sc, ops) \

sys/dev/pci/if_pcn.c

359

PCN_CDINITOFF, sizeof(struct leinit), (ops))

sys/dev/pci/if_qwx_pci.c

785

sc->ops.read32 = qwx_pcic_read32;

sys/dev/pci/if_qwx_pci.c

786

sc->ops.write32 = qwx_pcic_write32;

sys/dev/pci/if_qwx_pci.c

787

sc->ops.start = qwx_pci_start;

sys/dev/pci/if_qwx_pci.c

788

sc->ops.stop = qwx_pci_stop;

sys/dev/pci/if_qwx_pci.c

789

sc->ops.power_up = qwx_pci_power_up;

sys/dev/pci/if_qwx_pci.c

790

sc->ops.power_down = qwx_pci_power_down;

sys/dev/pci/if_qwx_pci.c

791

sc->ops.submit_xfer = qwx_mhi_submit_xfer;

sys/dev/pci/if_qwx_pci.c

792

sc->ops.irq_enable = qwx_pcic_ext_irq_enable;

sys/dev/pci/if_qwx_pci.c

793

sc->ops.irq_disable = qwx_pcic_ext_irq_disable;

sys/dev/pci/if_qwx_pci.c

794

sc->ops.map_service_to_pipe = qwx_pcic_map_service_to_pipe;

sys/dev/pci/if_qwx_pci.c

795

sc->ops.get_user_msi_vector = qwx_pcic_get_user_msi_vector;

sys/dev/pci/if_qwz_pci.c

710

sc->ops.read32 = qwz_pcic_read32;

sys/dev/pci/if_qwz_pci.c

711

sc->ops.write32 = qwz_pcic_write32;

sys/dev/pci/if_qwz_pci.c

712

sc->ops.start = qwz_pci_start;

sys/dev/pci/if_qwz_pci.c

713

sc->ops.stop = qwz_pci_stop;

sys/dev/pci/if_qwz_pci.c

714

sc->ops.power_up = qwz_pci_power_up;

sys/dev/pci/if_qwz_pci.c

715

sc->ops.power_down = qwz_pci_power_down;

sys/dev/pci/if_qwz_pci.c

716

sc->ops.submit_xfer = qwz_mhi_submit_xfer;

sys/dev/pci/if_qwz_pci.c

717

sc->ops.irq_enable = qwz_pcic_ext_irq_enable;

sys/dev/pci/if_qwz_pci.c

718

sc->ops.irq_disable = qwz_pcic_ext_irq_disable;

sys/dev/pci/if_qwz_pci.c

719

sc->ops.map_service_to_pipe = qwz_pcic_map_service_to_pipe;

sys/dev/pci/if_qwz_pci.c

720

sc->ops.get_user_msi_vector = qwz_pcic_get_user_msi_vector;

sys/dev/pci/if_rge.c

439

unsigned int idx, unsigned int len, int ops)

sys/dev/pci/if_rge.c

443

ops);

sys/dev/pci/if_skvar.h

134

#define SK_CDTXSYNC(sc, x, n, ops) \

sys/dev/pci/if_skvar.h

146

(ops)); \

sys/dev/pci/if_skvar.h

153

SK_CDTXOFF((__x)), sizeof(struct sk_tx_desc) * __n, (ops)); \

sys/dev/pci/if_skvar.h

156

#define SK_CDRXSYNC(sc, x, ops) \

sys/dev/pci/if_skvar.h

159

SK_CDRXOFF((x)), sizeof(struct sk_rx_desc), (ops)); \

sys/dev/pci/if_stgereg.h

592

#define STGE_CDTXSYNC(sc, x, ops) \

sys/dev/pci/if_stgereg.h

594

STGE_CDTXOFF((x)), sizeof(struct stge_tfd), (ops))

sys/dev/pci/if_stgereg.h

596

#define STGE_CDRXSYNC(sc, x, ops) \

sys/dev/pci/if_stgereg.h

598

STGE_CDRXOFF((x)), sizeof(struct stge_rfd), (ops))

sys/dev/pci/igc_api.c

221

if (hw->mac.ops.update_mc_addr_list)

sys/dev/pci/igc_api.c

222

hw->mac.ops.update_mc_addr_list(hw, mc_addr_list,

sys/dev/pci/igc_api.c

23

if (hw->mac.ops.init_params) {

sys/dev/pci/igc_api.c

237

if (hw->mac.ops.check_for_link)

sys/dev/pci/igc_api.c

238

return hw->mac.ops.check_for_link(hw);

sys/dev/pci/igc_api.c

24

ret_val = hw->mac.ops.init_params(hw);

sys/dev/pci/igc_api.c

253

if (hw->mac.ops.reset_hw)

sys/dev/pci/igc_api.c

254

return hw->mac.ops.reset_hw(hw);

sys/dev/pci/igc_api.c

269

if (hw->mac.ops.init_hw)

sys/dev/pci/igc_api.c

270

return hw->mac.ops.init_hw(hw);

sys/dev/pci/igc_api.c

288

if (hw->mac.ops.get_link_up_info)

sys/dev/pci/igc_api.c

289

return hw->mac.ops.get_link_up_info(hw, speed, duplex);

sys/dev/pci/igc_api.c

305

if (hw->mac.ops.rar_set)

sys/dev/pci/igc_api.c

306

return hw->mac.ops.rar_set(hw, addr, index);

sys/dev/pci/igc_api.c

321

if (hw->phy.ops.check_reset_block)

sys/dev/pci/igc_api.c

322

return hw->phy.ops.check_reset_block(hw);

sys/dev/pci/igc_api.c

338

if (hw->phy.ops.get_info)

sys/dev/pci/igc_api.c

339

return hw->phy.ops.get_info(hw);

sys/dev/pci/igc_api.c

354

if (hw->phy.ops.reset)

sys/dev/pci/igc_api.c

355

return hw->phy.ops.reset(hw);

sys/dev/pci/igc_api.c

371

if (hw->mac.ops.read_mac_addr)

sys/dev/pci/igc_api.c

372

return hw->mac.ops.read_mac_addr(hw);

sys/dev/pci/igc_api.c

387

if (hw->nvm.ops.validate)

sys/dev/pci/igc_api.c

388

return hw->nvm.ops.validate(hw);

sys/dev/pci/igc_api.c

49

if (hw->nvm.ops.init_params) {

sys/dev/pci/igc_api.c

50

ret_val = hw->nvm.ops.init_params(hw);

sys/dev/pci/igc_api.c

75

if (hw->phy.ops.init_params) {

sys/dev/pci/igc_api.c

76

ret_val = hw->phy.ops.init_params(hw);

sys/dev/pci/igc_base.c

104

if (!(phy->ops.check_reset_block))

sys/dev/pci/igc_base.c

108

if (phy->ops.check_reset_block(hw))

sys/dev/pci/igc_base.c

29

return hw->mac.ops.acquire_swfw_sync(hw, mask);

sys/dev/pci/igc_base.c

48

hw->mac.ops.release_swfw_sync(hw, mask);

sys/dev/pci/igc_base.c

80

ret_val = mac->ops.setup_link(hw);

sys/dev/pci/igc_hw.h

264

struct igc_mac_operations ops;

sys/dev/pci/igc_hw.h

294

struct igc_phy_operations ops;

sys/dev/pci/igc_hw.h

317

struct igc_nvm_operations ops;

sys/dev/pci/igc_i225.c

101

mac->ops.init_hw = igc_init_hw_i225;

sys/dev/pci/igc_i225.c

103

mac->ops.setup_link = igc_setup_link_generic;

sys/dev/pci/igc_i225.c

1049

mac->ops.config_collision_dist(hw);

sys/dev/pci/igc_i225.c

105

mac->ops.check_for_link = igc_check_for_link_i225;

sys/dev/pci/igc_i225.c

107

mac->ops.get_link_up_info = igc_get_speed_and_duplex_copper_generic;

sys/dev/pci/igc_i225.c

1079

hw->mac.ops.init_params = igc_init_mac_params_i225;

sys/dev/pci/igc_i225.c

1080

hw->nvm.ops.init_params = igc_init_nvm_params_i225;

sys/dev/pci/igc_i225.c

1081

hw->phy.ops.init_params = igc_init_phy_params_i225;

sys/dev/pci/igc_i225.c

109

mac->ops.acquire_swfw_sync = igc_acquire_swfw_sync_i225;

sys/dev/pci/igc_i225.c

111

mac->ops.release_swfw_sync = igc_release_swfw_sync_i225;

sys/dev/pci/igc_i225.c

115

mac->ops.setup_physical_interface = igc_setup_copper_link_i225;

sys/dev/pci/igc_i225.c

121

mac->ops.update_mc_addr_list = igc_update_mc_addr_list_generic;

sys/dev/pci/igc_i225.c

123

mac->ops.write_vfta = igc_write_vfta_generic;

sys/dev/pci/igc_i225.c

145

phy->ops.power_up = igc_power_up_phy_copper;

sys/dev/pci/igc_i225.c

146

phy->ops.power_down = igc_power_down_phy_copper_base;

sys/dev/pci/igc_i225.c

149

phy->ops.acquire = igc_acquire_phy_base;

sys/dev/pci/igc_i225.c

150

phy->ops.check_reset_block = igc_check_reset_block_generic;

sys/dev/pci/igc_i225.c

151

phy->ops.release = igc_release_phy_base;

sys/dev/pci/igc_i225.c

152

phy->ops.reset = igc_phy_hw_reset_generic;

sys/dev/pci/igc_i225.c

153

phy->ops.read_reg = igc_read_phy_reg_gpy;

sys/dev/pci/igc_i225.c

154

phy->ops.write_reg = igc_write_phy_reg_gpy;

sys/dev/pci/igc_i225.c

161

ret_val = hw->phy.ops.reset(hw);

sys/dev/pci/igc_i225.c

462

if (hw->nvm.ops.acquire(hw) == IGC_SUCCESS) {

sys/dev/pci/igc_i225.c

464

hw->nvm.ops.release(hw);

sys/dev/pci/igc_i225.c

507

if (hw->nvm.ops.acquire(hw) == IGC_SUCCESS) {

sys/dev/pci/igc_i225.c

510

hw->nvm.ops.release(hw);

sys/dev/pci/igc_i225.c

58

nvm->ops.acquire = igc_acquire_nvm_i225;

sys/dev/pci/igc_i225.c

59

nvm->ops.release = igc_release_nvm_i225;

sys/dev/pci/igc_i225.c

591

if (hw->nvm.ops.acquire(hw) == IGC_SUCCESS) {

sys/dev/pci/igc_i225.c

596

read_op_ptr = hw->nvm.ops.read;

sys/dev/pci/igc_i225.c

597

hw->nvm.ops.read = igc_read_nvm_eerd;

sys/dev/pci/igc_i225.c

602

hw->nvm.ops.read = read_op_ptr;

sys/dev/pci/igc_i225.c

604

hw->nvm.ops.release(hw);

sys/dev/pci/igc_i225.c

62

nvm->ops.read = igc_read_nvm_srrd_i225;

sys/dev/pci/igc_i225.c

63

nvm->ops.write = igc_write_nvm_srwr_i225;

sys/dev/pci/igc_i225.c

638

if (hw->nvm.ops.acquire(hw) == IGC_SUCCESS) {

sys/dev/pci/igc_i225.c

64

nvm->ops.validate = igc_validate_nvm_checksum_i225;

sys/dev/pci/igc_i225.c

647

hw->nvm.ops.release(hw);

sys/dev/pci/igc_i225.c

65

nvm->ops.update = igc_update_nvm_checksum_i225;

sys/dev/pci/igc_i225.c

658

hw->nvm.ops.release(hw);

sys/dev/pci/igc_i225.c

663

hw->nvm.ops.release(hw);

sys/dev/pci/igc_i225.c

68

nvm->ops.write = igc_null_write_nvm;

sys/dev/pci/igc_i225.c

69

nvm->ops.validate = igc_null_ops_generic;

sys/dev/pci/igc_i225.c

70

nvm->ops.update = igc_null_ops_generic;

sys/dev/pci/igc_i225.c

902

hw->mac.ops.get_link_up_info(hw, &speed, &duplex);

sys/dev/pci/igc_i225.c

99

mac->ops.reset_hw = igc_reset_hw_i225;

sys/dev/pci/igc_mac.c

107

ret_val = hw->nvm.ops.read(hw, NVM_COMPAT, 1, &nvm_data);

sys/dev/pci/igc_mac.c

111

ret_val = hw->nvm.ops.read(hw, NVM_ALT_MAC_ADDR_PTR, 1,

sys/dev/pci/igc_mac.c

127

ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);

sys/dev/pci/igc_mac.c

147

hw->mac.ops.rar_set(hw, alt_mac_addr, 0);

sys/dev/pci/igc_mac.c

23

mac->ops.init_params = igc_null_ops_generic;

sys/dev/pci/igc_mac.c

24

mac->ops.config_collision_dist = igc_config_collision_dist_generic;

sys/dev/pci/igc_mac.c

25

mac->ops.rar_set = igc_rar_set_generic;

sys/dev/pci/igc_mac.c

373

if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))

sys/dev/pci/igc_mac.c

392

ret_val = hw->mac.ops.setup_physical_interface(hw);

sys/dev/pci/igc_mac.c

569

ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);

sys/dev/pci/igc_mac.c

572

ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);

sys/dev/pci/igc_mac.c

585

ret_val = hw->phy.ops.read_reg(hw, PHY_AUTONEG_ADV,

sys/dev/pci/igc_mac.c

589

ret_val = hw->phy.ops.read_reg(hw, PHY_LP_ABILITY,

sys/dev/pci/igc_mac.c

677

ret_val = mac->ops.get_link_up_info(hw, &speed, &duplex);

sys/dev/pci/igc_mac.c

77

hw->mac.ops.rar_set(hw, hw->mac.addr, 0);

sys/dev/pci/igc_mac.c

82

hw->mac.ops.rar_set(hw, mac_addr, i);

sys/dev/pci/igc_nvm.c

218

ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);

sys/dev/pci/igc_nvm.c

23

nvm->ops.init_params = igc_null_ops_generic;

sys/dev/pci/igc_nvm.c

24

nvm->ops.acquire = igc_null_ops_generic;

sys/dev/pci/igc_nvm.c

25

nvm->ops.read = igc_null_read_nvm;

sys/dev/pci/igc_nvm.c

26

nvm->ops.release = igc_null_nvm_generic;

sys/dev/pci/igc_nvm.c

27

nvm->ops.reload = igc_reload_nvm_generic;

sys/dev/pci/igc_nvm.c

28

nvm->ops.update = igc_null_ops_generic;

sys/dev/pci/igc_nvm.c

29

nvm->ops.validate = igc_null_ops_generic;

sys/dev/pci/igc_nvm.c

30

nvm->ops.write = igc_null_write_nvm;

sys/dev/pci/igc_phy.c

143

if (!phy->ops.read_reg)

sys/dev/pci/igc_phy.c

146

ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id);

sys/dev/pci/igc_phy.c

152

ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id);

sys/dev/pci/igc_phy.c

23

phy->ops.init_params = igc_null_ops_generic;

sys/dev/pci/igc_phy.c

24

phy->ops.acquire = igc_null_ops_generic;

sys/dev/pci/igc_phy.c

25

phy->ops.check_reset_block = igc_null_ops_generic;

sys/dev/pci/igc_phy.c

26

phy->ops.force_speed_duplex = igc_null_ops_generic;

sys/dev/pci/igc_phy.c

27

phy->ops.get_info = igc_null_ops_generic;

sys/dev/pci/igc_phy.c

28

phy->ops.set_page = igc_null_set_page;

sys/dev/pci/igc_phy.c

29

phy->ops.read_reg = igc_null_read_reg;

sys/dev/pci/igc_phy.c

298

ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg);

sys/dev/pci/igc_phy.c

30

phy->ops.read_reg_locked = igc_null_read_reg;

sys/dev/pci/igc_phy.c

304

ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL,

sys/dev/pci/igc_phy.c

31

phy->ops.read_reg_page = igc_null_read_reg;

sys/dev/pci/igc_phy.c

312

ret_val = phy->ops.read_reg(hw, (STANDARD_AN_REG_MASK <<

sys/dev/pci/igc_phy.c

32

phy->ops.release = igc_null_phy_generic;

sys/dev/pci/igc_phy.c

33

phy->ops.reset = igc_null_ops_generic;

sys/dev/pci/igc_phy.c

34

phy->ops.set_d0_lplu_state = igc_null_lplu_state;

sys/dev/pci/igc_phy.c

35

phy->ops.set_d3_lplu_state = igc_null_lplu_state;

sys/dev/pci/igc_phy.c

36

phy->ops.write_reg = igc_null_write_reg;

sys/dev/pci/igc_phy.c

37

phy->ops.write_reg_locked = igc_null_write_reg;

sys/dev/pci/igc_phy.c

38

phy->ops.write_reg_page = igc_null_write_reg;

sys/dev/pci/igc_phy.c

39

phy->ops.power_up = igc_null_phy_generic;

sys/dev/pci/igc_phy.c

40

phy->ops.power_down = igc_null_phy_generic;

sys/dev/pci/igc_phy.c

435

ret_val = phy->ops.write_reg(hw, PHY_AUTONEG_ADV, mii_autoneg_adv_reg);

sys/dev/pci/igc_phy.c

442

ret_val = phy->ops.write_reg(hw, PHY_1000T_CTRL,

sys/dev/pci/igc_phy.c

446

ret_val = phy->ops.write_reg(hw,

sys/dev/pci/igc_phy.c

493

ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl);

sys/dev/pci/igc_phy.c

498

ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_ctrl);

sys/dev/pci/igc_phy.c

545

ret_val = hw->phy.ops.force_speed_duplex(hw);

sys/dev/pci/igc_phy.c

562

hw->mac.ops.config_collision_dist(hw);

sys/dev/pci/igc_phy.c

612

if (!hw->phy.ops.read_reg)

sys/dev/pci/igc_phy.c

617

ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);

sys/dev/pci/igc_phy.c

620

ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);

sys/dev/pci/igc_phy.c

652

if (!hw->phy.ops.read_reg)

sys/dev/pci/igc_phy.c

660

ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);

sys/dev/pci/igc_phy.c

671

ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);

sys/dev/pci/igc_phy.c

705

if (phy->ops.check_reset_block) {

sys/dev/pci/igc_phy.c

706

ret_val = phy->ops.check_reset_block(hw);

sys/dev/pci/igc_phy.c

711

ret_val = phy->ops.acquire(hw);

sys/dev/pci/igc_phy.c

737

phy->ops.release(hw);

sys/dev/pci/igc_phy.c

756

hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);

sys/dev/pci/igc_phy.c

758

hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg);

sys/dev/pci/igc_phy.c

776

hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);

sys/dev/pci/igc_phy.c

778

hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg);

sys/dev/pci/igc_phy.c

802

ret_val = hw->phy.ops.acquire(hw);

sys/dev/pci/igc_phy.c

808

hw->phy.ops.release(hw);

sys/dev/pci/igc_phy.c

838

ret_val = hw->phy.ops.acquire(hw);

sys/dev/pci/igc_phy.c

844

hw->phy.ops.release(hw);

sys/dev/pci/igc_phy.c

869

ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAC, dev_addr);

sys/dev/pci/igc_phy.c

873

ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAAD, address);

sys/dev/pci/igc_phy.c

877

ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAC, IGC_MMDAC_FUNC_DATA |

sys/dev/pci/igc_phy.c

883

ret_val = hw->phy.ops.read_reg(hw, IGC_MMDAAD, data);

sys/dev/pci/igc_phy.c

885

ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAAD, *data);

sys/dev/pci/igc_phy.c

890

ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAC, 0);

sys/dev/pci/ixgbe.c

1063

hw->eeprom.ops.init_params(hw);

sys/dev/pci/ixgbe.c

1149

hw->eeprom.ops.init_params(hw);

sys/dev/pci/ixgbe.c

1180

hw->eeprom.ops.init_params(hw);

sys/dev/pci/ixgbe.c

121

eeprom->ops.init_params = ixgbe_init_eeprom_params_generic;

sys/dev/pci/ixgbe.c

124

eeprom->ops.read = ixgbe_read_eerd_generic;

sys/dev/pci/ixgbe.c

1244

hw->eeprom.ops.init_params(hw);

sys/dev/pci/ixgbe.c

126

eeprom->ops.read = ixgbe_read_eeprom_bit_bang_generic;

sys/dev/pci/ixgbe.c

127

eeprom->ops.write = ixgbe_write_eeprom_generic;

sys/dev/pci/ixgbe.c

128

eeprom->ops.validate_checksum =

sys/dev/pci/ixgbe.c

130

eeprom->ops.update_checksum = ixgbe_update_eeprom_checksum_generic;

sys/dev/pci/ixgbe.c

131

eeprom->ops.calc_checksum = ixgbe_calc_eeprom_checksum_generic;

sys/dev/pci/ixgbe.c

134

mac->ops.init_hw = ixgbe_init_hw_generic;

sys/dev/pci/ixgbe.c

1346

if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM)

sys/dev/pci/ixgbe.c

135

mac->ops.reset_hw = NULL;

sys/dev/pci/ixgbe.c

136

mac->ops.start_hw = ixgbe_start_hw_generic;

sys/dev/pci/ixgbe.c

137

mac->ops.clear_hw_cntrs = ixgbe_clear_hw_cntrs_generic;

sys/dev/pci/ixgbe.c

1370

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);

sys/dev/pci/ixgbe.c

138

mac->ops.get_media_type = NULL;

sys/dev/pci/ixgbe.c

139

mac->ops.get_supported_physical_layer = NULL;

sys/dev/pci/ixgbe.c

140

mac->ops.enable_rx_dma = ixgbe_enable_rx_dma_generic;

sys/dev/pci/ixgbe.c

141

mac->ops.get_mac_addr = ixgbe_get_mac_addr_generic;

sys/dev/pci/ixgbe.c

142

mac->ops.stop_adapter = ixgbe_stop_adapter_generic;

sys/dev/pci/ixgbe.c

143

mac->ops.get_bus_info = ixgbe_get_bus_info_generic;

sys/dev/pci/ixgbe.c

144

mac->ops.set_lan_id = ixgbe_set_lan_id_multi_port_pcie;

sys/dev/pci/ixgbe.c

145

mac->ops.acquire_swfw_sync = ixgbe_acquire_swfw_sync;

sys/dev/pci/ixgbe.c

146

mac->ops.release_swfw_sync = ixgbe_release_swfw_sync;

sys/dev/pci/ixgbe.c

147

mac->ops.prot_autoc_read = prot_autoc_read_generic;

sys/dev/pci/ixgbe.c

148

mac->ops.prot_autoc_write = prot_autoc_write_generic;

sys/dev/pci/ixgbe.c

151

mac->ops.led_on = ixgbe_led_on_generic;

sys/dev/pci/ixgbe.c

152

mac->ops.led_off = ixgbe_led_off_generic;

sys/dev/pci/ixgbe.c

153

mac->ops.blink_led_start = ixgbe_blink_led_start_generic;

sys/dev/pci/ixgbe.c

154

mac->ops.blink_led_stop = ixgbe_blink_led_stop_generic;

sys/dev/pci/ixgbe.c

157

mac->ops.set_rar = ixgbe_set_rar_generic;

sys/dev/pci/ixgbe.c

158

mac->ops.clear_rar = ixgbe_clear_rar_generic;

sys/dev/pci/ixgbe.c

159

mac->ops.insert_mac_addr = NULL;

sys/dev/pci/ixgbe.c

160

mac->ops.set_vmdq = NULL;

sys/dev/pci/ixgbe.c

161

mac->ops.clear_vmdq = NULL;

sys/dev/pci/ixgbe.c

162

mac->ops.init_rx_addrs = ixgbe_init_rx_addrs_generic;

sys/dev/pci/ixgbe.c

163

mac->ops.update_mc_addr_list = ixgbe_update_mc_addr_list_generic;

sys/dev/pci/ixgbe.c

164

mac->ops.enable_mc = ixgbe_enable_mc_generic;

sys/dev/pci/ixgbe.c

165

mac->ops.disable_mc = ixgbe_disable_mc_generic;

sys/dev/pci/ixgbe.c

166

mac->ops.clear_vfta = NULL;

sys/dev/pci/ixgbe.c

167

mac->ops.set_vfta = NULL;

sys/dev/pci/ixgbe.c

168

mac->ops.set_vlvf = NULL;

sys/dev/pci/ixgbe.c

169

mac->ops.init_uta_tables = NULL;

sys/dev/pci/ixgbe.c

170

mac->ops.enable_rx = ixgbe_enable_rx_generic;

sys/dev/pci/ixgbe.c

171

mac->ops.disable_rx = ixgbe_disable_rx_generic;

sys/dev/pci/ixgbe.c

1720

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);

sys/dev/pci/ixgbe.c

174

mac->ops.fc_enable = ixgbe_fc_enable_generic;

sys/dev/pci/ixgbe.c

1745

if (hw->eeprom.ops.read(hw, i, &word)) {

sys/dev/pci/ixgbe.c

175

mac->ops.setup_fc = ixgbe_setup_fc_generic;

sys/dev/pci/ixgbe.c

1754

if (hw->eeprom.ops.read(hw, i, &pointer)) {

sys/dev/pci/ixgbe.c

176

mac->ops.fc_autoneg = ixgbe_fc_autoneg;

sys/dev/pci/ixgbe.c

1763

if (hw->eeprom.ops.read(hw, pointer, &length)) {

sys/dev/pci/ixgbe.c

1772

if (hw->eeprom.ops.read(hw, j, &word)) {

sys/dev/pci/ixgbe.c

179

mac->ops.get_link_capabilities = NULL;

sys/dev/pci/ixgbe.c

180

mac->ops.setup_link = NULL;

sys/dev/pci/ixgbe.c

1806

status = hw->eeprom.ops.read(hw, 0, &checksum);

sys/dev/pci/ixgbe.c

181

mac->ops.check_link = NULL;

sys/dev/pci/ixgbe.c

1812

status = hw->eeprom.ops.calc_checksum(hw);

sys/dev/pci/ixgbe.c

1818

status = hw->eeprom.ops.read(hw, IXGBE_EEPROM_CHECKSUM, &read_checksum);

sys/dev/pci/ixgbe.c

182

mac->ops.dmac_config = NULL;

sys/dev/pci/ixgbe.c

183

mac->ops.dmac_update_tcs = NULL;

sys/dev/pci/ixgbe.c

184

mac->ops.dmac_config_tcs = NULL;

sys/dev/pci/ixgbe.c

1852

status = hw->eeprom.ops.read(hw, 0, &checksum);

sys/dev/pci/ixgbe.c

1858

status = hw->eeprom.ops.calc_checksum(hw);

sys/dev/pci/ixgbe.c

1864

status = hw->eeprom.ops.write(hw, IXGBE_EEPROM_CHECKSUM, checksum);

sys/dev/pci/ixgbe.c

1924

hw->mac.ops.set_vmdq(hw, index, vmdq);

sys/dev/pci/ixgbe.c

1985

hw->mac.ops.clear_vmdq(hw, index, IXGBE_CLEAR_VMDQ_ALL);

sys/dev/pci/ixgbe.c

2013

hw->mac.ops.get_mac_addr(hw, hw->mac.addr);

sys/dev/pci/ixgbe.c

2029

hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);

sys/dev/pci/ixgbe.c

2033

hw->mac.ops.clear_vmdq(hw, 0, IXGBE_CLEAR_VMDQ_ALL);

sys/dev/pci/ixgbe.c

2083

hw->mac.ops.set_rar(hw, rar, addr, vmdq, IXGBE_RAH_AV);

sys/dev/pci/ixgbe.c

219

hw->mac.ops.check_link(hw, &speed, &link_up, FALSE);

sys/dev/pci/ixgbe.c

2294

hw->mac.ops.fc_autoneg(hw);

sys/dev/pci/ixgbe.c

2539

hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT,

sys/dev/pci/ixgbe.c

2542

hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_LP,

sys/dev/pci/ixgbe.c

2579

hw->mac.ops.check_link(hw, &speed, &link_up, FALSE);

sys/dev/pci/ixgbe.c

2935

hw->mac.ops.check_link(hw, &speed, &link_up, FALSE);

sys/dev/pci/ixgbe.c

2938

ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, &autoc_reg);

sys/dev/pci/ixgbe.c

2945

ret_val = hw->mac.ops.prot_autoc_write(hw, autoc_reg, locked);

sys/dev/pci/ixgbe.c

2979

ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, &autoc_reg);

sys/dev/pci/ixgbe.c

2986

ret_val = hw->mac.ops.prot_autoc_write(hw, autoc_reg, locked);

sys/dev/pci/ixgbe.c

304

ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, &reg_bp);

sys/dev/pci/ixgbe.c

316

hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT,

sys/dev/pci/ixgbe.c

3162

hw->mac.ops.clear_rar(hw, rar);

sys/dev/pci/ixgbe.c

3459

switch (hw->mac.ops.get_media_type(hw)) {

sys/dev/pci/ixgbe.c

3587

hw->eeprom.ops.read(hw, IXGBE_DEVICE_CAPS, device_caps);

sys/dev/pci/ixgbe.c

3725

status = hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_SW_MNG_SM);

sys/dev/pci/ixgbe.c

3780

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_SW_MNG_SM);

sys/dev/pci/ixgbe.c

3951

status = hw->mac.ops.get_link_capabilities(hw, &link_speed, &autoneg);

sys/dev/pci/ixgbe.c

3968

if (hw->mac.ops.set_rate_select_speed)

sys/dev/pci/ixgbe.c

3969

hw->mac.ops.set_rate_select_speed(hw,

sys/dev/pci/ixgbe.c

3983

if (!hw->mac.ops.setup_mac_link)

sys/dev/pci/ixgbe.c

3985

status = hw->mac.ops.setup_mac_link(hw,

sys/dev/pci/ixgbe.c

4022

if (hw->mac.ops.set_rate_select_speed)

sys/dev/pci/ixgbe.c

4023

hw->mac.ops.set_rate_select_speed(hw,

sys/dev/pci/ixgbe.c

4037

if (!hw->mac.ops.setup_mac_link)

sys/dev/pci/ixgbe.c

4039

status = hw->mac.ops.setup_mac_link(hw,

sys/dev/pci/ixgbe.c

408

ret_val = hw->mac.ops.prot_autoc_write(hw, reg_bp, locked);

sys/dev/pci/ixgbe.c

4109

status = hw->phy.ops.read_i2c_byte(hw, IXGBE_SFF_SFF_8472_OSCB,

sys/dev/pci/ixgbe.c

4119

status = hw->phy.ops.write_i2c_byte(hw, IXGBE_SFF_SFF_8472_OSCB,

sys/dev/pci/ixgbe.c

4128

status = hw->phy.ops.read_i2c_byte(hw, IXGBE_SFF_SFF_8472_ESCB,

sys/dev/pci/ixgbe.c

413

hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT,

sys/dev/pci/ixgbe.c

4138

status = hw->phy.ops.write_i2c_byte(hw, IXGBE_SFF_SFF_8472_ESCB,

sys/dev/pci/ixgbe.c

4312

if (hw->mac.ops.init_hw)

sys/dev/pci/ixgbe.c

4313

return hw->mac.ops.init_hw(hw);

sys/dev/pci/ixgbe.c

4326

if (hw->mac.ops.get_media_type)

sys/dev/pci/ixgbe.c

4327

return hw->mac.ops.get_media_type(hw);

sys/dev/pci/ixgbe.c

4343

if (hw->phy.ops.identify)

sys/dev/pci/ixgbe.c

4344

status = hw->phy.ops.identify(hw);

sys/dev/pci/ixgbe.c

4364

if (hw->mac.ops.check_link)

sys/dev/pci/ixgbe.c

4365

return hw->mac.ops.check_link(hw, speed, link_up,

sys/dev/pci/ixgbe.c

4381

if (hw->mac.ops.flap_tx_laser)

sys/dev/pci/ixgbe.c

4382

hw->mac.ops.flap_tx_laser(hw);

sys/dev/pci/ixgbe.c

4398

if (hw->mac.ops.set_rar)

sys/dev/pci/ixgbe.c

4399

return hw->mac.ops.set_rar(hw, index, addr, vmdq, enable_addr);

sys/dev/pci/ixgbe.c

440

hw->phy.media_type = hw->mac.ops.get_media_type(hw);

sys/dev/pci/ixgbe.c

4412

if (hw->mac.ops.set_vmdq)

sys/dev/pci/ixgbe.c

4413

return hw->mac.ops.set_vmdq(hw, rar, vmdq);

sys/dev/pci/ixgbe.c

4426

if (hw->mac.ops.clear_vmdq)

sys/dev/pci/ixgbe.c

4427

return hw->mac.ops.clear_vmdq(hw, rar, vmdq);

sys/dev/pci/ixgbe.c

4441

if (hw->mac.ops.init_uta_tables)

sys/dev/pci/ixgbe.c

4442

return hw->mac.ops.init_uta_tables(hw);

sys/dev/pci/ixgbe.c

4449

if (hw->mac.ops.disable_rx)

sys/dev/pci/ixgbe.c

445

hw->mac.ops.clear_vfta(hw);

sys/dev/pci/ixgbe.c

4450

hw->mac.ops.disable_rx(hw);

sys/dev/pci/ixgbe.c

4455

if (hw->mac.ops.enable_rx)

sys/dev/pci/ixgbe.c

4456

hw->mac.ops.enable_rx(hw);

sys/dev/pci/ixgbe.c

448

hw->mac.ops.clear_hw_cntrs(hw);

sys/dev/pci/ixgbe.c

4482

if (mbx->ops.read)

sys/dev/pci/ixgbe.c

4483

return mbx->ops.read(hw, msg, size, mbx_id);

sys/dev/pci/ixgbe.c

4505

if (!mbx->ops.read || !mbx->ops.check_for_msg ||

sys/dev/pci/ixgbe.c

4516

return mbx->ops.read(hw, msg, size, mbx_id);

sys/dev/pci/ixgbe.c

4541

if (!mbx->ops.write || !mbx->ops.check_for_ack ||

sys/dev/pci/ixgbe.c

4542

!mbx->ops.release || !mbx->timeout)

sys/dev/pci/ixgbe.c

4550

ret_val = mbx->ops.write(hw, msg, size, mbx_id);

sys/dev/pci/ixgbe.c

457

if (hw->mac.ops.setup_fc) {

sys/dev/pci/ixgbe.c

4570

if (mbx->ops.check_for_msg)

sys/dev/pci/ixgbe.c

4571

ret_val = mbx->ops.check_for_msg(hw, mbx_id);

sys/dev/pci/ixgbe.c

458

ret_val = hw->mac.ops.setup_fc(hw);

sys/dev/pci/ixgbe.c

4590

if (mbx->ops.check_for_ack)

sys/dev/pci/ixgbe.c

4591

ret_val = mbx->ops.check_for_ack(hw, mbx_id);

sys/dev/pci/ixgbe.c

4610

if (mbx->ops.check_for_rst)

sys/dev/pci/ixgbe.c

4611

ret_val = mbx->ops.check_for_rst(hw, mbx_id);

sys/dev/pci/ixgbe.c

4630

if (!countdown || !mbx->ops.check_for_msg)

sys/dev/pci/ixgbe.c

4633

while (countdown && mbx->ops.check_for_msg(hw, mbx_id)) {

sys/dev/pci/ixgbe.c

4663

if (!countdown || !mbx->ops.check_for_ack)

sys/dev/pci/ixgbe.c

4666

while (countdown && mbx->ops.check_for_ack(hw, mbx_id)) {

sys/dev/pci/ixgbe.c

470

hw->mac.ops.get_device_caps(hw, &device_caps);

sys/dev/pci/ixgbe.c

4866

if (!mbx->ops.read)

sys/dev/pci/ixgbe.c

4873

ret_val = mbx->ops.read(hw, msg, size, mbx_id);

sys/dev/pci/ixgbe.c

4897

if (!mbx->ops.write || !mbx->timeout)

sys/dev/pci/ixgbe.c

4901

ret_val = mbx->ops.write(hw, msg, size, mbx_id);

sys/dev/pci/ixgbe.c

4920

mbx->ops.read_posted = ixgbe_read_posted_mbx;

sys/dev/pci/ixgbe.c

4921

mbx->ops.write_posted = ixgbe_write_posted_mbx;

sys/dev/pci/ixgbe.c

5136

hw->mbx.ops.release(hw, vf_id);

sys/dev/pci/ixgbe.c

5322

mbx->ops.release = ixgbe_release_mbx_lock_dummy;

sys/dev/pci/ixgbe.c

5323

mbx->ops.read = ixgbe_read_mbx_vf_legacy;

sys/dev/pci/ixgbe.c

5324

mbx->ops.write = ixgbe_write_mbx_vf_legacy;

sys/dev/pci/ixgbe.c

5325

mbx->ops.check_for_msg = ixgbe_check_for_msg_vf;

sys/dev/pci/ixgbe.c

5326

mbx->ops.check_for_ack = ixgbe_check_for_ack_vf;

sys/dev/pci/ixgbe.c

5327

mbx->ops.check_for_rst = ixgbe_check_for_rst_vf;

sys/dev/pci/ixgbe.c

5328

mbx->ops.clear = NULL;

sys/dev/pci/ixgbe.c

5429

mbx->ops.release = ixgbe_release_mbx_lock_dummy;

sys/dev/pci/ixgbe.c

543

status = hw->mac.ops.reset_hw(hw);

sys/dev/pci/ixgbe.c

5430

mbx->ops.read = ixgbe_read_mbx_pf_legacy;

sys/dev/pci/ixgbe.c

5431

mbx->ops.write = ixgbe_write_mbx_pf_legacy;

sys/dev/pci/ixgbe.c

5432

mbx->ops.check_for_msg = ixgbe_check_for_msg_pf;

sys/dev/pci/ixgbe.c

5433

mbx->ops.check_for_ack = ixgbe_check_for_ack_pf;

sys/dev/pci/ixgbe.c

5434

mbx->ops.check_for_rst = ixgbe_check_for_rst_pf;

sys/dev/pci/ixgbe.c

5435

mbx->ops.clear = ixgbe_clear_mbx_pf;

sys/dev/pci/ixgbe.c

547

status = hw->mac.ops.start_hw(hw);

sys/dev/pci/ixgbe.c

657

hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECL,

sys/dev/pci/ixgbe.c

659

hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECH,

sys/dev/pci/ixgbe.c

661

hw->phy.ops.read_reg(hw, IXGBE_LDPCECL,

sys/dev/pci/ixgbe.c

663

hw->phy.ops.read_reg(hw, IXGBE_LDPCECH,

sys/dev/pci/ixgbe.c

755

mac->ops.set_lan_id(hw);

sys/dev/pci/ixgbe.c

806

hw->eeprom.ops.read(hw, IXGBE_EEPROM_CTRL_4, &ee_ctrl_4);

sys/dev/pci/ixgbe_82598.c

1147

if (hw->mac.ops.acquire_swfw_sync(hw, gssr) != IXGBE_SUCCESS)

sys/dev/pci/ixgbe_82598.c

1158

hw->phy.ops.write_reg_mdi(hw,

sys/dev/pci/ixgbe_82598.c

1165

hw->phy.ops.read_reg_mdi(hw,

sys/dev/pci/ixgbe_82598.c

1182

hw->phy.ops.read_reg_mdi(hw, IXGBE_MDIO_PMA_PMD_SDA_SCL_DATA,

sys/dev/pci/ixgbe_82598.c

1191

hw->mac.ops.release_swfw_sync(hw, gssr);

sys/dev/pci/ixgbe_82598.c

1226

hw->phy.ops.identify(hw);

sys/dev/pci/ixgbe_82598.c

1233

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,

sys/dev/pci/ixgbe_82598.c

1274

hw->phy.ops.identify_sfp(hw);

sys/dev/pci/ixgbe_82598.c

1331

hw->eeprom.ops.read(hw, IXGBE_PCIE_GENERAL_PTR, &pci_gen);

sys/dev/pci/ixgbe_82598.c

1334

hw->eeprom.ops.read(hw, pci_gen + IXGBE_PCIE_CTRL2, &pci_ctrl2);

sys/dev/pci/ixgbe_82598.c

147

phy->ops.init = ixgbe_init_phy_ops_82598;

sys/dev/pci/ixgbe_82598.c

150

mac->ops.start_hw = ixgbe_start_hw_82598;

sys/dev/pci/ixgbe_82598.c

151

mac->ops.reset_hw = ixgbe_reset_hw_82598;

sys/dev/pci/ixgbe_82598.c

152

mac->ops.get_media_type = ixgbe_get_media_type_82598;

sys/dev/pci/ixgbe_82598.c

153

mac->ops.get_supported_physical_layer =

sys/dev/pci/ixgbe_82598.c

155

mac->ops.read_analog_reg8 = ixgbe_read_analog_reg8_82598;

sys/dev/pci/ixgbe_82598.c

156

mac->ops.write_analog_reg8 = ixgbe_write_analog_reg8_82598;

sys/dev/pci/ixgbe_82598.c

157

mac->ops.set_lan_id = ixgbe_set_lan_id_multi_port_pcie_82598;

sys/dev/pci/ixgbe_82598.c

158

mac->ops.enable_rx_dma = ixgbe_enable_rx_dma_82598;

sys/dev/pci/ixgbe_82598.c

161

mac->ops.set_vmdq = ixgbe_set_vmdq_82598;

sys/dev/pci/ixgbe_82598.c

162

mac->ops.clear_vmdq = ixgbe_clear_vmdq_82598;

sys/dev/pci/ixgbe_82598.c

163

mac->ops.set_vfta = ixgbe_set_vfta_82598;

sys/dev/pci/ixgbe_82598.c

164

mac->ops.set_vlvf = NULL;

sys/dev/pci/ixgbe_82598.c

165

mac->ops.clear_vfta = ixgbe_clear_vfta_82598;

sys/dev/pci/ixgbe_82598.c

168

mac->ops.fc_enable = ixgbe_fc_enable_82598;

sys/dev/pci/ixgbe_82598.c

179

phy->ops.read_i2c_eeprom = ixgbe_read_i2c_eeprom_82598;

sys/dev/pci/ixgbe_82598.c

182

mac->ops.check_link = ixgbe_check_mac_link_82598;

sys/dev/pci/ixgbe_82598.c

183

mac->ops.setup_link = ixgbe_setup_mac_link_82598;

sys/dev/pci/ixgbe_82598.c

184

mac->ops.flap_tx_laser = NULL;

sys/dev/pci/ixgbe_82598.c

185

mac->ops.get_link_capabilities = ixgbe_get_link_capabilities_82598;

sys/dev/pci/ixgbe_82598.c

209

phy->ops.identify(hw);

sys/dev/pci/ixgbe_82598.c

212

if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper) {

sys/dev/pci/ixgbe_82598.c

213

mac->ops.setup_link = ixgbe_setup_copper_link_82598;

sys/dev/pci/ixgbe_82598.c

214

mac->ops.get_link_capabilities =

sys/dev/pci/ixgbe_82598.c

220

phy->ops.setup_link = ixgbe_setup_phy_link_tnx;

sys/dev/pci/ixgbe_82598.c

221

phy->ops.check_link = ixgbe_check_phy_link_tnx;

sys/dev/pci/ixgbe_82598.c

222

phy->ops.get_firmware_version =

sys/dev/pci/ixgbe_82598.c

226

phy->ops.reset = ixgbe_reset_phy_nl;

sys/dev/pci/ixgbe_82598.c

229

ret_val = phy->ops.identify_sfp(hw);

sys/dev/pci/ixgbe_82598.c

453

hw->mac.ops.check_link(hw, &link_speed, &link_up, FALSE);

sys/dev/pci/ixgbe_82598.c

623

hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,

sys/dev/pci/ixgbe_82598.c

667

hw->phy.ops.read_reg(hw, 0xC79F, IXGBE_TWINAX_DEV, &link_reg);

sys/dev/pci/ixgbe_82598.c

668

hw->phy.ops.read_reg(hw, 0xC79F, IXGBE_TWINAX_DEV, &link_reg);

sys/dev/pci/ixgbe_82598.c

669

hw->phy.ops.read_reg(hw, 0xC00C, IXGBE_TWINAX_DEV,

sys/dev/pci/ixgbe_82598.c

681

hw->phy.ops.read_reg(hw, 0xC79F,

sys/dev/pci/ixgbe_82598.c

684

hw->phy.ops.read_reg(hw, 0xC00C,

sys/dev/pci/ixgbe_82598.c

753

hw->mac.ops.get_link_capabilities(hw, &link_capabilities, &autoneg);

sys/dev/pci/ixgbe_82598.c

802

status = hw->phy.ops.setup_link_speed(hw, speed,

sys/dev/pci/ixgbe_82598.c

831

status = hw->mac.ops.stop_adapter(hw);

sys/dev/pci/ixgbe_82598.c

840

hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &analog_val);

sys/dev/pci/ixgbe_82598.c

843

hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK,

sys/dev/pci/ixgbe_82598.c

846

hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK,

sys/dev/pci/ixgbe_82598.c

849

hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G,

sys/dev/pci/ixgbe_82598.c

852

hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G,

sys/dev/pci/ixgbe_82598.c

855

hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G,

sys/dev/pci/ixgbe_82598.c

858

hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G,

sys/dev/pci/ixgbe_82598.c

861

hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN,

sys/dev/pci/ixgbe_82598.c

864

hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN,

sys/dev/pci/ixgbe_82598.c

873

phy_status = hw->phy.ops.init(hw);

sys/dev/pci/ixgbe_82598.c

879

hw->phy.ops.reset(hw);

sys/dev/pci/ixgbe_82598.c

933

hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr);

sys/dev/pci/ixgbe_82598.c

939

hw->mac.ops.init_rx_addrs(hw);

sys/dev/pci/ixgbe_82599.c

1038

status = hw->phy.ops.setup_link_speed(hw, speed,

sys/dev/pci/ixgbe_82599.c

1066

status = hw->mac.ops.stop_adapter(hw);

sys/dev/pci/ixgbe_82599.c

107

if ((mac->ops.get_media_type(hw) == ixgbe_media_type_fiber) &&

sys/dev/pci/ixgbe_82599.c

1076

status = hw->phy.ops.init(hw);

sys/dev/pci/ixgbe_82599.c

1083

status = hw->mac.ops.setup_sfp(hw);

sys/dev/pci/ixgbe_82599.c

109

mac->ops.disable_tx_laser =

sys/dev/pci/ixgbe_82599.c

1091

if (hw->phy.reset_disable == FALSE && hw->phy.ops.reset != NULL)

sys/dev/pci/ixgbe_82599.c

1092

hw->phy.ops.reset(hw);

sys/dev/pci/ixgbe_82599.c

1106

hw->mac.ops.check_link(hw, &link_speed, &link_up, FALSE);

sys/dev/pci/ixgbe_82599.c

111

mac->ops.enable_tx_laser =

sys/dev/pci/ixgbe_82599.c

113

mac->ops.flap_tx_laser = ixgbe_flap_tx_laser_multispeed_fiber;

sys/dev/pci/ixgbe_82599.c

116

mac->ops.disable_tx_laser = NULL;

sys/dev/pci/ixgbe_82599.c

117

mac->ops.enable_tx_laser = NULL;

sys/dev/pci/ixgbe_82599.c

1174

status = hw->mac.ops.prot_autoc_write(hw,

sys/dev/pci/ixgbe_82599.c

118

mac->ops.flap_tx_laser = NULL;

sys/dev/pci/ixgbe_82599.c

1191

hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr);

sys/dev/pci/ixgbe_82599.c

1199

hw->mac.ops.init_rx_addrs(hw);

sys/dev/pci/ixgbe_82599.c

123

mac->ops.setup_link = ixgbe_setup_mac_link_multispeed_fiber;

sys/dev/pci/ixgbe_82599.c

124

mac->ops.setup_mac_link = ixgbe_setup_mac_link_82599;

sys/dev/pci/ixgbe_82599.c

125

mac->ops.set_rate_select_speed =

sys/dev/pci/ixgbe_82599.c

128

mac->ops.set_rate_select_speed =

sys/dev/pci/ixgbe_82599.c

1302

if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper)

sys/dev/pci/ixgbe_82599.c

1339

hw->phy.ops.identify(hw);

sys/dev/pci/ixgbe_82599.c

1344

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,

sys/dev/pci/ixgbe_82599.c

135

mac->ops.setup_link = ixgbe_setup_mac_link_smartspeed;

sys/dev/pci/ixgbe_82599.c

137

mac->ops.setup_link = ixgbe_setup_mac_link_82599;

sys/dev/pci/ixgbe_82599.c

1427

hw->mac.ops.disable_sec_rx_path(hw);

sys/dev/pci/ixgbe_82599.c

1434

hw->mac.ops.enable_sec_rx_path(hw);

sys/dev/pci/ixgbe_82599.c

1464

if (hw->eeprom.ops.read(hw, IXGBE_FW_PTR, &fw_offset)) {

sys/dev/pci/ixgbe_82599.c

1474

if (hw->eeprom.ops.read(hw, (fw_offset +

sys/dev/pci/ixgbe_82599.c

1488

if (hw->eeprom.ops.read(hw, (fw_ptp_cfg_offset +

sys/dev/pci/ixgbe_82599.c

1519

status = hw->eeprom.ops.read(hw, IXGBE_FW_PTR, &fw_offset);

sys/dev/pci/ixgbe_82599.c

1526

status = hw->eeprom.ops.read(hw, (fw_offset +

sys/dev/pci/ixgbe_82599.c

1535

status = hw->eeprom.ops.read(hw, (fw_lesm_param_offset +

sys/dev/pci/ixgbe_82599.c

174

phy->ops.read_i2c_byte = ixgbe_read_i2c_byte_82599;

sys/dev/pci/ixgbe_82599.c

175

phy->ops.write_i2c_byte = ixgbe_write_i2c_byte_82599;

sys/dev/pci/ixgbe_82599.c

178

ret_val = phy->ops.identify(hw);

sys/dev/pci/ixgbe_82599.c

185

hw->phy.ops.reset = NULL;

sys/dev/pci/ixgbe_82599.c

188

if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper) {

sys/dev/pci/ixgbe_82599.c

189

mac->ops.setup_link = ixgbe_setup_copper_link_82599;

sys/dev/pci/ixgbe_82599.c

190

mac->ops.get_link_capabilities =

sys/dev/pci/ixgbe_82599.c

197

phy->ops.setup_link = ixgbe_setup_phy_link_tnx;

sys/dev/pci/ixgbe_82599.c

198

phy->ops.check_link = ixgbe_check_phy_link_tnx;

sys/dev/pci/ixgbe_82599.c

199

phy->ops.get_firmware_version =

sys/dev/pci/ixgbe_82599.c

219

hw->phy.ops.reset = NULL;

sys/dev/pci/ixgbe_82599.c

227

ret_val = hw->mac.ops.acquire_swfw_sync(hw,

sys/dev/pci/ixgbe_82599.c

234

if (hw->eeprom.ops.read(hw, ++data_offset, &data_value))

sys/dev/pci/ixgbe_82599.c

239

if (hw->eeprom.ops.read(hw, ++data_offset, &data_value))

sys/dev/pci/ixgbe_82599.c

244

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM);

sys/dev/pci/ixgbe_82599.c

251

ret_val = hw->mac.ops.prot_autoc_write(hw,

sys/dev/pci/ixgbe_82599.c

268

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM);

sys/dev/pci/ixgbe_82599.c

294

ret_val = hw->mac.ops.acquire_swfw_sync(hw,

sys/dev/pci/ixgbe_82599.c

329

ret_val = hw->mac.ops.acquire_swfw_sync(hw,

sys/dev/pci/ixgbe_82599.c

345

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM);

sys/dev/pci/ixgbe_82599.c

371

phy->ops.identify = ixgbe_identify_phy_82599;

sys/dev/pci/ixgbe_82599.c

372

phy->ops.init = ixgbe_init_phy_ops_82599;

sys/dev/pci/ixgbe_82599.c

375

mac->ops.reset_hw = ixgbe_reset_hw_82599;

sys/dev/pci/ixgbe_82599.c

376

mac->ops.get_media_type = ixgbe_get_media_type_82599;

sys/dev/pci/ixgbe_82599.c

377

mac->ops.get_supported_physical_layer =

sys/dev/pci/ixgbe_82599.c

379

mac->ops.disable_sec_rx_path = ixgbe_disable_sec_rx_path_generic;

sys/dev/pci/ixgbe_82599.c

380

mac->ops.enable_sec_rx_path = ixgbe_enable_sec_rx_path_generic;

sys/dev/pci/ixgbe_82599.c

381

mac->ops.enable_rx_dma = ixgbe_enable_rx_dma_82599;

sys/dev/pci/ixgbe_82599.c

382

mac->ops.read_analog_reg8 = ixgbe_read_analog_reg8_82599;

sys/dev/pci/ixgbe_82599.c

383

mac->ops.write_analog_reg8 = ixgbe_write_analog_reg8_82599;

sys/dev/pci/ixgbe_82599.c

384

mac->ops.start_hw = ixgbe_start_hw_82599;

sys/dev/pci/ixgbe_82599.c

385

mac->ops.get_device_caps = ixgbe_get_device_caps_generic;

sys/dev/pci/ixgbe_82599.c

386

mac->ops.prot_autoc_read = prot_autoc_read_82599;

sys/dev/pci/ixgbe_82599.c

387

mac->ops.prot_autoc_write = prot_autoc_write_82599;

sys/dev/pci/ixgbe_82599.c

390

mac->ops.set_vmdq = ixgbe_set_vmdq_generic;

sys/dev/pci/ixgbe_82599.c

391

mac->ops.clear_vmdq = ixgbe_clear_vmdq_generic;

sys/dev/pci/ixgbe_82599.c

392

mac->ops.insert_mac_addr = ixgbe_insert_mac_addr_generic;

sys/dev/pci/ixgbe_82599.c

394

mac->ops.set_vfta = ixgbe_set_vfta_generic;

sys/dev/pci/ixgbe_82599.c

395

mac->ops.set_vlvf = ixgbe_set_vlvf_generic;

sys/dev/pci/ixgbe_82599.c

396

mac->ops.clear_vfta = ixgbe_clear_vfta_generic;

sys/dev/pci/ixgbe_82599.c

397

mac->ops.init_uta_tables = ixgbe_init_uta_tables_generic;

sys/dev/pci/ixgbe_82599.c

398

mac->ops.setup_sfp = ixgbe_setup_sfp_modules_82599;

sys/dev/pci/ixgbe_82599.c

401

mac->ops.get_link_capabilities = ixgbe_get_link_capabilities_82599;

sys/dev/pci/ixgbe_82599.c

402

mac->ops.check_link = ixgbe_check_mac_link_generic;

sys/dev/pci/ixgbe_82599.c

403

mac->ops.stop_mac_link_on_d3 = ixgbe_stop_mac_link_on_d3_82599;

sys/dev/pci/ixgbe_82599.c

417

hw->mbx.ops.init_params = ixgbe_init_mbx_params_pf;

sys/dev/pci/ixgbe_82599.c

420

eeprom->ops.read = ixgbe_read_eeprom_82599;

sys/dev/pci/ixgbe_82599.c

610

if (hw->eeprom.ops.read)

sys/dev/pci/ixgbe_82599.c

611

hw->eeprom.ops.read(hw, IXGBE_EEPROM_CTRL_2, &ee_ctrl_2);

sys/dev/pci/ixgbe_82599.c

645

status = hw->mac.ops.acquire_swfw_sync(hw,

sys/dev/pci/ixgbe_82599.c

657

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM);

sys/dev/pci/ixgbe_82599.c

929

status = hw->mac.ops.get_link_capabilities(hw, &link_capabilities,

sys/dev/pci/ixgbe_82599.c

988

status = hw->mac.ops.prot_autoc_write(hw, autoc, FALSE);

sys/dev/pci/ixgbe_phy.c

1081

status = hw->phy.ops.read_reg(hw,

sys/dev/pci/ixgbe_phy.c

1119

hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,

sys/dev/pci/ixgbe_phy.c

1127

hw->phy.ops.write_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,

sys/dev/pci/ixgbe_phy.c

1134

hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG,

sys/dev/pci/ixgbe_phy.c

1142

hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG,

sys/dev/pci/ixgbe_phy.c

1149

hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG,

sys/dev/pci/ixgbe_phy.c

1157

hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG,

sys/dev/pci/ixgbe_phy.c

1167

hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL,

sys/dev/pci/ixgbe_phy.c

1172

hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL,

sys/dev/pci/ixgbe_phy.c

1190

status = hw->phy.ops.read_reg(hw, TNX_FW_REV,

sys/dev/pci/ixgbe_phy.c

1209

status = hw->phy.ops.read_reg(hw, AQ_FW_REV,

sys/dev/pci/ixgbe_phy.c

1235

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL,

sys/dev/pci/ixgbe_phy.c

1239

hw->phy.ops.write_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL,

sys/dev/pci/ixgbe_phy.c

1244

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL,

sys/dev/pci/ixgbe_phy.c

1263

ret_val = hw->eeprom.ops.read(hw, data_offset, &block_crc);

sys/dev/pci/ixgbe_phy.c

1269

ret_val = hw->eeprom.ops.read(hw, data_offset, &eword);

sys/dev/pci/ixgbe_phy.c

1284

ret_val = hw->eeprom.ops.read(hw, data_offset,

sys/dev/pci/ixgbe_phy.c

1290

ret_val = hw->eeprom.ops.read(hw, data_offset,

sys/dev/pci/ixgbe_phy.c

1294

hw->phy.ops.write_reg(hw, phy_offset,

sys/dev/pci/ixgbe_phy.c

130

if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))

sys/dev/pci/ixgbe_phy.c

1364

switch (hw->mac.ops.get_media_type(hw)) {

sys/dev/pci/ixgbe_phy.c

1402

if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_fiber) {

sys/dev/pci/ixgbe_phy.c

1409

hw->mac.ops.set_lan_id(hw);

sys/dev/pci/ixgbe_phy.c

1411

status = hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/pci/ixgbe_phy.c

1422

status = hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/pci/ixgbe_phy.c

1429

status = hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/pci/ixgbe_phy.c

1435

status = hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/pci/ixgbe_phy.c

1478

hw->phy.ops.read_i2c_eeprom(

sys/dev/pci/ixgbe_phy.c

1542

status = hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/pci/ixgbe_phy.c

1549

status = hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/pci/ixgbe_phy.c

1556

status = hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/pci/ixgbe_phy.c

164

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/pci/ixgbe_phy.c

1649

hw->phy.ops.identify_sfp(hw);

sys/dev/pci/ixgbe_phy.c

1668

hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/pci/ixgbe_phy.c

1670

hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/pci/ixgbe_phy.c

1690

hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/pci/ixgbe_phy.c

171

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/pci/ixgbe_phy.c

1726

if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_fiber_qsfp) {

sys/dev/pci/ixgbe_phy.c

1733

hw->mac.ops.set_lan_id(hw);

sys/dev/pci/ixgbe_phy.c

1735

status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_IDENTIFIER,

sys/dev/pci/ixgbe_phy.c

1749

status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_QSFP_10GBE_COMP,

sys/dev/pci/ixgbe_phy.c

1755

status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_QSFP_1GBE_COMP,

sys/dev/pci/ixgbe_phy.c

1780

hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/pci/ixgbe_phy.c

1784

hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/pci/ixgbe_phy.c

1788

hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/pci/ixgbe_phy.c

1830

status = hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/pci/ixgbe_phy.c

1837

status = hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/pci/ixgbe_phy.c

1844

status = hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/pci/ixgbe_phy.c

1924

if (hw->eeprom.ops.read(hw, IXGBE_PHY_INIT_OFFSET_NL, list_offset)) {

sys/dev/pci/ixgbe_phy.c

1941

if (hw->eeprom.ops.read(hw, *list_offset, &sfp_id))

sys/dev/pci/ixgbe_phy.c

1947

if (hw->eeprom.ops.read(hw, *list_offset, data_offset))

sys/dev/pci/ixgbe_phy.c

1957

if (hw->eeprom.ops.read(hw, *list_offset, &sfp_id))

sys/dev/pci/ixgbe_phy.c

1970

hw->eeprom.ops.read(hw, IXGBE_PHY_INIT_OFFSET_NL, list_offset);

sys/dev/pci/ixgbe_phy.c

1972

hw->eeprom.ops.read(hw, *list_offset, data_offset);

sys/dev/pci/ixgbe_phy.c

1999

return hw->phy.ops.read_i2c_byte(hw, byte_offset,

sys/dev/pci/ixgbe_phy.c

2017

return hw->phy.ops.write_i2c_byte(hw, byte_offset,

sys/dev/pci/ixgbe_phy.c

2066

if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))

sys/dev/pci/ixgbe_phy.c

2109

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/pci/ixgbe_phy.c

2115

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/pci/ixgbe_phy.c

2184

if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) !=

sys/dev/pci/ixgbe_phy.c

2217

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/pci/ixgbe_phy.c

2230

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/pci/ixgbe_phy.c

238

if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))

sys/dev/pci/ixgbe_phy.c

261

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/pci/ixgbe_phy.c

267

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/pci/ixgbe_phy.c

2711

hw->phy.ops.read_reg(hw, IXGBE_TN_LASI_STATUS_REG,

sys/dev/pci/ixgbe_phy.c

2736

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_VENDOR_SPECIFIC_1_CONTROL,

sys/dev/pci/ixgbe_phy.c

2750

status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_VENDOR_SPECIFIC_1_CONTROL,

sys/dev/pci/ixgbe_phy.c

322

phy->ops.identify = ixgbe_identify_phy_generic;

sys/dev/pci/ixgbe_phy.c

323

phy->ops.reset = ixgbe_reset_phy_generic;

sys/dev/pci/ixgbe_phy.c

324

phy->ops.read_reg = ixgbe_read_phy_reg_generic;

sys/dev/pci/ixgbe_phy.c

325

phy->ops.write_reg = ixgbe_write_phy_reg_generic;

sys/dev/pci/ixgbe_phy.c

326

phy->ops.read_reg_mdi = ixgbe_read_phy_reg_mdi;

sys/dev/pci/ixgbe_phy.c

327

phy->ops.write_reg_mdi = ixgbe_write_phy_reg_mdi;

sys/dev/pci/ixgbe_phy.c

328

phy->ops.setup_link = ixgbe_setup_phy_link_generic;

sys/dev/pci/ixgbe_phy.c

329

phy->ops.setup_link_speed = ixgbe_setup_phy_link_speed_generic;

sys/dev/pci/ixgbe_phy.c

330

phy->ops.check_link = NULL;

sys/dev/pci/ixgbe_phy.c

331

phy->ops.get_firmware_version = ixgbe_get_phy_firmware_version_generic;

sys/dev/pci/ixgbe_phy.c

332

phy->ops.read_i2c_byte = ixgbe_read_i2c_byte_generic;

sys/dev/pci/ixgbe_phy.c

333

phy->ops.write_i2c_byte = ixgbe_write_i2c_byte_generic;

sys/dev/pci/ixgbe_phy.c

334

phy->ops.read_i2c_eeprom = ixgbe_read_i2c_eeprom_generic;

sys/dev/pci/ixgbe_phy.c

335

phy->ops.write_i2c_eeprom = ixgbe_write_i2c_eeprom_generic;

sys/dev/pci/ixgbe_phy.c

336

phy->ops.i2c_bus_clear = ixgbe_i2c_bus_clear;

sys/dev/pci/ixgbe_phy.c

337

phy->ops.identify_sfp = ixgbe_identify_module_generic;

sys/dev/pci/ixgbe_phy.c

339

phy->ops.read_i2c_combined = ixgbe_read_i2c_combined_generic;

sys/dev/pci/ixgbe_phy.c

340

phy->ops.write_i2c_combined = ixgbe_write_i2c_combined_generic;

sys/dev/pci/ixgbe_phy.c

341

phy->ops.read_i2c_combined_unlocked =

sys/dev/pci/ixgbe_phy.c

343

phy->ops.write_i2c_combined_unlocked =

sys/dev/pci/ixgbe_phy.c

345

phy->ops.read_i2c_byte_unlocked = ixgbe_read_i2c_byte_generic_unlocked;

sys/dev/pci/ixgbe_phy.c

346

phy->ops.write_i2c_byte_unlocked =

sys/dev/pci/ixgbe_phy.c

348

phy->ops.check_overtemp = ixgbe_tn_check_overtemp;

sys/dev/pci/ixgbe_phy.c

375

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,

sys/dev/pci/ixgbe_phy.c

481

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH,

sys/dev/pci/ixgbe_phy.c

505

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH,

sys/dev/pci/ixgbe_phy.c

511

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_LOW,

sys/dev/pci/ixgbe_phy.c

585

(IXGBE_ERR_OVERTEMP == hw->phy.ops.check_overtemp(hw)))

sys/dev/pci/ixgbe_phy.c

596

hw->phy.ops.write_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL,

sys/dev/pci/ixgbe_phy.c

608

status = hw->phy.ops.read_reg(hw,

sys/dev/pci/ixgbe_phy.c

620

status = hw->phy.ops.read_reg(hw,

sys/dev/pci/ixgbe_phy.c

742

if (hw->mac.ops.acquire_swfw_sync(hw, gssr))

sys/dev/pci/ixgbe_phy.c

745

status = hw->phy.ops.read_reg_mdi(hw, reg_addr, device_type, phy_data);

sys/dev/pci/ixgbe_phy.c

747

hw->mac.ops.release_swfw_sync(hw, gssr);

sys/dev/pci/ixgbe_phy.c

842

if (hw->mac.ops.acquire_swfw_sync(hw, gssr) == IXGBE_SUCCESS) {

sys/dev/pci/ixgbe_phy.c

843

status = hw->phy.ops.write_reg_mdi(hw, reg_addr, device_type,

sys/dev/pci/ixgbe_phy.c

845

hw->mac.ops.release_swfw_sync(hw, gssr);

sys/dev/pci/ixgbe_phy.c

871

hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,

sys/dev/pci/ixgbe_phy.c

880

hw->phy.ops.write_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,

sys/dev/pci/ixgbe_phy.c

884

hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG,

sys/dev/pci/ixgbe_phy.c

909

hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG,

sys/dev/pci/ixgbe_phy.c

914

hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG,

sys/dev/pci/ixgbe_phy.c

924

hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG,

sys/dev/pci/ixgbe_phy.c

933

hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL,

sys/dev/pci/ixgbe_phy.c

938

hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL,

sys/dev/pci/ixgbe_phy.c

981

hw->phy.ops.setup_link(hw);

sys/dev/pci/ixgbe_phy.c

998

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_SPEED_ABILITY,

sys/dev/pci/ixgbe_type.h

4036

struct ixgbe_link_operations ops;

sys/dev/pci/ixgbe_type.h

4041

struct ixgbe_eeprom_operations ops;

sys/dev/pci/ixgbe_type.h

4052

struct ixgbe_mac_operations ops;

sys/dev/pci/ixgbe_type.h

4080

struct ixgbe_phy_operations ops;

sys/dev/pci/ixgbe_type.h

4299

struct ixgbe_mbx_operations ops;

sys/dev/pci/ixgbe_vf.c

100

hw->mac.ops.set_rar = ixgbe_set_rar_vf;

sys/dev/pci/ixgbe_vf.c

101

hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf;

sys/dev/pci/ixgbe_vf.c

102

hw->mac.ops.init_rx_addrs = NULL;

sys/dev/pci/ixgbe_vf.c

103

hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf;

sys/dev/pci/ixgbe_vf.c

104

hw->mac.ops.update_xcast_mode = ixgbevf_update_xcast_mode;

sys/dev/pci/ixgbe_vf.c

105

hw->mac.ops.get_link_state = ixgbe_get_link_state_vf;

sys/dev/pci/ixgbe_vf.c

106

hw->mac.ops.enable_mc = NULL;

sys/dev/pci/ixgbe_vf.c

107

hw->mac.ops.disable_mc = NULL;

sys/dev/pci/ixgbe_vf.c

108

hw->mac.ops.clear_vfta = NULL;

sys/dev/pci/ixgbe_vf.c

109

hw->mac.ops.set_vfta = ixgbe_set_vfta_vf;

sys/dev/pci/ixgbe_vf.c

110

hw->mac.ops.set_rlpml = ixgbevf_rlpml_set_vf;

sys/dev/pci/ixgbe_vf.c

113

hw->mac.ops.fc_enable = ixgbe_dummy_handler_vf;

sys/dev/pci/ixgbe_vf.c

114

hw->mac.ops.setup_fc = ixgbe_dummy_handler_vf;

sys/dev/pci/ixgbe_vf.c

115

hw->mac.ops.fc_autoneg = ixgbe_dummy_void_handler_vf;

sys/dev/pci/ixgbe_vf.c

120

hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf;

sys/dev/pci/ixgbe_vf.c

194

int32_t status = hw->mac.ops.start_hw(hw);

sys/dev/pci/ixgbe_vf.c

196

hw->mac.ops.get_mac_addr(hw, hw->mac.addr);

sys/dev/pci/ixgbe_vf.c

219

hw->mac.ops.stop_adapter(hw);

sys/dev/pci/ixgbe_vf.c

233

while (!mbx->ops.check_for_rst(hw, 0) && timeout) {

sys/dev/pci/ixgbe_vf.c

603

if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout)

sys/dev/pci/ixgbe_vf.c

81

hw->mac.ops.init_hw = ixgbe_init_hw_vf;

sys/dev/pci/ixgbe_vf.c

82

hw->mac.ops.reset_hw = ixgbe_reset_hw_vf;

sys/dev/pci/ixgbe_vf.c

83

hw->mac.ops.start_hw = ixgbe_start_hw_vf;

sys/dev/pci/ixgbe_vf.c

85

hw->mac.ops.clear_hw_cntrs = NULL;

sys/dev/pci/ixgbe_vf.c

86

hw->mac.ops.get_media_type = NULL;

sys/dev/pci/ixgbe_vf.c

87

hw->mac.ops.get_supported_physical_layer =

sys/dev/pci/ixgbe_vf.c

89

hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf;

sys/dev/pci/ixgbe_vf.c

90

hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf;

sys/dev/pci/ixgbe_vf.c

91

hw->mac.ops.get_bus_info = NULL;

sys/dev/pci/ixgbe_vf.c

92

hw->mac.ops.negotiate_api_version = ixgbevf_negotiate_api_version;

sys/dev/pci/ixgbe_vf.c

95

hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf;

sys/dev/pci/ixgbe_vf.c

96

hw->mac.ops.check_link = ixgbe_check_mac_link_vf;

sys/dev/pci/ixgbe_vf.c

97

hw->mac.ops.get_link_capabilities = NULL;

sys/dev/pci/ixgbe_x540.c

100

eeprom->ops.validate_checksum = ixgbe_validate_eeprom_checksum_X540;

sys/dev/pci/ixgbe_x540.c

101

eeprom->ops.calc_checksum = ixgbe_calc_eeprom_checksum_X540;

sys/dev/pci/ixgbe_x540.c

104

phy->ops.init = ixgbe_init_phy_ops_generic;

sys/dev/pci/ixgbe_x540.c

105

phy->ops.reset = NULL;

sys/dev/pci/ixgbe_x540.c

106

phy->ops.set_phy_power = ixgbe_set_copper_phy_power;

sys/dev/pci/ixgbe_x540.c

109

mac->ops.reset_hw = ixgbe_reset_hw_X540;

sys/dev/pci/ixgbe_x540.c

110

mac->ops.get_media_type = ixgbe_get_media_type_X540;

sys/dev/pci/ixgbe_x540.c

111

mac->ops.get_supported_physical_layer =

sys/dev/pci/ixgbe_x540.c

113

mac->ops.read_analog_reg8 = NULL;

sys/dev/pci/ixgbe_x540.c

114

mac->ops.write_analog_reg8 = NULL;

sys/dev/pci/ixgbe_x540.c

115

mac->ops.start_hw = ixgbe_start_hw_X540;

sys/dev/pci/ixgbe_x540.c

116

mac->ops.get_device_caps = ixgbe_get_device_caps_generic;

sys/dev/pci/ixgbe_x540.c

117

mac->ops.acquire_swfw_sync = ixgbe_acquire_swfw_sync_X540;

sys/dev/pci/ixgbe_x540.c

118

mac->ops.release_swfw_sync = ixgbe_release_swfw_sync_X540;

sys/dev/pci/ixgbe_x540.c

119

mac->ops.init_swfw_sync = ixgbe_init_swfw_sync_X540;

sys/dev/pci/ixgbe_x540.c

120

mac->ops.disable_sec_rx_path = ixgbe_disable_sec_rx_path_generic;

sys/dev/pci/ixgbe_x540.c

121

mac->ops.enable_sec_rx_path = ixgbe_enable_sec_rx_path_generic;

sys/dev/pci/ixgbe_x540.c

124

mac->ops.set_vmdq = ixgbe_set_vmdq_generic;

sys/dev/pci/ixgbe_x540.c

125

mac->ops.clear_vmdq = ixgbe_clear_vmdq_generic;

sys/dev/pci/ixgbe_x540.c

126

mac->ops.insert_mac_addr = ixgbe_insert_mac_addr_generic;

sys/dev/pci/ixgbe_x540.c

128

mac->ops.set_vfta = ixgbe_set_vfta_generic;

sys/dev/pci/ixgbe_x540.c

129

mac->ops.set_vlvf = ixgbe_set_vlvf_generic;

sys/dev/pci/ixgbe_x540.c

130

mac->ops.clear_vfta = ixgbe_clear_vfta_generic;

sys/dev/pci/ixgbe_x540.c

131

mac->ops.init_uta_tables = ixgbe_init_uta_tables_generic;

sys/dev/pci/ixgbe_x540.c

134

mac->ops.get_link_capabilities =

sys/dev/pci/ixgbe_x540.c

136

mac->ops.setup_link = ixgbe_setup_mac_link_X540;

sys/dev/pci/ixgbe_x540.c

137

mac->ops.check_link = ixgbe_check_mac_link_generic;

sys/dev/pci/ixgbe_x540.c

155

hw->mbx.ops.init_params = ixgbe_init_mbx_params_pf;

sys/dev/pci/ixgbe_x540.c

158

mac->ops.blink_led_start = ixgbe_blink_led_start_X540;

sys/dev/pci/ixgbe_x540.c

159

mac->ops.blink_led_stop = ixgbe_blink_led_stop_X540;

sys/dev/pci/ixgbe_x540.c

203

return hw->phy.ops.setup_link_speed(hw, speed,

sys/dev/pci/ixgbe_x540.c

223

status = hw->mac.ops.stop_adapter(hw);

sys/dev/pci/ixgbe_x540.c

231

status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);

sys/dev/pci/ixgbe_x540.c

241

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/pci/ixgbe_x540.c

272

hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr);

sys/dev/pci/ixgbe_x540.c

280

hw->mac.ops.init_rx_addrs(hw);

sys/dev/pci/ixgbe_x540.c

323

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,

sys/dev/pci/ixgbe_x540.c

380

if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) ==

sys/dev/pci/ixgbe_x540.c

383

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);

sys/dev/pci/ixgbe_x540.c

404

if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) ==

sys/dev/pci/ixgbe_x540.c

407

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);

sys/dev/pci/ixgbe_x540.c

514

status = hw->eeprom.ops.read(hw, 0, &checksum);

sys/dev/pci/ixgbe_x540.c

520

if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))

sys/dev/pci/ixgbe_x540.c

523

status = hw->eeprom.ops.calc_checksum(hw);

sys/dev/pci/ixgbe_x540.c

551

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);

sys/dev/pci/ixgbe_x540.c

575

status = hw->eeprom.ops.read(hw, 0, &checksum);

sys/dev/pci/ixgbe_x540.c

581

if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))

sys/dev/pci/ixgbe_x540.c

584

status = hw->eeprom.ops.calc_checksum(hw);

sys/dev/pci/ixgbe_x540.c

600

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);

sys/dev/pci/ixgbe_x540.c

945

hw->mac.ops.check_link(hw, &speed, &link_up, FALSE);

sys/dev/pci/ixgbe_x540.c

96

eeprom->ops.init_params = ixgbe_init_eeprom_params_X540;

sys/dev/pci/ixgbe_x540.c

97

eeprom->ops.read = ixgbe_read_eerd_X540;

sys/dev/pci/ixgbe_x540.c

98

eeprom->ops.write = ixgbe_write_eewr_X540;

sys/dev/pci/ixgbe_x540.c

99

eeprom->ops.update_checksum = ixgbe_update_eeprom_checksum_X540;

sys/dev/pci/ixgbe_x550.c

1106

ret = hw->mac.ops.acquire_swfw_sync(hw, gssr);

sys/dev/pci/ixgbe_x550.c

1134

hw->mac.ops.release_swfw_sync(hw, gssr);

sys/dev/pci/ixgbe_x550.c

1152

ret = hw->mac.ops.acquire_swfw_sync(hw, gssr);

sys/dev/pci/ixgbe_x550.c

1180

hw->mac.ops.release_swfw_sync(hw, gssr);

sys/dev/pci/ixgbe_x550.c

1443

hw->phy.ops.reset = NULL;

sys/dev/pci/ixgbe_x550.c

1459

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

146

mac->ops.dmac_config = ixgbe_dmac_config_X550;

sys/dev/pci/ixgbe_x550.c

1469

status = hw->mac.ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

147

mac->ops.dmac_config_tcs = ixgbe_dmac_config_tcs_X550;

sys/dev/pci/ixgbe_x550.c

1477

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

148

mac->ops.dmac_update_tcs = ixgbe_dmac_update_tcs_X550;

sys/dev/pci/ixgbe_x550.c

1487

status = hw->mac.ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

149

mac->ops.setup_eee = NULL;

sys/dev/pci/ixgbe_x550.c

150

mac->ops.set_source_address_pruning =

sys/dev/pci/ixgbe_x550.c

1508

rc = mac->ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

1519

rc = mac->ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

1525

rc = mac->ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

153

eeprom->ops.init_params = ixgbe_init_eeprom_params_X550;

sys/dev/pci/ixgbe_x550.c

1533

rc = mac->ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

1539

rc = mac->ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

154

eeprom->ops.calc_checksum = ixgbe_calc_eeprom_checksum_X550;

sys/dev/pci/ixgbe_x550.c

155

eeprom->ops.read = ixgbe_read_ee_hostif_X550;

sys/dev/pci/ixgbe_x550.c

1551

rc = mac->ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

156

eeprom->ops.write = ixgbe_write_ee_hostif_X550;

sys/dev/pci/ixgbe_x550.c

1561

return hw->phy.ops.setup_link_speed(hw, speed, autoneg_wait);

sys/dev/pci/ixgbe_x550.c

157

eeprom->ops.update_checksum = ixgbe_update_eeprom_checksum_X550;

sys/dev/pci/ixgbe_x550.c

1577

rc = mac->ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

158

eeprom->ops.validate_checksum = ixgbe_validate_eeprom_checksum_X550;

sys/dev/pci/ixgbe_x550.c

1588

rc = mac->ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

1594

rc = mac->ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

160

mac->ops.disable_rx = ixgbe_disable_rx_x550;

sys/dev/pci/ixgbe_x550.c

1602

rc = mac->ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

1608

rc = mac->ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

1614

rc = mac->ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

1626

rc = mac->ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

163

hw->mac.ops.led_on = NULL;

sys/dev/pci/ixgbe_x550.c

1634

return hw->phy.ops.setup_link_speed(hw, speed, autoneg_wait);

sys/dev/pci/ixgbe_x550.c

164

hw->mac.ops.led_off = NULL;

sys/dev/pci/ixgbe_x550.c

1647

switch (hw->mac.ops.get_media_type(hw)) {

sys/dev/pci/ixgbe_x550.c

1652

mac->ops.disable_tx_laser = NULL;

sys/dev/pci/ixgbe_x550.c

1653

mac->ops.enable_tx_laser = NULL;

sys/dev/pci/ixgbe_x550.c

1654

mac->ops.flap_tx_laser = NULL;

sys/dev/pci/ixgbe_x550.c

1655

mac->ops.setup_link = ixgbe_setup_mac_link_multispeed_fiber;

sys/dev/pci/ixgbe_x550.c

1656

mac->ops.set_rate_select_speed =

sys/dev/pci/ixgbe_x550.c

1661

mac->ops.setup_mac_link =

sys/dev/pci/ixgbe_x550.c

1664

mac->ops.setup_mac_link =

sys/dev/pci/ixgbe_x550.c

1673

mac->ops.setup_link = ixgbe_setup_sgmii_fw;

sys/dev/pci/ixgbe_x550.c

1674

mac->ops.check_link =

sys/dev/pci/ixgbe_x550.c

1677

mac->ops.setup_link =

sys/dev/pci/ixgbe_x550.c

168

hw->mac.ops.led_on = ixgbe_led_on_t_X550em;

sys/dev/pci/ixgbe_x550.c

1681

mac->ops.setup_link = ixgbe_setup_mac_link_t_X550em;

sys/dev/pci/ixgbe_x550.c

1682

mac->ops.check_link = ixgbe_check_link_t_X550em;

sys/dev/pci/ixgbe_x550.c

1688

mac->ops.setup_link = ixgbe_setup_sgmii;

sys/dev/pci/ixgbe_x550.c

169

hw->mac.ops.led_off = ixgbe_led_off_t_X550em;

sys/dev/pci/ixgbe_x550.c

1786

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG,

sys/dev/pci/ixgbe_x550.c

1795

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_FLAG,

sys/dev/pci/ixgbe_x550.c

1805

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_ALARM_1,

sys/dev/pci/ixgbe_x550.c

1819

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_FAULT_MSG,

sys/dev/pci/ixgbe_x550.c

1835

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG,

sys/dev/pci/ixgbe_x550.c

1843

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM2,

sys/dev/pci/ixgbe_x550.c

187

return hw->link.ops.read_link_unlocked(hw, hw->link.addr, reg, value);

sys/dev/pci/ixgbe_x550.c

1885

status = hw->phy.ops.read_reg(hw,

sys/dev/pci/ixgbe_x550.c

1894

status = hw->phy.ops.write_reg(hw,

sys/dev/pci/ixgbe_x550.c

1903

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_MASK,

sys/dev/pci/ixgbe_x550.c

1913

status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_MASK,

sys/dev/pci/ixgbe_x550.c

1921

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_MASK,

sys/dev/pci/ixgbe_x550.c

1931

status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_MASK,

sys/dev/pci/ixgbe_x550.c

1939

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_STD_MASK,

sys/dev/pci/ixgbe_x550.c

1948

status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_STD_MASK,

sys/dev/pci/ixgbe_x550.c

1968

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

1986

status = hw->mac.ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

1992

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

200

return hw->link.ops.write_link_unlocked(hw, hw->link.addr, reg, value);

sys/dev/pci/ixgbe_x550.c

2005

status = hw->mac.ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2099

hw->mac.ops.set_lan_id(hw);

sys/dev/pci/ixgbe_x550.c

2102

if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) {

sys/dev/pci/ixgbe_x550.c

2105

phy->ops.identify_sfp = ixgbe_identify_sfp_module_X550em;

sys/dev/pci/ixgbe_x550.c

2111

phy->ops.read_reg_mdi = NULL;

sys/dev/pci/ixgbe_x550.c

2112

phy->ops.write_reg_mdi = NULL;

sys/dev/pci/ixgbe_x550.c

2113

hw->phy.ops.read_reg = NULL;

sys/dev/pci/ixgbe_x550.c

2114

hw->phy.ops.write_reg = NULL;

sys/dev/pci/ixgbe_x550.c

2115

phy->ops.check_overtemp = ixgbe_check_overtemp_fw;

sys/dev/pci/ixgbe_x550.c

2124

hw->phy.ops.read_reg = ixgbe_read_phy_reg_x550a;

sys/dev/pci/ixgbe_x550.c

2125

hw->phy.ops.write_reg = ixgbe_write_phy_reg_x550a;

sys/dev/pci/ixgbe_x550.c

2136

phy->ops.read_reg_mdi = NULL;

sys/dev/pci/ixgbe_x550.c

2137

phy->ops.write_reg_mdi = NULL;

sys/dev/pci/ixgbe_x550.c

2143

ret_val = phy->ops.identify(hw);

sys/dev/pci/ixgbe_x550.c

215

if (hw->phy.ops.read_i2c_byte_unlocked)

sys/dev/pci/ixgbe_x550.c

2151

phy->ops.reset = NULL;

sys/dev/pci/ixgbe_x550.c

2156

phy->ops.setup_link = NULL;

sys/dev/pci/ixgbe_x550.c

2157

phy->ops.read_reg = ixgbe_read_phy_reg_x550em;

sys/dev/pci/ixgbe_x550.c

2158

phy->ops.write_reg = ixgbe_write_phy_reg_x550em;

sys/dev/pci/ixgbe_x550.c

216

status = hw->phy.ops.read_i2c_byte_unlocked(hw, reg, IXGBE_PE,

sys/dev/pci/ixgbe_x550.c

2161

phy->ops.setup_link = ixgbe_setup_kr_x550em;

sys/dev/pci/ixgbe_x550.c

2162

phy->ops.read_reg = ixgbe_read_phy_reg_x550em;

sys/dev/pci/ixgbe_x550.c

2163

phy->ops.write_reg = ixgbe_write_phy_reg_x550em;

sys/dev/pci/ixgbe_x550.c

2167

phy->ops.setup_link = NULL;

sys/dev/pci/ixgbe_x550.c

2168

phy->ops.reset = NULL;

sys/dev/pci/ixgbe_x550.c

2172

phy->ops.setup_link = NULL;

sys/dev/pci/ixgbe_x550.c

2173

phy->ops.read_reg = ixgbe_read_phy_reg_x550em;

sys/dev/pci/ixgbe_x550.c

2174

phy->ops.write_reg = ixgbe_write_phy_reg_x550em;

sys/dev/pci/ixgbe_x550.c

2180

phy->ops.setup_internal_link =

sys/dev/pci/ixgbe_x550.c

2187

phy->ops.enter_lplu = ixgbe_enter_lplu_t_x550em;

sys/dev/pci/ixgbe_x550.c

2189

phy->ops.handle_lasi = ixgbe_handle_lasi_ext_t_x550em;

sys/dev/pci/ixgbe_x550.c

2190

phy->ops.reset = ixgbe_reset_phy_t_X550em;

sys/dev/pci/ixgbe_x550.c

2193

phy->ops.setup_link = NULL;

sys/dev/pci/ixgbe_x550.c

2196

phy->ops.setup_link = ixgbe_setup_fw_link;

sys/dev/pci/ixgbe_x550.c

2197

phy->ops.reset = ixgbe_reset_phy_fw;

sys/dev/pci/ixgbe_x550.c

2257

status = hw->mac.ops.stop_adapter(hw);

sys/dev/pci/ixgbe_x550.c

2268

status = hw->phy.ops.init(hw);

sys/dev/pci/ixgbe_x550.c

2292

status = hw->mac.ops.setup_sfp(hw);

sys/dev/pci/ixgbe_x550.c

2300

if (!hw->phy.reset_disable && hw->phy.ops.reset) {

sys/dev/pci/ixgbe_x550.c

2301

if (hw->phy.ops.reset(hw) == IXGBE_ERR_OVERTEMP)

sys/dev/pci/ixgbe_x550.c

2313

hw->mac.ops.check_link(hw, &link_speed, &link_up, FALSE);

sys/dev/pci/ixgbe_x550.c

2318

status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);

sys/dev/pci/ixgbe_x550.c

2327

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/pci/ixgbe_x550.c

2354

hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr);

sys/dev/pci/ixgbe_x550.c

236

if (hw->phy.ops.write_i2c_byte_unlocked)

sys/dev/pci/ixgbe_x550.c

2361

hw->mac.ops.init_rx_addrs(hw);

sys/dev/pci/ixgbe_x550.c

237

status = hw->phy.ops.write_i2c_byte_unlocked(hw, reg, IXGBE_PE,

sys/dev/pci/ixgbe_x550.c

2383

status = hw->phy.ops.read_reg(hw,

sys/dev/pci/ixgbe_x550.c

2395

status = hw->phy.ops.read_reg(hw,

sys/dev/pci/ixgbe_x550.c

2405

status = hw->phy.ops.write_reg(hw,

sys/dev/pci/ixgbe_x550.c

2472

ret_val = hw->link.ops.write_link(hw, hw->link.addr, reg_slice,

sys/dev/pci/ixgbe_x550.c

2492

status = mac->ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2516

status = mac->ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2557

ret_val = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2568

ret_val = hw->mac.ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2588

ret_val = hw->phy.ops.read_reg(hw, IXGBE_CS4227_EFUSE_PDF_SKU,

sys/dev/pci/ixgbe_x550.c

2606

ret_val = hw->phy.ops.read_reg(hw, reg_slice,

sys/dev/pci/ixgbe_x550.c

2619

ret_val = hw->phy.ops.write_reg(hw, reg_slice,

sys/dev/pci/ixgbe_x550.c

2623

ret_val = hw->phy.ops.read_reg(hw, reg_slice,

sys/dev/pci/ixgbe_x550.c

2642

status = mac->ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2648

status = mac->ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2655

status = mac->ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2663

status = mac->ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2668

status = mac->ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2676

status = mac->ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2683

status = mac->ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2692

status = mac->ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2717

status = mac->ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2739

status = mac->ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2773

ret = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,

sys/dev/pci/ixgbe_x550.c

2779

ret = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,

sys/dev/pci/ixgbe_x550.c

2809

if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_copper)

sys/dev/pci/ixgbe_x550.c

2822

status = hw->phy.ops.read_reg(hw,

sys/dev/pci/ixgbe_x550.c

2871

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2879

status = hw->mac.ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2886

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2893

status = hw->mac.ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2900

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2906

status = hw->mac.ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2913

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2919

status = hw->mac.ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

2954

status = hw->mac.ops.acquire_swfw_sync(hw, mask);

sys/dev/pci/ixgbe_x550.c

2965

hw->mac.ops.release_swfw_sync(hw, mask);

sys/dev/pci/ixgbe_x550.c

2992

status = hw->mac.ops.acquire_swfw_sync(hw, mask);

sys/dev/pci/ixgbe_x550.c

3041

hw->mac.ops.release_swfw_sync(hw, mask);

sys/dev/pci/ixgbe_x550.c

3093

if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) ==

sys/dev/pci/ixgbe_x550.c

3096

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);

sys/dev/pci/ixgbe_x550.c

3196

hw->eeprom.ops.init_params(hw);

sys/dev/pci/ixgbe_x550.c

3292

status = hw->eeprom.ops.read(hw, 0, &checksum);

sys/dev/pci/ixgbe_x550.c

3298

status = hw->eeprom.ops.calc_checksum(hw);

sys/dev/pci/ixgbe_x550.c

333

status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);

sys/dev/pci/ixgbe_x550.c

3404

hw->phy.ops.identify(hw);

sys/dev/pci/ixgbe_x550.c

3431

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,

sys/dev/pci/ixgbe_x550.c

3457

if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber)

sys/dev/pci/ixgbe_x550.c

3478

hw->mac.ops.set_lan_id(hw);

sys/dev/pci/ixgbe_x550.c

353

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/pci/ixgbe_x550.c

3558

status = hw->eeprom.ops.read(hw, NVM_INIT_CTRL_3, &hw->eeprom.ctrl_word_3);

sys/dev/pci/ixgbe_x550.c

3579

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_STAT,

sys/dev/pci/ixgbe_x550.c

359

status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);

sys/dev/pci/ixgbe_x550.c

3602

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM,

sys/dev/pci/ixgbe_x550.c

3609

status = hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,

sys/dev/pci/ixgbe_x550.c

3616

status = hw->phy.ops.read_reg(hw,

sys/dev/pci/ixgbe_x550.c

3627

status = hw->mac.ops.setup_link(hw, lcd_speed, FALSE);

sys/dev/pci/ixgbe_x550.c

3650

status = hw->phy.ops.read_reg(hw, IXGBE_AUTO_NEG_LP_STATUS,

sys/dev/pci/ixgbe_x550.c

3734

ret_val = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

3745

ret_val = hw->mac.ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

3787

hw->mac.ops.check_link(hw, &speed, &link_up, FALSE);

sys/dev/pci/ixgbe_x550.c

3794

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

380

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/pci/ixgbe_x550.c

3808

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

3817

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

382

status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);

sys/dev/pci/ixgbe_x550.c

3876

hw->mac.ops.check_link(hw, &speed, &link_up, FALSE);

sys/dev/pci/ixgbe_x550.c

3934

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

394

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/pci/ixgbe_x550.c

3985

status = hw->mac.ops.write_iosf_sb_reg(hw,

sys/dev/pci/ixgbe_x550.c

4144

if (hw->mac.ops.acquire_swfw_sync(hw, mask))

sys/dev/pci/ixgbe_x550.c

4147

status = hw->phy.ops.read_reg_mdi(hw, reg_addr, device_type, phy_data);

sys/dev/pci/ixgbe_x550.c

4149

hw->mac.ops.release_swfw_sync(hw, mask);

sys/dev/pci/ixgbe_x550.c

4172

if (hw->mac.ops.acquire_swfw_sync(hw, mask) == IXGBE_SUCCESS) {

sys/dev/pci/ixgbe_x550.c

4173

status = hw->phy.ops.write_reg_mdi(hw, reg_addr, device_type,

sys/dev/pci/ixgbe_x550.c

4175

hw->mac.ops.release_swfw_sync(hw, mask);

sys/dev/pci/ixgbe_x550.c

4205

return hw->phy.ops.setup_internal_link(hw);

sys/dev/pci/ixgbe_x550.c

423

hw->mac.ops.set_lan_id(hw);

sys/dev/pci/ixgbe_x550.c

4248

return hw->phy.ops.setup_link_speed(hw, speed, autoneg_wait_to_complete);

sys/dev/pci/ixgbe_x550.c

4266

if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_copper)

sys/dev/pci/ixgbe_x550.c

4282

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,

sys/dev/pci/ixgbe_x550.c

4332

hw->phy.ops.read_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx,

sys/dev/pci/ixgbe_x550.c

4335

hw->phy.ops.write_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx,

sys/dev/pci/ixgbe_x550.c

4360

hw->phy.ops.read_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx,

sys/dev/pci/ixgbe_x550.c

4363

hw->phy.ops.write_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx,

sys/dev/pci/ixgbe_x550.c

578

hw->phy.ops.read_reg = NULL;

sys/dev/pci/ixgbe_x550.c

579

hw->phy.ops.write_reg = NULL;

sys/dev/pci/ixgbe_x550.c

635

mac->ops.disable_sec_rx_path = NULL;

sys/dev/pci/ixgbe_x550.c

636

mac->ops.enable_sec_rx_path = NULL;

sys/dev/pci/ixgbe_x550.c

639

mac->ops.prot_autoc_read = NULL;

sys/dev/pci/ixgbe_x550.c

640

mac->ops.prot_autoc_write = NULL;

sys/dev/pci/ixgbe_x550.c

644

mac->ops.get_bus_info = ixgbe_get_bus_info_X550em;

sys/dev/pci/ixgbe_x550.c

647

mac->ops.get_media_type = ixgbe_get_media_type_X550em;

sys/dev/pci/ixgbe_x550.c

648

mac->ops.setup_sfp = ixgbe_setup_sfp_modules_X550em;

sys/dev/pci/ixgbe_x550.c

649

mac->ops.get_link_capabilities = ixgbe_get_link_capabilities_X550em;

sys/dev/pci/ixgbe_x550.c

650

mac->ops.reset_hw = ixgbe_reset_hw_X550em;

sys/dev/pci/ixgbe_x550.c

651

mac->ops.get_supported_physical_layer =

sys/dev/pci/ixgbe_x550.c

654

if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper)

sys/dev/pci/ixgbe_x550.c

655

mac->ops.setup_fc = ixgbe_setup_fc_generic;

sys/dev/pci/ixgbe_x550.c

657

mac->ops.setup_fc = ixgbe_setup_fc_X550em;

sys/dev/pci/ixgbe_x550.c

660

phy->ops.init = ixgbe_init_phy_ops_X550em;

sys/dev/pci/ixgbe_x550.c

664

mac->ops.setup_fc = NULL;

sys/dev/pci/ixgbe_x550.c

665

phy->ops.identify = ixgbe_identify_phy_fw;

sys/dev/pci/ixgbe_x550.c

666

phy->ops.set_phy_power = NULL;

sys/dev/pci/ixgbe_x550.c

667

phy->ops.get_firmware_version = NULL;

sys/dev/pci/ixgbe_x550.c

670

mac->ops.setup_fc = NULL;

sys/dev/pci/ixgbe_x550.c

671

phy->ops.identify = ixgbe_identify_phy_x550em;

sys/dev/pci/ixgbe_x550.c

672

phy->ops.set_phy_power = NULL;

sys/dev/pci/ixgbe_x550.c

675

phy->ops.identify = ixgbe_identify_phy_x550em;

sys/dev/pci/ixgbe_x550.c

678

if (mac->ops.get_media_type(hw) != ixgbe_media_type_copper)

sys/dev/pci/ixgbe_x550.c

679

phy->ops.set_phy_power = NULL;

sys/dev/pci/ixgbe_x550.c

683

eeprom->ops.init_params = ixgbe_init_eeprom_params_X540;

sys/dev/pci/ixgbe_x550.c

684

eeprom->ops.read = ixgbe_read_ee_hostif_X550;

sys/dev/pci/ixgbe_x550.c

685

eeprom->ops.write = ixgbe_write_ee_hostif_X550;

sys/dev/pci/ixgbe_x550.c

686

eeprom->ops.update_checksum = ixgbe_update_eeprom_checksum_X550;

sys/dev/pci/ixgbe_x550.c

687

eeprom->ops.validate_checksum = ixgbe_validate_eeprom_checksum_X550;

sys/dev/pci/ixgbe_x550.c

688

eeprom->ops.calc_checksum = ixgbe_calc_eeprom_checksum_X550;

sys/dev/pci/ixgbe_x550.c

776

return hw->phy.ops.setup_link(hw);

sys/dev/pci/ixgbe_x550.c

798

mac->ops.read_iosf_sb_reg = ixgbe_read_iosf_sb_reg_x550;

sys/dev/pci/ixgbe_x550.c

799

mac->ops.write_iosf_sb_reg = ixgbe_write_iosf_sb_reg_x550;

sys/dev/pci/ixgbe_x550.c

801

mac->ops.read_iosf_sb_reg = ixgbe_read_iosf_sb_reg_x550a;

sys/dev/pci/ixgbe_x550.c

802

mac->ops.write_iosf_sb_reg = ixgbe_write_iosf_sb_reg_x550a;

sys/dev/pci/ixgbe_x550.c

804

mac->ops.acquire_swfw_sync = ixgbe_acquire_swfw_sync_X550a;

sys/dev/pci/ixgbe_x550.c

805

mac->ops.release_swfw_sync = ixgbe_release_swfw_sync_X550a;

sys/dev/pci/ixgbe_x550.c

807

switch (mac->ops.get_media_type(hw)) {

sys/dev/pci/ixgbe_x550.c

809

mac->ops.setup_fc = NULL;

sys/dev/pci/ixgbe_x550.c

810

mac->ops.fc_autoneg = ixgbe_fc_autoneg_fiber_x550em_a;

sys/dev/pci/ixgbe_x550.c

813

mac->ops.fc_autoneg = ixgbe_fc_autoneg_backplane_x550em_a;

sys/dev/pci/ixgbe_x550.c

814

mac->ops.setup_fc = ixgbe_setup_fc_backplane_x550em_a;

sys/dev/pci/ixgbe_x550.c

823

mac->ops.fc_autoneg = ixgbe_fc_autoneg_sgmii_x550em_a;

sys/dev/pci/ixgbe_x550.c

824

mac->ops.setup_fc = ixgbe_fc_autoneg_fw;

sys/dev/pci/ixgbe_x550.c

825

mac->ops.setup_eee = ixgbe_setup_eee_fw;

sys/dev/pci/ixgbe_x550.c

855

mac->ops.read_iosf_sb_reg = ixgbe_read_iosf_sb_reg_x550;

sys/dev/pci/ixgbe_x550.c

856

mac->ops.write_iosf_sb_reg = ixgbe_write_iosf_sb_reg_x550;

sys/dev/pci/ixgbe_x550.c

857

mac->ops.acquire_swfw_sync = ixgbe_acquire_swfw_sync_X550em;

sys/dev/pci/ixgbe_x550.c

858

mac->ops.release_swfw_sync = ixgbe_release_swfw_sync_X550em;

sys/dev/pci/ixgbe_x550.c

859

link->ops.read_link = ixgbe_read_i2c_combined_generic;

sys/dev/pci/ixgbe_x550.c

860

link->ops.read_link_unlocked = ixgbe_read_i2c_combined_generic_unlocked;

sys/dev/pci/ixgbe_x550.c

861

link->ops.write_link = ixgbe_write_i2c_combined_generic;

sys/dev/pci/ixgbe_x550.c

862

link->ops.write_link_unlocked =

sys/dev/pci/ixgbe_x550.c

867

mac->ops.setup_fc = NULL;

sys/dev/pci/ixgbe_x550.c

868

mac->ops.setup_eee = NULL;

sys/dev/pv/virtio.c

215

vq_sync_descs(struct virtio_softc *sc, struct virtqueue *vq, int ops)

sys/dev/pv/virtio.c

219

ops);

sys/dev/pv/virtio.c

223

vq_sync_aring(struct virtio_softc *sc, struct virtqueue *vq, int ops)

sys/dev/pv/virtio.c

227

ops);

sys/dev/pv/virtio.c

231

vq_sync_aring_used_event(struct virtio_softc *sc, struct virtqueue *vq, int ops)

sys/dev/pv/virtio.c

235

sizeof(uint16_t), ops);

sys/dev/pv/virtio.c

240

vq_sync_uring(struct virtio_softc *sc, struct virtqueue *vq, int ops)

sys/dev/pv/virtio.c

244

sizeof(struct vring_used_elem), ops);

sys/dev/pv/virtio.c

248

vq_sync_uring_avail_event(struct virtio_softc *sc, struct virtqueue *vq, int ops)

sys/dev/pv/virtio.c

253

ops);

sys/dev/pv/virtio.c

259

int ops)

sys/dev/pv/virtio.c

265

sizeof(struct vring_desc) * vq->vq_maxnsegs, ops);

sys/dev/usb/if_athn_usb.c

1573

sc->ops.set_txpower(sc, c, extc);

sys/dev/usb/if_athn_usb.c

2545

struct athn_ops *ops = &sc->ops;

sys/dev/usb/if_athn_usb.c

2587

ops->set_txpower(sc, c, extc);

sys/dev/usb/if_athn_usb.c

262

sc->ops.read = athn_usb_read;

sys/dev/usb/if_athn_usb.c

263

sc->ops.write = athn_usb_write;

sys/dev/usb/if_athn_usb.c

264

sc->ops.write_barrier = athn_usb_write_barrier;

sys/dev/usb/if_athn_usb.c

308

struct athn_ops *ops = &sc->ops;

sys/dev/usb/if_athn_usb.c

356

ops->rx_enable = athn_usb_rx_enable;

sys/dev/usb/if_athn_usb.c

363

ops->enable_antenna_diversity(sc);

sys/dev/usb/usb_mem.c

264

usb_syncmem(struct usb_dma *p, bus_addr_t offset, bus_size_t len, int ops)

sys/dev/usb/usb_mem.c

267

len, ops);

sys/dev/wscons/wsdisplay.c

1940

wsscreen_attach_sync(struct wsscreen *scr, const struct wscons_syncops *ops,

sys/dev/wscons/wsdisplay.c

1951

scr->scr_syncops = ops;

sys/dev/wscons/wsdisplay.c

1967

const struct wscons_syncops *ops, /* used as ID */

sys/dev/wscons/wsdisplay.c

1970

if (!scr->scr_syncops || ops != scr->scr_syncops)

sys/dev/wscons/wsemulconf.c

60

const struct wsemul_ops **ops;

sys/dev/wscons/wsemulconf.c

71

for (ops = &wsemul_conf[0]; *ops != NULL; ops++)

sys/dev/wscons/wsemulconf.c

72

if (strncmp(name, (*ops)->name, WSEMUL_NAME_SIZE) == 0)

sys/dev/wscons/wsemulconf.c

75

return (*ops);

sys/kern/kern_event.c

2371

klist_init(struct klist *klist, const struct klistops *ops, void *arg)

sys/kern/kern_event.c

2374

klist->kl_ops = ops;

sys/kern/kern_ktrace.c

434

doktrace(struct vnode *vp, int ops, int facs, pid_t pid, struct proc *p)

sys/kern/kern_ktrace.c

439

int descend = ops & KTRFLAG_DESCEND;

sys/kern/kern_ktrace.c

444

ops = KTROP(ops);

sys/kern/kern_ktrace.c

446

if (ops != KTROP_CLEAR) {

sys/kern/kern_ktrace.c

463

if (ops == KTROP_CLEARFILE) {

sys/kern/kern_ktrace.c

481

if (ops == KTROP_SET) {

sys/kern/kern_ktrace.c

502

ret |= ktrsetchildren(p, pr, ops, facs, vp,

sys/kern/kern_ktrace.c

505

ret |= ktrops(p, pr, ops, facs, vp, cred);

sys/kern/kern_ktrace.c

517

ret |= ktrsetchildren(p, pr, ops, facs, vp, cred);

sys/kern/kern_ktrace.c

519

ret |= ktrops(p, pr, ops, facs, vp, cred);

sys/kern/kern_ktrace.c

535

syscallarg(int) ops;

sys/kern/kern_ktrace.c

558

error = doktrace(vp, SCARG(uap, ops), SCARG(uap, facs),

sys/kern/kern_ktrace.c

567

ktrops(struct proc *curp, struct process *pr, int ops, int facs,

sys/kern/kern_ktrace.c

572

if (ops == KTROP_SET)

sys/kern/kern_ktrace.c

587

ktrsetchildren(struct proc *curp, struct process *top, int ops, int facs,

sys/kern/kern_ktrace.c

595

ret |= ktrops(curp, pr, ops, facs, vp, cred);

sys/net/bpf_filter.c

139

_bpf_filter(const struct bpf_insn *pc, const struct bpf_ops *ops,

sys/net/bpf_filter.c

174

A = ops->ldw(pkt, pc->k, &err);

sys/net/bpf_filter.c

180

A = ops->ldh(pkt, pc->k, &err);

sys/net/bpf_filter.c

186

A = ops->ldb(pkt, pc->k, &err);

sys/net/bpf_filter.c

205

A = ops->ldw(pkt, k, &err);

sys/net/bpf_filter.c

212

A = ops->ldh(pkt, k, &err);

sys/net/bpf_filter.c

219

A = ops->ldb(pkt, k, &err);

sys/net/bpf_filter.c

225

X = ops->ldb(pkt, pc->k, &err);

sys/net/if_etherbridge.c

80

const struct etherbridge_ops *ops, void *cookie)

sys/net/if_etherbridge.c

95

eb->eb_ops = ops;

sys/net/if_veb.c

1651

struct veb_port **nps, **ops;

sys/net/if_veb.c

1664

ops = veb_ports_array(om);

sys/net/if_veb.c

1666

struct veb_port *op = ops[i];

sys/net/if_veb.c

1683

struct veb_port **nps, **ops;

sys/net/if_veb.c

1699

ops = veb_ports_array(om);

sys/net/if_veb.c

1701

struct veb_port *op = ops[i];

sys/net/ifq.c

554

ifq_q_enter(struct ifqueue *ifq, const struct ifq_ops *ops)

sys/net/ifq.c

557

if (ifq->ifq_ops == ops)

sys/scsi/mpath.c

436

mpath_path_attach(struct mpath_path *p, u_int g_id, const struct mpath_ops *ops)

sys/scsi/mpath.c

456

if (DEVID_CMP(d->d_id, link->id) && d->d_ops == ops)

sys/scsi/mpath.c

478

d->d_ops = ops;

sys/scsi/mpath_sym.c

137

const struct mpath_ops *ops = &sym_mpath_sym_ops;

sys/scsi/mpath_sym.c

150

ops = &sym_mpath_asym_ops;

sys/scsi/mpath_sym.c

163

if (mpath_path_attach(&sc->sc_path, id, ops) != 0)

sys/sys/syscallargs.h

212

syscallarg(int) ops;

usr.bin/kdump/kdump.c

1790

ktraceopname(int ops)

usr.bin/kdump/kdump.c

1794

printf("%#x<", ops);

usr.bin/kdump/kdump.c

1795

switch (KTROP(ops)) {

usr.bin/kdump/kdump.c

1806

printf("KTROP(%d)", KTROP(ops));

usr.bin/kdump/kdump.c

1810

if (ops & KTRFLAG_DESCEND) printf("|KTRFLAG_DESCEND");

usr.bin/kdump/kdump.c

1812

if (invalid || (ops & ~(KTROP((unsigned)-1) | KTRFLAG_DESCEND)))

usr.bin/kdump/kdump.c

1813

(void)printf("<invalid>%d", ops);

usr.bin/ktrace/ktrace.c

121

ops |= KTRFLAG_DESCEND;

usr.bin/ktrace/ktrace.c

164

ops = KTROP_CLEAR | KTRFLAG_DESCEND;

usr.bin/ktrace/ktrace.c

168

ops |= pid ? KTROP_CLEAR : KTROP_CLEARFILE;

usr.bin/ktrace/ktrace.c

170

if (ktrace(tracefile, ops, trpoints, pid) == -1) {

usr.bin/ktrace/ktrace.c

203

if (ktrace(tracefile, ops, trpoints, getpid()) == -1)

usr.bin/ktrace/ktrace.c

208

else if (ktrace(tracefile, ops, trpoints, pid) == -1) {

usr.bin/ktrace/ktrace.c

64

int append, ch, fd, inherit, ops, pidset, trpoints;

usr.bin/ktrace/ktrace.c

73

append = ops = pidset = inherit = pid = 0;

usr.bin/less/cvt.c

105

if ((ops & CVT_CRLF) && edst > odst && edst[-1] == '\r')

usr.bin/less/cvt.c

57

cvt_text(char *odst, char *osrc, int *chpos, int *lenp, int ops)

usr.bin/less/cvt.c

76

if ((ops & CVT_BS) && ch == '\b' && dst > odst) {

usr.bin/less/cvt.c

82

} else if ((ops & CVT_ANSI) && ch == ESC) {

usr.bin/less/cvt.c

95

if ((ops & CVT_TO_LC) && iswupper(ch))

usr.bin/less/search.c

157

int ops = 0;

usr.bin/less/search.c

160

ops |= CVT_TO_LC;

usr.bin/less/search.c

162

ops |= CVT_BS;

usr.bin/less/search.c

164

ops |= CVT_CRLF;

usr.bin/less/search.c

166

ops |= CVT_CRLF;

usr.bin/less/search.c

169

ops |= CVT_ANSI;

usr.bin/less/search.c

170

return (ops);

usr.bin/make/cond.c

644

} ops[] = {

usr.bin/make/cond.c

701

for (op = ops; op != NULL; op++)

usr.bin/pkgconf/libpkgconf/fragment.c

635

pkgconf_fragment_render_len(const pkgconf_list_t *list, bool escape, const pkgconf_fragment_render_ops_t *ops)

usr.bin/pkgconf/libpkgconf/fragment.c

639

ops = ops != NULL ? ops : &default_render_ops;

usr.bin/pkgconf/libpkgconf/fragment.c

640

return ops->render_len(list, true);

usr.bin/pkgconf/libpkgconf/fragment.c

658

pkgconf_fragment_render_buf(const pkgconf_list_t *list, char *buf, size_t buflen, bool escape, const pkgconf_fragment_render_ops_t *ops)

usr.bin/pkgconf/libpkgconf/fragment.c

662

ops = ops != NULL ? ops : &default_render_ops;

usr.bin/pkgconf/libpkgconf/fragment.c

663

ops->render_buf(list, buf, buflen, true);

usr.bin/pkgconf/libpkgconf/fragment.c

680

pkgconf_fragment_render(const pkgconf_list_t *list, bool escape, const pkgconf_fragment_render_ops_t *ops)

usr.bin/pkgconf/libpkgconf/fragment.c

684

size_t buflen = pkgconf_fragment_render_len(list, true, ops);

usr.bin/pkgconf/libpkgconf/fragment.c

687

pkgconf_fragment_render_buf(list, buf, buflen, true, ops);

usr.bin/pkgconf/libpkgconf/libpkgconf.h

315

PKGCONF_API void pkgconf_parser_parse(FILE *f, void *data, const pkgconf_parser_operand_func_t *ops, const pkgconf_parser_warn_func_t warnfunc, const char *filename);

usr.bin/pkgconf/libpkgconf/libpkgconf.h

384

PKGCONF_API size_t pkgconf_fragment_render_len(const pkgconf_list_t *list, bool escape, const pkgconf_fragment_render_ops_t *ops);

usr.bin/pkgconf/libpkgconf/libpkgconf.h

385

PKGCONF_API void pkgconf_fragment_render_buf(const pkgconf_list_t *list, char *buf, size_t len, bool escape, const pkgconf_fragment_render_ops_t *ops);

usr.bin/pkgconf/libpkgconf/libpkgconf.h

386

PKGCONF_API char *pkgconf_fragment_render(const pkgconf_list_t *list, bool escape, const pkgconf_fragment_render_ops_t *ops);

usr.bin/pkgconf/libpkgconf/parser.c

108

if (ops[(unsigned char) op])

usr.bin/pkgconf/libpkgconf/parser.c

109

ops[(unsigned char) op](data, lineno, key, value);

usr.bin/pkgconf/libpkgconf/parser.c

34

pkgconf_parser_parse(FILE *f, void *data, const pkgconf_parser_operand_func_t *ops, const pkgconf_parser_warn_func_t warnfunc, const char *filename)

usr.bin/pr/pr.c

1084

if (otln(buf, lstdat-buf, &ips, &ops, 0))

usr.bin/pr/pr.c

1258

int ops; /* last col output */

usr.bin/pr/pr.c

1273

ops = *svops;

usr.bin/pr/pr.c

1297

while (ops < ips) {

usr.bin/pr/pr.c

1301

if (ips - ops == 1) {

usr.bin/pr/pr.c

1308

if ((tbps = ops + gap - (ops % gap)) > ips)

usr.bin/pr/pr.c

1314

ops = tbps;

usr.bin/pr/pr.c

1317

while (ops < ips) {

usr.bin/pr/pr.c

1325

++ops;

usr.bin/pr/pr.c

1336

++ops;

usr.bin/pr/pr.c

1343

*svops = ops;

usr.bin/pr/pr.c

1349

while (ops < ips) {

usr.bin/pr/pr.c

1353

if (ips - ops == 1) {

usr.bin/pr/pr.c

1360

if ((tbps = ops + gap - (ops % gap)) > ips)

usr.bin/pr/pr.c

1366

ops = tbps;

usr.bin/pr/pr.c

1369

while (ops < ips) {

usr.bin/pr/pr.c

1377

++ops;

usr.bin/pr/pr.c

1558

int ops = 0;

usr.bin/pr/pr.c

1584

if (offst && otln(buf, offst, &ips, &ops, -1))

usr.bin/pr/pr.c

186

int ops;

usr.bin/pr/pr.c

246

ops = 0;

usr.bin/pr/pr.c

270

if (otln(obuf,cnt+off, &ips, &ops, mor))

usr.bin/pr/pr.c

273

if (otln(lbuf, cnt, &ips, &ops, mor))

usr.bin/pr/pr.c

287

ops = 0;

usr.bin/pr/pr.c

374

int ops = 0;

usr.bin/pr/pr.c

558

ops = 0;

usr.bin/pr/pr.c

559

if (offst && otln(buf,offst,&ips,&ops,1))

usr.bin/pr/pr.c

584

if (otln(vc[tvc].pt, cnt, &ips, &ops, 1))

usr.bin/pr/pr.c

593

if (otln(buf, 0, &ips, &ops, 0))

usr.bin/pr/pr.c

617

ops = 0;

usr.bin/pr/pr.c

618

if (otln(ptbf, j, &ips, &ops, 0))

usr.bin/pr/pr.c

694

int ops = 0;

usr.bin/pr/pr.c

784

if (otln(buf, lstdat-buf, &ips, &ops, 0))

usr.bin/pr/pr.c

915

int ops = 0;

usr.bin/sndiod/dev.c

123

s->ops = NULL;

usr.bin/sndiod/dev.c

1380

struct slotops *ops, void *arg, int mode)

usr.bin/sndiod/dev.c

1394

if (s->ops == NULL)

usr.bin/sndiod/dev.c

1407

s->ops = ops;

usr.bin/sndiod/dev.c

1433

s->ops = &zomb_slotops;

usr.bin/sndiod/dev.c

1436

s->ops = NULL;

usr.bin/sndiod/dev.c

1697

s->ops->eof(s->arg);

usr.bin/sndiod/dev.c

1712

s->ops->flush(s->arg);

usr.bin/sndiod/dev.c

1714

s->ops->fill(s->arg);

usr.bin/sndiod/dev.c

1749

ctlslot_new(struct opt *o, struct ctlops *ops, void *arg)

usr.bin/sndiod/dev.c

1760

if (s->ops == NULL)

usr.bin/sndiod/dev.c

1768

s->ops = ops;

usr.bin/sndiod/dev.c

1795

s->ops = NULL;

usr.bin/sndiod/dev.c

1863

if (s->ops)

usr.bin/sndiod/dev.c

1864

s->ops->sync(s->arg);

usr.bin/sndiod/dev.c

2032

if (s->ops == NULL)

usr.bin/sndiod/dev.c

2055

if (s->ops == NULL)

usr.bin/sndiod/dev.c

2067

s->ops->sync(s->arg);

usr.bin/sndiod/dev.c

2216

if (s->ops == NULL)

usr.bin/sndiod/dev.c

2219

s->ops->sync(s->arg);

usr.bin/sndiod/dev.c

608

s->ops->eof(s->arg);

usr.bin/sndiod/dev.c

631

s->ops->onxrun(s->arg);

usr.bin/sndiod/dev.c

640

s->ops->exit(s->arg);

usr.bin/sndiod/dev.c

661

s->ops->flush(s->arg);

usr.bin/sndiod/dev.c

673

s->ops->fill(s->arg);

usr.bin/sndiod/dev.c

712

s->ops->onmove(s->arg);

usr.bin/sndiod/dev.c

906

if (s->ops) {

usr.bin/sndiod/dev.c

907

s->ops->exit(s->arg);

usr.bin/sndiod/dev.c

908

s->ops = NULL;

usr.bin/sndiod/dev.c

917

if (c->ops == NULL)

usr.bin/sndiod/dev.c

920

c->ops->exit(c->arg);

usr.bin/sndiod/dev.c

921

c->ops = NULL;

usr.bin/sndiod/dev.h

171

struct ctlops *ops;

usr.bin/sndiod/dev.h

58

struct slotops *ops; /* client callbacks */

usr.bin/sndiod/fdpass.c

323

fdpass_new(int sock, struct fileops *ops)

usr.bin/sndiod/fdpass.c

328

f->file = file_new(ops, f, ops->name, 1);

usr.bin/sndiod/fdpass.h

22

struct fdpass *fdpass_new(int sock, struct fileops *ops);

usr.bin/sndiod/file.c

204

file_new(struct fileops *ops, void *arg, char *name, unsigned int nfds)

usr.bin/sndiod/file.c

217

f->ops = ops;

usr.bin/sndiod/file.c

261

f->ops->revents(f->arg, pfd) : 0;

usr.bin/sndiod/file.c

263

f->ops->hup(f->arg);

usr.bin/sndiod/file.c

267

f->ops->in(f->arg);

usr.bin/sndiod/file.c

271

f->ops->out(f->arg);

usr.bin/sndiod/file.c

345

f->nfds = f->ops->pollfd(f->arg, pfds + nfds);

usr.bin/sndiod/file.h

50

struct fileops *ops; /* event handlers */

usr.bin/sndiod/midi.c

138

ep->ops = NULL;

usr.bin/sndiod/midi.c

264

oep->ops->omsg(oep->arg, msg, size);

usr.bin/sndiod/midi.c

305

iep->ops->fill(iep->arg, tickets);

usr.bin/sndiod/midi.c

338

iep->ops->imsg(iep->arg, &c, 1);

usr.bin/sndiod/midi.c

342

iep->ops->imsg(iep->arg, iep->msg, iep->idx);

usr.bin/sndiod/midi.c

372

iep->ops->imsg(iep->arg, iep->msg, iep->idx);

usr.bin/sndiod/midi.c

378

iep->ops->imsg(iep->arg, iep->msg, iep->idx);

usr.bin/sndiod/midi.c

437

ep->ops->exit(ep->arg);

usr.bin/sndiod/midi.c

87

midi_new(struct midiops *ops, void *arg, int mode)

usr.bin/sndiod/midi.c

95

if (ep->ops == NULL)

usr.bin/sndiod/midi.c

98

ep->ops = ops;

usr.bin/sndiod/midi.h

64

struct midiops *ops; /* port/sock/dev callbacks */

usr.bin/sndiod/opt.c

530

if (s->ops != NULL && !dev_iscompat(odev, ndev)) {

usr.bin/sndiod/opt.c

587

if (p->ops == NULL)

usr.bin/sndiod/opt.c

616

if (s->ops) {

usr.bin/sndiod/opt.c

617

s->ops->exit(s->arg);

usr.bin/sndiod/opt.c

618

s->ops = NULL;

usr.bin/sndiod/opt.c

77

if (s->app != NULL && s->ops != NULL)

usr.bin/sndiod/siofile.c

87

s->ops->onxrun(s->arg);

usr.bin/unifdef/unifdef.c

1011

debug("eval%d defined missing ')'", prec(ops));

usr.bin/unifdef/unifdef.c

1015

debug("eval%d defined unknown", prec(ops));

usr.bin/unifdef/unifdef.c

1018

debug("eval%d defined %s", prec(ops), symname[sym]);

usr.bin/unifdef/unifdef.c

1024

debug("eval%d symbol", prec(ops));

usr.bin/unifdef/unifdef.c

1041

debug("eval%d bad expr", prec(ops));

usr.bin/unifdef/unifdef.c

1046

debug("eval%d = %d", prec(ops), *valp);

usr.bin/unifdef/unifdef.c

1054

eval_table(const struct ops *ops, long *valp, const char **cpp)

usr.bin/unifdef/unifdef.c

1061

debug("eval%d", prec(ops));

usr.bin/unifdef/unifdef.c

1063

lt = ops->inner(ops+1, valp, &cp);

usr.bin/unifdef/unifdef.c

1068

for (op = ops->op; op->str != NULL; op++)

usr.bin/unifdef/unifdef.c

1074

debug("eval%d %s", prec(ops), op->str);

usr.bin/unifdef/unifdef.c

1075

rt = ops->inner(ops+1, &val, &cp);

usr.bin/unifdef/unifdef.c

1082

debug("eval%d = %d", prec(ops), *valp);

usr.bin/unifdef/unifdef.c

1083

debug("eval%d lt = %s", prec(ops), linetype_name[lt]);

usr.bin/unifdef/unifdef.c

921

struct ops;

usr.bin/unifdef/unifdef.c

923

typedef Linetype eval_fn(const struct ops *, long *, const char **);

usr.bin/unifdef/unifdef.c

942

static const struct ops eval_ops[] = {

usr.bin/unifdef/unifdef.c

954

static long prec(const struct ops *ops)

usr.bin/unifdef/unifdef.c

956

return (ops - eval_ops);

usr.bin/unifdef/unifdef.c

965

eval_unary(const struct ops *ops, long *valp, const char **cpp)

usr.bin/unifdef/unifdef.c

975

debug("eval%d !", prec(ops));

usr.bin/unifdef/unifdef.c

977

lt = eval_unary(ops, valp, &cp);

usr.bin/unifdef/unifdef.c

986

debug("eval%d (", prec(ops));

usr.bin/unifdef/unifdef.c

994

debug("eval%d number", prec(ops));

usr.sbin/amd/amd/mntfs.c

111

if (ops->ffserver)

usr.sbin/amd/amd/mntfs.c

112

mf->mf_server = (*ops->ffserver)(mf);

usr.sbin/amd/amd/mntfs.c

118

alloc_mntfs(am_ops *ops, am_opts *mo, char *mp, char *info,

usr.sbin/amd/amd/mntfs.c

122

init_mntfs(mf, ops, mo, mp, info, auto_opts, mopts, remopts);

usr.sbin/amd/amd/mntfs.c

130

find_mntfs(am_ops *ops, am_opts *mo, char *mp, char *info,

usr.sbin/amd/amd/mntfs.c

143

if (ops == &efs_ops) {

usr.sbin/amd/amd/mntfs.c

187

fs = ops->ffserver ? (*ops->ffserver)(mf) : (fserver *) 0;

usr.sbin/amd/amd/mntfs.c

196

return alloc_mntfs(ops, mo, mp, info, auto_opts, mopts, remopts);

usr.sbin/amd/amd/mntfs.c

310

realloc_mntfs(mntfs *mf, am_ops *ops, am_opts *mo, char *mp,

usr.sbin/amd/amd/mntfs.c

334

mf2 = find_mntfs(ops, mo, mp, info, auto_opts, mopts, remopts);

usr.sbin/amd/amd/mntfs.c

85

init_mntfs(mntfs *mf, am_ops *ops, am_opts *mo, char *mp, char *info,

usr.sbin/amd/amd/mntfs.c

88

mf->mf_ops = ops;