sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

271

static const struct dce_opp_registers opp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

272

opp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

273

opp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

274

opp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

275

opp_regs(3),

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

276

opp_regs(4),

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

277

opp_regs(5)

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

670

ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

302

static const struct dce_opp_registers opp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

303

opp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

304

opp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

305

opp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

306

opp_regs(3),

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

307

opp_regs(4),

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

308

opp_regs(5)

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

714

ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

311

static const struct dce_opp_registers opp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

312

opp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

313

opp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

314

opp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

315

opp_regs(3),

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

316

opp_regs(4),

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

317

opp_regs(5)

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

690

ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c

321

static const struct dce_opp_registers opp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c

322

opp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c

323

opp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c

324

opp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c

325

opp_regs(3),

sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c

326

opp_regs(4),

sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c

327

opp_regs(5)

sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c

437

ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dce60/dce60_resource.c

286

static const struct dce_opp_registers opp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dce60/dce60_resource.c

287

opp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dce60/dce60_resource.c

288

opp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dce60/dce60_resource.c

289

opp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dce60/dce60_resource.c

290

opp_regs(3),

sys/dev/pci/drm/amd/display/dc/resource/dce60/dce60_resource.c

291

opp_regs(4),

sys/dev/pci/drm/amd/display/dc/resource/dce60/dce60_resource.c

292

opp_regs(5)

sys/dev/pci/drm/amd/display/dc/resource/dce60/dce60_resource.c

521

ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dce80/dce80_resource.c

287

static const struct dce_opp_registers opp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dce80/dce80_resource.c

288

opp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dce80/dce80_resource.c

289

opp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dce80/dce80_resource.c

290

opp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dce80/dce80_resource.c

291

opp_regs(3),

sys/dev/pci/drm/amd/display/dc/resource/dce80/dce80_resource.c

292

opp_regs(4),

sys/dev/pci/drm/amd/display/dc/resource/dce80/dce80_resource.c

293

opp_regs(5)

sys/dev/pci/drm/amd/display/dc/resource/dce80/dce80_resource.c

527

ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

318

static const struct dcn10_opp_registers opp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

319

opp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

320

opp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

321

opp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

322

opp_regs(3),

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

613

&opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

379

static const struct dcn20_opp_registers opp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

380

opp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

381

opp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

382

opp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

383

opp_regs(3),

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

384

opp_regs(4),

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

385

opp_regs(5),

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

779

&opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

439

static const struct dcn201_opp_registers opp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

440

opp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

441

opp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

672

&opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

1037

&opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

241

static const struct dcn20_opp_registers opp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

242

opp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

243

opp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

244

opp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

245

opp_regs(3),

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

246

opp_regs(4),

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

247

opp_regs(5),

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

441

static const struct dcn20_opp_registers opp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

442

opp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

443

opp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

444

opp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

445

opp_regs(3),

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

446

opp_regs(4),

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

447

opp_regs(5)

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

779

&opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

428

static const struct dcn20_opp_registers opp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

429

opp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

430

opp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

431

opp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

432

opp_regs(3),

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

742

&opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

556

static const struct dcn20_opp_registers opp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

557

opp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

558

opp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

559

opp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

560

opp_regs(3),

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

561

opp_regs(4)

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

581

dcn20_opp_construct(opp, ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

534

static const struct dcn20_opp_registers opp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

535

opp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

536

opp_regs(1)

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

556

dcn20_opp_construct(opp, ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

501

static const struct dcn20_opp_registers opp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

502

opp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

503

opp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

504

opp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

505

opp_regs(3)

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

945

&opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

507

static const struct dcn20_opp_registers opp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

508

opp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

509

opp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

510

opp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

511

opp_regs(3)

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

981

&opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

504

static const struct dcn20_opp_registers opp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

505

opp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

506

opp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

507

opp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

508

opp_regs(3)

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

943

&opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

495

static const struct dcn20_opp_registers opp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

496

opp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

497

opp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

498

opp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

499

opp_regs(3)

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

937

&opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

383

static struct dcn20_opp_registers opp_regs[4];

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

983

#define REG_STRUCT opp_regs

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

990

&opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

382

static struct dcn20_opp_registers opp_regs[4];

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

977

#define REG_STRUCT opp_regs

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

984

&opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

401

static struct dcn35_opp_registers opp_regs[4];

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

849

#define REG_STRUCT opp_regs

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

856

&opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

381

static struct dcn35_opp_registers opp_regs[4];

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

829

#define REG_STRUCT opp_regs

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

836

&opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

382

static struct dcn35_opp_registers opp_regs[4];

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

830

#define REG_STRUCT opp_regs

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

837

&opp_regs[inst], &opp_shift, &opp_mask);

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

362

static struct dcn20_opp_registers opp_regs[4];

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

976

#define REG_STRUCT opp_regs

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

983

&opp_regs[inst], &opp_shift, &opp_mask);