Symbol: new_state
lib/libc/stdlib/random.c
332
int32_t *new_state = (int32_t *)arg_state;
lib/libc/stdlib/random.c
333
int32_t type = new_state[0] % MAX_TYPES;
lib/libc/stdlib/random.c
334
int32_t rear = new_state[0] / MAX_TYPES;
lib/libc/stdlib/random.c
357
state = &new_state[1];
lib/libssl/ssl_clnt.c
194
int new_state, state, skip = 0;
lib/libssl/ssl_clnt.c
632
new_state = s->s3->hs.state;
lib/libssl/ssl_clnt.c
635
s->s3->hs.state = new_state;
lib/libssl/ssl_srvr.c
193
int new_state, state, skip = 0;
lib/libssl/ssl_srvr.c
721
new_state = s->s3->hs.state;
lib/libssl/ssl_srvr.c
724
s->s3->hs.state = new_state;
regress/lib/libpthread/errno/errno.c
34
set_state(enum state new_state)
regress/lib/libpthread/errno/errno.c
37
ASSERT(state == new_state - 1);
regress/lib/libpthread/errno/errno.c
38
state = new_state;
regress/lib/libpthread/errno/errno.c
44
wait_for_state(enum state new_state)
regress/lib/libpthread/errno/errno.c
47
while(state != new_state)
sbin/dhcp6leased/engine.c
1103
state_transition(struct dhcp6leased_iface *iface, enum if_state new_state)
sbin/dhcp6leased/engine.c
1108
iface->state = new_state;
sbin/dhcp6leased/engine.c
1110
switch (new_state) {
sbin/dhcp6leased/engine.c
1214
"?" : if_name, if_state_name[old_state], if_state_name[new_state],
sbin/dhcpleased/engine.c
1416
state_transition(struct dhcpleased_iface *iface, enum if_state new_state)
sbin/dhcpleased/engine.c
1421
iface->state = new_state;
sbin/dhcpleased/engine.c
1423
switch (new_state) {
sbin/dhcpleased/engine.c
1534
if_state_name[old_state], if_state_name[new_state],
sbin/slaacd/engine.c
1031
if_state_name(new_state), iface->timo.tv_sec);
sbin/slaacd/engine.c
1042
enum proposal_state new_state)
sbin/slaacd/engine.c
1048
addr_proposal->state = new_state;
sbin/slaacd/engine.c
1112
proposal_state_name(new_state), addr_proposal->timo.tv_sec);
sbin/slaacd/engine.c
1123
enum proposal_state new_state)
sbin/slaacd/engine.c
1129
dfr_proposal->state = new_state;
sbin/slaacd/engine.c
1188
proposal_state_name(new_state), dfr_proposal->timo.tv_sec);
sbin/slaacd/engine.c
1200
enum proposal_state new_state)
sbin/slaacd/engine.c
1206
rdns_proposal->state = new_state;
sbin/slaacd/engine.c
1265
proposal_state_name(new_state), rdns_proposal->timo.tv_sec);
sbin/slaacd/engine.c
964
iface_state_transition(struct slaacd_iface *iface, enum if_state new_state)
sbin/slaacd/engine.c
971
iface->state = new_state;
sbin/slaacd/engine.c
973
switch (new_state) {
sys/dev/ic/mfireg.h
499
uint32_t new_state;
sys/dev/ic/mfireg.h
578
uint32_t new_state;
sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c
474
struct dpg_pause_state new_state;
sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c
478
new_state.fw_based = VCN_DPG_STATE__PAUSE;
sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c
480
new_state.fw_based = VCN_DPG_STATE__UNPAUSE;
sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c
482
adev->vcn.inst[i].pause_dpg_mode(vcn_inst, &new_state);
sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c
514
struct dpg_pause_state new_state;
sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c
518
new_state.fw_based = VCN_DPG_STATE__PAUSE;
sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c
527
new_state.fw_based = VCN_DPG_STATE__PAUSE;
sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c
529
new_state.fw_based = VCN_DPG_STATE__UNPAUSE;
sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c
532
vcn_inst->pause_dpg_mode(vcn_inst, &new_state);
sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.h
334
struct dpg_pause_state *new_state);
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1297
struct dpg_pause_state *new_state)
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1307
if (adev->vcn.inst[inst_idx].pause_state.fw_based != new_state->fw_based) {
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1311
new_state->fw_based, new_state->jpeg);
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1316
if (new_state->fw_based == VCN_DPG_STATE__PAUSE) {
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1358
adev->vcn.inst[inst_idx].pause_state.fw_based = new_state->fw_based;
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1362
if (adev->vcn.inst[inst_idx].pause_state.jpeg != new_state->jpeg) {
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1366
new_state->fw_based, new_state->jpeg);
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1371
if (new_state->jpeg == VCN_DPG_STATE__PAUSE) {
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1418
adev->vcn.inst[inst_idx].pause_state.jpeg = new_state->jpeg;
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1885
struct dpg_pause_state new_state;
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1888
new_state.fw_based = VCN_DPG_STATE__PAUSE;
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1890
new_state.fw_based = VCN_DPG_STATE__UNPAUSE;
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1893
new_state.jpeg = VCN_DPG_STATE__PAUSE;
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1895
new_state.jpeg = VCN_DPG_STATE__UNPAUSE;
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1897
adev->vcn.inst->pause_dpg_mode(vcn_inst, &new_state);
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1943
struct dpg_pause_state new_state;
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1950
new_state.fw_based = VCN_DPG_STATE__PAUSE;
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1952
new_state.fw_based = VCN_DPG_STATE__UNPAUSE;
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1955
new_state.jpeg = VCN_DPG_STATE__PAUSE;
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1957
new_state.jpeg = VCN_DPG_STATE__UNPAUSE;
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1960
new_state.fw_based = VCN_DPG_STATE__PAUSE;
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1962
new_state.jpeg = VCN_DPG_STATE__PAUSE;
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
1964
adev->vcn.inst->pause_dpg_mode(adev->vcn.inst, &new_state);
sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c
91
struct dpg_pause_state *new_state);
sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c
1291
struct dpg_pause_state *new_state)
sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c
1300
if (adev->vcn.inst[inst_idx].pause_state.fw_based != new_state->fw_based) {
sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c
1302
adev->vcn.inst[inst_idx].pause_state.fw_based, new_state->fw_based);
sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c
1306
if (new_state->fw_based == VCN_DPG_STATE__PAUSE) {
sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c
1363
adev->vcn.inst[inst_idx].pause_state.fw_based = new_state->fw_based;
sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c
99
struct dpg_pause_state *new_state);
sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c
102
struct dpg_pause_state *new_state);
sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c
132
struct dpg_pause_state new_state;
sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c
136
new_state.fw_based = VCN_DPG_STATE__PAUSE;
sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c
138
new_state.fw_based = VCN_DPG_STATE__UNPAUSE;
sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c
140
v->pause_dpg_mode(v, &new_state);
sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c
1658
struct dpg_pause_state *new_state)
sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c
1667
if (adev->vcn.inst[inst_idx].pause_state.fw_based != new_state->fw_based) {
sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c
1669
adev->vcn.inst[inst_idx].pause_state.fw_based, new_state->fw_based);
sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c
1673
if (new_state->fw_based == VCN_DPG_STATE__PAUSE) {
sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c
1728
adev->vcn.inst[inst_idx].pause_state.fw_based = new_state->fw_based;
sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c
177
struct dpg_pause_state new_state;
sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c
181
new_state.fw_based = VCN_DPG_STATE__PAUSE;
sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c
190
new_state.fw_based = VCN_DPG_STATE__PAUSE;
sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c
192
new_state.fw_based = VCN_DPG_STATE__UNPAUSE;
sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c
194
v->pause_dpg_mode(v, &new_state);
sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c
112
struct dpg_pause_state *new_state);
sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c
1714
struct dpg_pause_state *new_state)
sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c
1724
if (adev->vcn.inst[inst_idx].pause_state.fw_based != new_state->fw_based) {
sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c
1726
adev->vcn.inst[inst_idx].pause_state.fw_based, new_state->fw_based);
sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c
1730
if (new_state->fw_based == VCN_DPG_STATE__PAUSE) {
sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c
1790
adev->vcn.inst[inst_idx].pause_state.fw_based = new_state->fw_based;
sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c
103
struct dpg_pause_state *new_state);
sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c
1699
struct dpg_pause_state *new_state)
sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c
1707
if (adev->vcn.inst[inst_idx].pause_state.fw_based != new_state->fw_based) {
sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c
1709
adev->vcn.inst[inst_idx].pause_state.fw_based, new_state->fw_based);
sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c
1713
if (new_state->fw_based == VCN_DPG_STATE__PAUSE) {
sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c
1735
adev->vcn.inst[inst_idx].pause_state.fw_based = new_state->fw_based;
sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c
1487
struct dpg_pause_state *new_state)
sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c
95
struct dpg_pause_state *new_state);
sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c
102
struct dpg_pause_state *new_state);
sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c
1362
struct dpg_pause_state *new_state)
sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c
1370
if (adev->vcn.inst[inst_idx].pause_state.fw_based != new_state->fw_based) {
sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c
1372
adev->vcn.inst[inst_idx].pause_state.fw_based, new_state->fw_based);
sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c
1376
if (new_state->fw_based == VCN_DPG_STATE__PAUSE) {
sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c
1399
adev->vcn.inst[inst_idx].pause_state.fw_based = new_state->fw_based;
sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c
1090
struct dpg_pause_state *new_state)
sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c
1098
if (adev->vcn.inst[inst_idx].pause_state.fw_based != new_state->fw_based) {
sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c
1100
adev->vcn.inst[inst_idx].pause_state.fw_based, new_state->fw_based);
sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c
1104
if (new_state->fw_based == VCN_DPG_STATE__PAUSE) {
sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c
1123
adev->vcn.inst[inst_idx].pause_state.fw_based = new_state->fw_based;
sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c
84
struct dpg_pause_state *new_state);
sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c
621
struct dpg_pause_state *new_state)
sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c
630
if (vinst->pause_state.fw_based != new_state->fw_based) {
sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c
632
vinst->pause_state.fw_based, new_state->fw_based,
sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c
633
new_state->fw_based ? "VCN_DPG_STATE__PAUSE" : "VCN_DPG_STATE__UNPAUSE");
sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c
637
if (new_state->fw_based == VCN_DPG_STATE__PAUSE) {
sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c
651
vinst->pause_state.fw_based = new_state->fw_based;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
11976
prev_zpos = prev->new_state->zpos;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
12014
(new_plane_state) = __i->new_state, 1))
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
12717
state->private_objs[j].new_state = NULL;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
365
struct dm_crtc_state *new_state)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
367
if (new_state->stream->adjust.timing_adjust_pending)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
369
if (new_state->freesync_config.state == VRR_STATE_ACTIVE_FIXED)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
371
else if (amdgpu_dm_crtc_vrr_active(old_state) != amdgpu_dm_crtc_vrr_active(new_state))
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4799
struct dm_atomic_state *old_state, *new_state;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4801
new_state = kzalloc(sizeof(*new_state), GFP_KERNEL);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4802
if (!new_state)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4805
__drm_atomic_helper_private_obj_duplicate_state(obj, &new_state->base);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4810
new_state->context = dc_state_create_copy(old_state->context);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4812
if (!new_state->context) {
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4813
kfree(new_state);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4817
return &new_state->base;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7659
struct dm_connector_state *new_state =
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7662
if (!new_state)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7665
__drm_atomic_helper_connector_duplicate_state(connector, &new_state->base);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7667
new_state->freesync_capable = state->freesync_capable;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7668
new_state->abm_level = state->abm_level;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7669
new_state->scaling = state->scaling;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7670
new_state->underscan_enable = state->underscan_enable;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7671
new_state->underscan_hborder = state->underscan_hborder;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7672
new_state->underscan_vborder = state->underscan_vborder;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7673
new_state->vcpi_slots = state->vcpi_slots;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7674
new_state->pbn = state->pbn;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7675
return &new_state->base;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
9520
struct dm_crtc_state *new_state)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
9523
bool new_vrr_active = amdgpu_dm_crtc_vrr_active(new_state);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
9534
WARN_ON(amdgpu_dm_crtc_set_vupdate_irq(new_state->base.crtc, true) != 0);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
9535
WARN_ON(drm_crtc_vblank_get(new_state->base.crtc) != 0);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
9536
drm_dbg_driver(new_state->base.crtc->dev, "%s: crtc=%u VRR off->on: Get vblank ref\n",
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
9537
__func__, new_state->base.crtc->base.id);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
9542
WARN_ON(amdgpu_dm_crtc_set_vupdate_irq(new_state->base.crtc, false) != 0);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
9543
drm_crtc_vblank_put(new_state->base.crtc);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
9544
drm_dbg_driver(new_state->base.crtc->dev, "%s: crtc=%u VRR on->off: Drop vblank ref\n",
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
9545
__func__, new_state->base.crtc->base.id);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
1610
struct drm_crtc_state *new_state, *old_state;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
1612
for_each_oldnew_crtc_in_state(state, crtc, old_state, new_state, i) {
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
1613
struct dm_crtc_state *dm_state = to_dm_crtc_state(new_state);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
1712
&state->crtcs[ind].new_state->mode,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
1747
struct dm_crtc_state *dm_new_crtc_state = to_dm_crtc_state(state->crtcs[ind].new_state);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
1412
struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
1417
trace_amdgpu_dm_atomic_update_cursor(new_state);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
1419
swap(plane->state->fb, new_state->fb);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
1421
plane->state->src_x = new_state->src_x;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
1422
plane->state->src_y = new_state->src_y;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
1423
plane->state->src_w = new_state->src_w;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
1424
plane->state->src_h = new_state->src_h;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
1425
plane->state->crtc_x = new_state->crtc_x;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
1426
plane->state->crtc_y = new_state->crtc_y;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
1427
plane->state->crtc_w = new_state->crtc_w;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
1428
plane->state->crtc_h = new_state->crtc_h;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
925
struct drm_plane_state *new_state)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
935
if (!new_state->fb) {
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
940
afb = to_amdgpu_framebuffer(new_state->fb);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
941
obj = drm_gem_fb_get_obj(new_state->fb, 0);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
980
r = drm_gem_plane_helper_prepare_fb(plane, new_state);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
999
dm_plane_state_new = to_dm_plane_state(new_state);
sys/dev/pci/drm/amd/display/dc/core/dc.c
3576
backup_planes_and_stream_state(&dc->scratch.new_state, stream);
sys/dev/pci/drm/amd/display/dc/core/dc.c
4828
restore_planes_and_stream_state(&dc->scratch.new_state, stream);
sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c
730
void link_enc_cfg_set_transient_mode(struct dc *dc, struct dc_state *current_state, struct dc_state *new_state)
sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c
741
if (new_state->stream_count == num_transient_assignments) {
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
252
struct dc_state *new_state;
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
254
new_state = kvmalloc(sizeof(struct dc_state),
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
256
if (!new_state)
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
259
dc_state_copy_internal(new_state, src_state);
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
262
new_state->bw_ctx.dml2 = NULL;
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
263
new_state->bw_ctx.dml2_dc_power_source = NULL;
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
266
!dml2_create_copy(&new_state->bw_ctx.dml2, src_state->bw_ctx.dml2)) {
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
267
dc_state_release(new_state);
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
272
!dml2_create_copy(&new_state->bw_ctx.dml2_dc_power_source, src_state->bw_ctx.dml2_dc_power_source)) {
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
273
dc_state_release(new_state);
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
278
kref_init(&new_state->refcount);
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
280
return new_state;
sys/dev/pci/drm/amd/display/dc/dc.h
1770
struct dc_scratch_space new_state;
sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1492
struct dc_state *new_state,
sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1497
bool new_is_phantom = dc_state_get_pipe_subvp_type(new_state, new_pipe) == SUBVP_PHANTOM;
sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1550
if (new_pipe->stream && dc_state_get_pipe_subvp_type(new_state, new_pipe) == SUBVP_PHANTOM)
sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h
159
struct dc_state *new_state,
sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2458
struct dc_state *new_state,
sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2463
bool new_is_phantom = dc_state_get_pipe_subvp_type(new_state, new_pipe) == SUBVP_PHANTOM;
sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2525
if (new_pipe->stream && dc_state_get_pipe_subvp_type(new_state, new_pipe) == SUBVP_PHANTOM)
sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h
106
struct dc_state *new_state,
sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h
468
struct dc_state *new_state,
sys/dev/pci/drm/amd/display/dc/inc/link_enc_cfg.h
118
void link_enc_cfg_set_transient_mode(struct dc *dc, struct dc_state *current_state, struct dc_state *new_state);
sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c
3196
struct si_ps *new_state = si_get_ps(new_ps);
sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c
3203
if (new_state->performance_levels[new_state->performance_level_count - 1].sclk >=
sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c
3214
struct si_ps *new_state = si_get_ps(new_ps);
sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c
3221
if (new_state->performance_levels[new_state->performance_level_count - 1].sclk <
sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c
5813
struct si_ps *new_state = si_get_ps(amdgpu_new_state);
sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c
5819
new_state->performance_level_count);
sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c
6219
struct si_ps *new_state = si_get_ps(amdgpu_new_state);
sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c
6232
sizeof(SMC_SIslands_MCRegisterSet) * new_state->performance_level_count,
sys/dev/pci/drm/apple/dcp.c
217
struct drm_plane_state *new_state;
sys/dev/pci/drm/apple/dcp.c
234
for_each_new_plane_in_state(state, plane, new_state, plane_idx) {
sys/dev/pci/drm/apple/dcp.c
236
if (new_state->crtc != crtc)
sys/dev/pci/drm/apple/iomfb_template.c
1259
struct drm_plane_state *new_state, *old_state;
sys/dev/pci/drm/apple/iomfb_template.c
1290
for_each_oldnew_plane_in_state(state, plane, old_state, new_state, plane_idx) {
sys/dev/pci/drm/apple/iomfb_template.c
1291
struct drm_framebuffer *fb = new_state->fb;
sys/dev/pci/drm/apple/iomfb_template.c
1297
if (old_state->crtc != crtc && new_state->crtc != crtc)
sys/dev/pci/drm/apple/iomfb_template.c
1325
if (!new_state->fb) {
sys/dev/pci/drm/apple/iomfb_template.c
1341
drm_rect_fp_to_int(&src_rect, &new_state->src);
sys/dev/pci/drm/apple/iomfb_template.c
1344
req->swap.dst_rect[l] = drm_to_dcp_rect(&new_state->dst);
sys/dev/pci/drm/display/drm_dp_tunnel.c
34
to_group_state((__state)->private_objs[__i].new_state), 1))
sys/dev/pci/drm/drm_atomic.c
1184
state->connectors[index].new_state = connector_state;
sys/dev/pci/drm/drm_atomic.c
214
state->connectors[i].new_state = NULL;
sys/dev/pci/drm/drm_atomic.c
230
state->crtcs[i].new_state = NULL;
sys/dev/pci/drm/drm_atomic.c
249
state->planes[i].new_state = NULL;
sys/dev/pci/drm/drm_atomic.c
260
state->private_objs[i].new_state = NULL;
sys/dev/pci/drm/drm_atomic.c
366
state->crtcs[index].new_state = crtc_state;
sys/dev/pci/drm/drm_atomic.c
552
state->planes[index].new_state = plane_state;
sys/dev/pci/drm/drm_atomic.c
872
state->private_objs[index].new_state = obj_state;
sys/dev/pci/drm/drm_atomic.c
924
return state->private_objs[i].new_state;
sys/dev/pci/drm/drm_atomic_helper.c
1142
struct drm_crtc_state *new_state)
sys/dev/pci/drm/drm_atomic_helper.c
1148
if (!new_state)
sys/dev/pci/drm/drm_atomic_helper.c
1157
old_state->crtc != new_state->crtc)
sys/dev/pci/drm/drm_atomic_helper.c
1167
(old_state->self_refresh_active && !new_state->active) ||
sys/dev/pci/drm/drm_atomic_helper.c
1168
new_state->self_refresh_active;
sys/dev/pci/drm/drm_connector.c
2947
struct drm_connector_state *new_state)
sys/dev/pci/drm/drm_connector.c
2950
struct drm_property_blob *new_blob = new_state->hdr_output_metadata;
sys/dev/pci/drm/i915/display/intel_atomic.c
117
struct drm_connector_state *new_state =
sys/dev/pci/drm/i915/display/intel_atomic.c
120
to_intel_digital_connector_state(new_state);
sys/dev/pci/drm/i915/display/intel_atomic.c
127
intel_hdcp_atomic_check(conn, old_state, new_state);
sys/dev/pci/drm/i915/display/intel_atomic.c
129
if (!new_state->crtc)
sys/dev/pci/drm/i915/display/intel_atomic.c
132
crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc);
sys/dev/pci/drm/i915/display/intel_atomic.c
145
!drm_connector_atomic_hdr_metadata_equal(old_state, new_state))
sys/dev/pci/drm/i915/display/intel_display.h
309
(new_plane_state) = to_intel_plane_state((__state)->base.planes[__i].new_state), 1); \
sys/dev/pci/drm/i915/display/intel_display.h
317
(new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
sys/dev/pci/drm/i915/display/intel_display.h
325
(new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
sys/dev/pci/drm/i915/display/intel_display.h
334
(new_plane_state) = to_intel_plane_state((__state)->base.planes[__i].new_state), 1); \
sys/dev/pci/drm/i915/display/intel_display.h
343
(new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
sys/dev/pci/drm/i915/display/intel_display.h
352
(new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
sys/dev/pci/drm/i915/display/intel_display.h
370
(new_connector_state) = to_intel_digital_connector_state((__state)->base.connectors[__i].new_state), 1))
sys/dev/pci/drm/i915/display/intel_global_state.c
20
(new_obj_state) = (__state)->global_objs[__i].new_state, 1); \
sys/dev/pci/drm/i915/display/intel_global_state.c
223
state->global_objs[index].new_state = obj_state;
sys/dev/pci/drm/i915/display/intel_global_state.c
256
return state->global_objs[i].new_state;
sys/dev/pci/drm/i915/display/intel_global_state.c
297
intel_atomic_global_state_put(state->global_objs[i].new_state);
sys/dev/pci/drm/i915/display/intel_global_state.c
302
state->global_objs[i].new_state = NULL;
sys/dev/pci/drm/i915/display/intel_global_state.c
37
(new_obj_state) = (__state)->global_objs[__i].new_state, 1); \
sys/dev/pci/drm/i915/display/intel_global_state.c
43
struct intel_global_state *state, *old_state, *new_state;
sys/dev/pci/drm/i915/display/intel_hdcp.c
2693
struct drm_connector_state *new_state)
sys/dev/pci/drm/i915/display/intel_hdcp.c
2696
u64 new_cp = new_state->content_protection;
sys/dev/pci/drm/i915/display/intel_hdcp.c
2699
if (!new_state->crtc) {
sys/dev/pci/drm/i915/display/intel_hdcp.c
2705
new_state->content_protection =
sys/dev/pci/drm/i915/display/intel_hdcp.c
2710
crtc_state = drm_atomic_get_new_crtc_state(new_state->state,
sys/dev/pci/drm/i915/display/intel_hdcp.c
2711
new_state->crtc);
sys/dev/pci/drm/i915/display/intel_hdcp.c
2720
new_state->content_protection =
sys/dev/pci/drm/i915/display/intel_hdcp.c
2731
new_state->hdcp_content_type)
sys/dev/pci/drm/i915/display/intel_hdcp.h
27
struct drm_connector_state *new_state);
sys/dev/pci/drm/i915/display/intel_hotplug.c
1289
bool new_state;
sys/dev/pci/drm/i915/display/intel_hotplug.c
1306
new_state = !HAS_DP_MST(display);
sys/dev/pci/drm/i915/display/intel_hotplug.c
1307
else if (kstrtobool(tmp, &new_state) != 0)
sys/dev/pci/drm/i915/display/intel_hotplug.c
1311
new_state ? "En" : "Dis");
sys/dev/pci/drm/i915/display/intel_hotplug.c
1314
hotplug->hpd_short_storm_enabled = new_state;
sys/dev/pci/drm/i915/display/intel_sdvo.c
2523
struct intel_sdvo_connector_state *new_state =
sys/dev/pci/drm/i915/display/intel_sdvo.c
2527
(memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) ||
sys/dev/pci/drm/i915/display/intel_tv.c
1852
struct drm_connector_state *new_state;
sys/dev/pci/drm/i915/display/intel_tv.c
1856
new_state = drm_atomic_get_new_connector_state(state, connector);
sys/dev/pci/drm/i915/display/intel_tv.c
1857
if (!new_state->crtc)
sys/dev/pci/drm/i915/display/intel_tv.c
1861
new_crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc);
sys/dev/pci/drm/i915/display/intel_tv.c
1863
if (old_state->tv.legacy_mode != new_state->tv.legacy_mode ||
sys/dev/pci/drm/i915/display/intel_tv.c
1864
old_state->tv.margins.left != new_state->tv.margins.left ||
sys/dev/pci/drm/i915/display/intel_tv.c
1865
old_state->tv.margins.right != new_state->tv.margins.right ||
sys/dev/pci/drm/i915/display/intel_tv.c
1866
old_state->tv.margins.top != new_state->tv.margins.top ||
sys/dev/pci/drm/i915/display/intel_tv.c
1867
old_state->tv.margins.bottom != new_state->tv.margins.bottom) {
sys/dev/pci/drm/include/drm/display/drm_dp_mst_helper.h
1005
struct drm_dp_mst_topology_state **new_state,
sys/dev/pci/drm/include/drm/display/drm_dp_mst_helper.h
1016
if (new_state)
sys/dev/pci/drm/include/drm/display/drm_dp_mst_helper.h
1017
*new_state = to_dp_mst_topology_state(objs_state->new_state);
sys/dev/pci/drm/include/drm/display/drm_dp_mst_helper.h
1037
#define for_each_oldnew_mst_mgr_in_state(__state, mgr, old_state, new_state, __i) \
sys/dev/pci/drm/include/drm/display/drm_dp_mst_helper.h
1039
for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr), &(old_state), &(new_state), (__i)))
sys/dev/pci/drm/include/drm/display/drm_dp_mst_helper.h
1072
#define for_each_new_mst_mgr_in_state(__state, mgr, new_state, __i) \
sys/dev/pci/drm/include/drm/display/drm_dp_mst_helper.h
1074
for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr), NULL, &(new_state), (__i)))
sys/dev/pci/drm/include/drm/drm_atomic.h
1001
(new_plane_state) = (__state)->planes[__i].new_state, 1))
sys/dev/pci/drm/include/drm/drm_atomic.h
1023
(new_plane_state) = (__state)->planes[__i].new_state, 1))
sys/dev/pci/drm/include/drm/drm_atomic.h
1039
(new_plane_state) = (__state)->planes[__i].new_state, 1))
sys/dev/pci/drm/include/drm/drm_atomic.h
1077
(new_plane_state) = (__state)->planes[__i].new_state, \
sys/dev/pci/drm/include/drm/drm_atomic.h
1097
(new_obj_state) = (__state)->private_objs[__i].new_state, 1); \
sys/dev/pci/drm/include/drm/drm_atomic.h
1134
(new_obj_state) = (__state)->private_objs[__i].new_state, 1); \
sys/dev/pci/drm/include/drm/drm_atomic.h
162
struct drm_plane_state *state, *old_state, *new_state;
sys/dev/pci/drm/include/drm/drm_atomic.h
167
struct drm_crtc_state *state, *old_state, *new_state;
sys/dev/pci/drm/include/drm/drm_atomic.h
185
struct drm_connector_state *state, *old_state, *new_state;
sys/dev/pci/drm/include/drm/drm_atomic.h
345
struct drm_private_state *state, *old_state, *new_state;
sys/dev/pci/drm/include/drm/drm_atomic.h
683
return state->crtcs[drm_crtc_index(crtc)].new_state;
sys/dev/pci/drm/include/drm/drm_atomic.h
731
return state->planes[drm_plane_index(plane)].new_state;
sys/dev/pci/drm/include/drm/drm_atomic.h
794
return state->connectors[index].new_state;
sys/dev/pci/drm/include/drm/drm_atomic.h
871
(new_connector_state) = (__state)->connectors[__i].new_state, 1))
sys/dev/pci/drm/include/drm/drm_atomic.h
913
(new_connector_state) = (__state)->connectors[__i].new_state, \
sys/dev/pci/drm/include/drm/drm_atomic.h
937
(new_crtc_state) = (__state)->crtcs[__i].new_state, \
sys/dev/pci/drm/include/drm/drm_atomic.h
978
(new_crtc_state) = (__state)->crtcs[__i].new_state, \
sys/dev/pci/drm/include/drm/drm_connector.h
2462
struct drm_connector_state *new_state);
sys/dev/pci/drm/include/drm/drm_damage_helper.h
76
const struct drm_plane_state *new_state);
sys/dev/pci/drm/include/drm/drm_modeset_helper_vtables.h
1256
struct drm_plane_state *new_state);
sys/dev/pci/drm/radeon/cypress_dpm.c
930
struct rv7xx_ps *new_state = rv770_get_ps(radeon_new_state);
sys/dev/pci/drm/radeon/cypress_dpm.c
936
new_state->low.sclk,
sys/dev/pci/drm/radeon/cypress_dpm.c
937
new_state->low.mclk));
sys/dev/pci/drm/radeon/cypress_dpm.c
939
new_state->medium.sclk,
sys/dev/pci/drm/radeon/cypress_dpm.c
940
new_state->medium.mclk));
sys/dev/pci/drm/radeon/cypress_dpm.c
942
new_state->high.sclk,
sys/dev/pci/drm/radeon/cypress_dpm.c
943
new_state->high.mclk));
sys/dev/pci/drm/radeon/ni_dpm.c
3512
struct ni_ps *new_state = ni_get_ps(new_ps);
sys/dev/pci/drm/radeon/ni_dpm.c
3519
if (new_state->performance_levels[new_state->performance_level_count - 1].sclk >=
sys/dev/pci/drm/radeon/ni_dpm.c
3530
struct ni_ps *new_state = ni_get_ps(new_ps);
sys/dev/pci/drm/radeon/ni_dpm.c
3537
if (new_state->performance_levels[new_state->performance_level_count - 1].sclk <
sys/dev/pci/drm/radeon/rs780_dpm.c
430
struct igp_ps *new_state = rs780_get_ps(new_ps);
sys/dev/pci/drm/radeon/rs780_dpm.c
434
if ((new_state->sclk_high == old_state->sclk_high) &&
sys/dev/pci/drm/radeon/rs780_dpm.c
435
(new_state->sclk_low == old_state->sclk_low))
sys/dev/pci/drm/radeon/rs780_dpm.c
439
new_state->sclk_low, false, &min_dividers);
sys/dev/pci/drm/radeon/rs780_dpm.c
444
new_state->sclk_high, false, &max_dividers);
sys/dev/pci/drm/radeon/rs780_dpm.c
477
struct igp_ps *new_state = rs780_get_ps(new_ps);
sys/dev/pci/drm/radeon/rs780_dpm.c
481
if ((new_state->sclk_high == old_state->sclk_high) &&
sys/dev/pci/drm/radeon/rs780_dpm.c
482
(new_state->sclk_low == old_state->sclk_low))
sys/dev/pci/drm/radeon/rs780_dpm.c
496
struct igp_ps *new_state = rs780_get_ps(new_ps);
sys/dev/pci/drm/radeon/rs780_dpm.c
499
if ((new_state->sclk_high == old_state->sclk_high) &&
sys/dev/pci/drm/radeon/rs780_dpm.c
500
(new_state->sclk_low == old_state->sclk_low))
sys/dev/pci/drm/radeon/rs780_dpm.c
503
if (new_state->sclk_high == new_state->sclk_low)
sys/dev/pci/drm/radeon/rs780_dpm.c
525
struct igp_ps *new_state = rs780_get_ps(new_ps);
sys/dev/pci/drm/radeon/rs780_dpm.c
531
if ((new_state->max_voltage == RS780_VDDC_LEVEL_HIGH) &&
sys/dev/pci/drm/radeon/rs780_dpm.c
532
(new_state->min_voltage == RS780_VDDC_LEVEL_HIGH))
sys/dev/pci/drm/radeon/rs780_dpm.c
536
new_state->max_voltage);
sys/dev/pci/drm/radeon/rs780_dpm.c
538
new_state->min_voltage);
sys/dev/pci/drm/radeon/rs780_dpm.c
567
struct igp_ps *new_state = rs780_get_ps(new_ps);
sys/dev/pci/drm/radeon/rs780_dpm.c
574
if (new_state->sclk_high >= current_state->sclk_high)
sys/dev/pci/drm/radeon/rs780_dpm.c
584
struct igp_ps *new_state = rs780_get_ps(new_ps);
sys/dev/pci/drm/radeon/rs780_dpm.c
591
if (new_state->sclk_high < current_state->sclk_high)
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1048
struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1050
rv6xx_calculate_engine_speed_stepping_parameters(rdev, new_state);
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1051
rv6xx_calculate_memory_clock_stepping_parameters(rdev, new_state);
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1052
rv6xx_calculate_voltage_stepping_parameters(rdev, new_state);
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1053
rv6xx_calculate_ap(rdev, new_state);
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1202
struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1206
safe_voltage = (new_state->low.vddc >= old_state->low.vddc) ?
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1207
new_state->low.vddc : old_state->low.vddc;
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1232
struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1235
if ((new_state->low.flags & ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE) &&
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1246
struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1249
if ((new_state->low.flags & ATOM_PPLIB_R600_FLAGS_PCIEGEN2) !=
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1308
struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1311
if (new_state->low.vddc > old_state->low.vddc)
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1314
new_state->low.vddc);
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1323
struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1326
if (new_state->low.vddc < old_state->low.vddc)
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1329
new_state->low.vddc);
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1421
struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1427
new_state->low.sclk,
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1434
struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1439
new_state->low.sclk,
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1454
struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1460
new_state->low.sclk,
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1461
new_state->medium.sclk,
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1465
new_state->medium.sclk,
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1466
new_state->high.sclk,
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1497
struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1504
if (!(new_state->low.flags & ATOM_PPLIB_R600_FLAGS_PCIEGEN2))
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1515
struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1522
if (new_state->high.sclk >= current_state->high.sclk)
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1532
struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
sys/dev/pci/drm/radeon/rv6xx_dpm.c
1539
if (new_state->high.sclk < current_state->high.sclk)
sys/dev/pci/drm/radeon/rv6xx_dpm.c
969
struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
sys/dev/pci/drm/radeon/rv6xx_dpm.c
973
new_state->low.vddc,
sys/dev/pci/drm/radeon/rv770_dpm.c
1437
struct rv7xx_ps *new_state = rv770_get_ps(new_ps);
sys/dev/pci/drm/radeon/rv770_dpm.c
1444
if (new_state->high.sclk >= current_state->high.sclk)
sys/dev/pci/drm/radeon/rv770_dpm.c
1454
struct rv7xx_ps *new_state = rv770_get_ps(new_ps);
sys/dev/pci/drm/radeon/rv770_dpm.c
1461
if (new_state->high.sclk < current_state->high.sclk)
sys/dev/pci/drm/radeon/rv770_dpm.c
1750
struct rv7xx_ps *new_state = rv770_get_ps(radeon_new_state);
sys/dev/pci/drm/radeon/rv770_dpm.c
1761
if (new_state->high.mclk <= pi->mclk_odt_threshold)
sys/dev/pci/drm/radeon/rv770_dpm.c
1779
struct rv7xx_ps *new_state = rv770_get_ps(radeon_new_state);
sys/dev/pci/drm/radeon/rv770_dpm.c
1790
if (new_state->high.mclk <= pi->mclk_odt_threshold)
sys/dev/pci/drm/radeon/si_dpm.c
5217
struct ni_ps *new_state = ni_get_ps(radeon_new_state);
sys/dev/pci/drm/radeon/si_dpm.c
5223
new_state->performance_level_count);
sys/dev/pci/drm/radeon/si_dpm.c
5635
struct ni_ps *new_state = ni_get_ps(radeon_new_state);
sys/dev/pci/drm/radeon/si_dpm.c
5649
sizeof(SMC_SIslands_MCRegisterSet) * new_state->performance_level_count,
sys/dev/pci/if_iwm.c
9746
iwm_sf_config(struct iwm_softc *sc, int new_state)
sys/dev/pci/if_iwm.c
9750
.state = htole32(new_state),
sys/dev/pci/if_iwm.c
9759
switch (new_state) {
sys/dev/pci/if_iwx.c
9873
iwx_sf_config(struct iwx_softc *sc, int new_state)
sys/dev/pci/if_iwx.c
9877
.state = htole32(new_state),
sys/dev/pci/if_iwx.c
9884
switch (new_state) {
sys/dev/pci/mfii.c
1330
state->new_state != htole32(MFI_PD_SYSTEM)) {
sys/dev/pci/mfii.c
1340
state->new_state == htole32(MFI_PD_SYSTEM)) {
sys/dev/softraid.c
4325
sr_set_chunk_state(struct sr_discipline *sd, int c, int new_state)
sys/dev/softraid.c
4331
sd->sd_vol.sv_chunks[c]->src_meta.scmi.scm_devname, c, new_state);
sys/dev/softraid.c
4338
if (old_state == new_state)
sys/dev/softraid.c
4343
if (new_state == BIOC_SDOFFLINE)
sys/dev/softraid.c
4359
old_state, new_state);
sys/dev/softraid.c
4363
sd->sd_vol.sv_chunks[c]->src_meta.scm_status = new_state;
sys/dev/softraid.c
4376
int new_state, i, nd;
sys/dev/softraid.c
4399
new_state = BIOC_SVONLINE;
sys/dev/softraid.c
4401
new_state = BIOC_SVOFFLINE;
sys/dev/softraid.c
4405
old_state, new_state);
sys/dev/softraid.c
4409
if (new_state == BIOC_SVOFFLINE || new_state == BIOC_SVONLINE)
sys/dev/softraid.c
4424
old_state, new_state);
sys/dev/softraid.c
4428
sd->sd_vol_status = new_state;
sys/dev/softraid_raid1.c
106
sr_raid1_set_chunk_state(struct sr_discipline *sd, int c, int new_state)
sys/dev/softraid_raid1.c
112
sd->sd_vol.sv_chunks[c]->src_meta.scmi.scm_devname, c, new_state);
sys/dev/softraid_raid1.c
119
if (old_state == new_state)
sys/dev/softraid_raid1.c
124
switch (new_state) {
sys/dev/softraid_raid1.c
134
switch (new_state) {
sys/dev/softraid_raid1.c
144
if (new_state == BIOC_SDONLINE) {
sys/dev/softraid_raid1.c
151
switch (new_state) {
sys/dev/softraid_raid1.c
164
switch (new_state) {
sys/dev/softraid_raid1.c
180
old_state, new_state);
sys/dev/softraid_raid1.c
184
sd->sd_vol.sv_chunks[c]->src_meta.scm_status = new_state;
sys/dev/softraid_raid1.c
197
int new_state, i, s, nd;
sys/dev/softraid_raid1.c
226
new_state = BIOC_SVONLINE;
sys/dev/softraid_raid1.c
228
new_state = BIOC_SVOFFLINE;
sys/dev/softraid_raid1.c
230
new_state = BIOC_SVSCRUB;
sys/dev/softraid_raid1.c
232
new_state = BIOC_SVREBUILD;
sys/dev/softraid_raid1.c
234
new_state = BIOC_SVDEGRADED;
sys/dev/softraid_raid1.c
243
old_state, new_state);
sys/dev/softraid_raid1.c
247
switch (new_state) {
sys/dev/softraid_raid1.c
263
switch (new_state) {
sys/dev/softraid_raid1.c
274
switch (new_state) {
sys/dev/softraid_raid1.c
285
switch (new_state) {
sys/dev/softraid_raid1.c
297
switch (new_state) {
sys/dev/softraid_raid1.c
313
old_state, new_state);
sys/dev/softraid_raid1.c
317
sd->sd_vol_status = new_state;
sys/dev/softraid_raid1.c
320
if (new_state == BIOC_SVDEGRADED)
sys/dev/softraid_raid5.c
147
sr_raid5_set_chunk_state(struct sr_discipline *sd, int c, int new_state)
sys/dev/softraid_raid5.c
153
sd->sd_vol.sv_chunks[c]->src_meta.scmi.scm_devname, c, new_state);
sys/dev/softraid_raid5.c
160
if (old_state == new_state)
sys/dev/softraid_raid5.c
165
switch (new_state) {
sys/dev/softraid_raid5.c
175
if (new_state == BIOC_SDREBUILD) {
sys/dev/softraid_raid5.c
182
switch (new_state) {
sys/dev/softraid_raid5.c
192
switch (new_state) {
sys/dev/softraid_raid5.c
208
old_state, new_state);
sys/dev/softraid_raid5.c
212
sd->sd_vol.sv_chunks[c]->src_meta.scm_status = new_state;
sys/dev/softraid_raid5.c
225
int new_state, i, s, nd;
sys/dev/softraid_raid5.c
247
new_state = BIOC_SVONLINE;
sys/dev/softraid_raid5.c
249
new_state = BIOC_SVOFFLINE;
sys/dev/softraid_raid5.c
251
new_state = BIOC_SVSCRUB;
sys/dev/softraid_raid5.c
253
new_state = BIOC_SVREBUILD;
sys/dev/softraid_raid5.c
255
new_state = BIOC_SVDEGRADED;
sys/dev/softraid_raid5.c
270
old_state, new_state);
sys/dev/softraid_raid5.c
274
switch (new_state) {
sys/dev/softraid_raid5.c
290
switch (new_state) {
sys/dev/softraid_raid5.c
301
switch (new_state) {
sys/dev/softraid_raid5.c
312
switch (new_state) {
sys/dev/softraid_raid5.c
324
switch (new_state) {
sys/dev/softraid_raid5.c
339
old_state, new_state);
sys/dev/softraid_raid5.c
343
sd->sd_vol_status = new_state;
sys/dev/softraid_raid6.c
162
sr_raid6_set_chunk_state(struct sr_discipline *sd, int c, int new_state)
sys/dev/softraid_raid6.c
169
sd->sd_vol.sv_chunks[c]->src_meta.scmi.scm_devname, c, new_state);
sys/dev/softraid_raid6.c
176
if (old_state == new_state)
sys/dev/softraid_raid6.c
181
switch (new_state) {
sys/dev/softraid_raid6.c
191
if (new_state == BIOC_SDREBUILD) {
sys/dev/softraid_raid6.c
198
switch (new_state) {
sys/dev/softraid_raid6.c
208
switch (new_state) {
sys/dev/softraid_raid6.c
224
old_state, new_state);
sys/dev/softraid_raid6.c
228
sd->sd_vol.sv_chunks[c]->src_meta.scm_status = new_state;
sys/dev/softraid_raid6.c
241
int new_state, i, s, nd;
sys/dev/softraid_raid6.c
265
new_state = BIOC_SVONLINE;
sys/dev/softraid_raid6.c
267
new_state = BIOC_SVOFFLINE;
sys/dev/softraid_raid6.c
269
new_state = BIOC_SVSCRUB;
sys/dev/softraid_raid6.c
271
new_state = BIOC_SVREBUILD;
sys/dev/softraid_raid6.c
273
new_state = BIOC_SVDEGRADED;
sys/dev/softraid_raid6.c
284
old_state, new_state);
sys/dev/softraid_raid6.c
288
switch (new_state) {
sys/dev/softraid_raid6.c
304
switch (new_state) {
sys/dev/softraid_raid6.c
315
switch (new_state) {
sys/dev/softraid_raid6.c
326
switch (new_state) {
sys/dev/softraid_raid6.c
338
switch (new_state) {
sys/dev/softraid_raid6.c
353
old_state, new_state);
sys/dev/softraid_raid6.c
357
sd->sd_vol_status = new_state;
sys/dev/wscons/wskbd.c
1453
int new_state;
sys/dev/wscons/wskbd.c
1455
new_state = 0;
sys/dev/wscons/wskbd.c
1457
new_state |= WSKBD_LED_CAPS;
sys/dev/wscons/wskbd.c
1459
new_state |= WSKBD_LED_NUM;
sys/dev/wscons/wskbd.c
1461
new_state |= WSKBD_LED_COMPOSE;
sys/dev/wscons/wskbd.c
1463
new_state |= WSKBD_LED_SCROLL;
sys/dev/wscons/wskbd.c
1465
if (id->t_sc && new_state != id->t_sc->sc_ledstate) {
sys/dev/wscons/wskbd.c
1467
(id->t_sc->sc_accesscookie, new_state);
sys/dev/wscons/wskbd.c
1468
id->t_sc->sc_ledstate = new_state;
sys/net/if_sppp.h
217
void (*pp_chg)(struct sppp *sp, int new_state);
usr.bin/lex/FlexLexer.h
152
void yy_push_state( int new_state );
usr.bin/ssh/krl.c
478
int new_state;
usr.bin/ssh/krl.c
524
new_state = KRL_SECTION_CERT_SERIAL_BITMAP;
usr.bin/ssh/krl.c
527
new_state = KRL_SECTION_CERT_SERIAL_RANGE;
usr.bin/ssh/krl.c
531
new_state = KRL_SECTION_CERT_SERIAL_LIST;
usr.bin/ssh/krl.c
535
new_state = KRL_SECTION_CERT_SERIAL_BITMAP;
usr.bin/ssh/krl.c
545
(long long unsigned)cost_bitmap_restart, new_state,
usr.bin/ssh/krl.c
547
return new_state;
usr.bin/tmux/key-bindings.c
762
struct cmdq_state *new_state;
usr.bin/tmux/key-bindings.c
775
new_state = cmdq_new_state(fs, event, flags);
usr.bin/tmux/key-bindings.c
776
new_item = cmdq_get_command(bd->cmdlist, new_state);
usr.bin/tmux/key-bindings.c
777
cmdq_free_state(new_state);
usr.bin/yacc/lr0.c
222
sp = sp->link = new_state(symbol);
usr.bin/yacc/lr0.c
228
state_set[key] = sp = new_state(symbol);
usr.bin/yacc/lr0.c
48
core *new_state(int);
usr.sbin/bgpctl/bgpctl.c
1407
statenames[ms->old_state], statenames[ms->new_state]);
usr.sbin/bgpctl/mrtparser.c
952
ibuf_get_n16(msg, &s->new_state) == -1)
usr.sbin/bgpctl/mrtparser.h
70
uint16_t new_state;
usr.sbin/dvmrpd/group.c
147
int new_state = 0;
usr.sbin/dvmrpd/group.c
155
new_state = grp_fsm[i].new_state;
usr.sbin/dvmrpd/group.c
216
if (new_state != 0)
usr.sbin/dvmrpd/group.c
217
group->state = new_state;
usr.sbin/dvmrpd/group.c
56
int new_state;
usr.sbin/dvmrpd/interface.c
103
new_state = iface_fsm[i].new_state;
usr.sbin/dvmrpd/interface.c
137
if (new_state != 0)
usr.sbin/dvmrpd/interface.c
138
iface->state = new_state;
usr.sbin/dvmrpd/interface.c
65
int new_state;
usr.sbin/dvmrpd/interface.c
95
int new_state = 0;
usr.sbin/dvmrpd/neighbor.c
101
new_state = nbr_fsm_tbl[i].new_state;
usr.sbin/dvmrpd/neighbor.c
142
if (new_state != 0)
usr.sbin/dvmrpd/neighbor.c
143
nbr->state = new_state;
usr.sbin/dvmrpd/neighbor.c
58
int new_state;
usr.sbin/dvmrpd/neighbor.c
94
int new_state = 0;
usr.sbin/eigrpd/rde_dual.c
136
int new_state = 0;
usr.sbin/eigrpd/rde_dual.c
143
new_state = dual_fsm_tbl[i].new_state;
usr.sbin/eigrpd/rde_dual.c
155
if (new_state != 0)
usr.sbin/eigrpd/rde_dual.c
156
rn->state = new_state;
usr.sbin/eigrpd/rde_dual.c
165
new_state == DUAL_STA_PASSIVE)
usr.sbin/eigrpd/rde_dual.c
83
int new_state;
usr.sbin/ldpd/neighbor.c
135
int new_state = 0;
usr.sbin/ldpd/neighbor.c
142
new_state = nbr_fsm_tbl[i].new_state;
usr.sbin/ldpd/neighbor.c
154
if (new_state != 0)
usr.sbin/ldpd/neighbor.c
155
nbr->state = new_state;
usr.sbin/ldpd/neighbor.c
58
int new_state;
usr.sbin/ospf6d/interface.c
107
new_state = iface_fsm[i].new_state;
usr.sbin/ospf6d/interface.c
141
if (new_state != 0)
usr.sbin/ospf6d/interface.c
142
iface->state = new_state;
usr.sbin/ospf6d/interface.c
54
int new_state;
usr.sbin/ospf6d/interface.c
99
int new_state = 0;
usr.sbin/ospf6d/neighbor.c
123
int new_state = 0;
usr.sbin/ospf6d/neighbor.c
133
new_state = nbr_fsm_tbl[i].new_state;
usr.sbin/ospf6d/neighbor.c
195
if (new_state != 0)
usr.sbin/ospf6d/neighbor.c
196
nbr->state = new_state;
usr.sbin/ospf6d/neighbor.c
59
int new_state; /* 0 means action decides or unchanged */
usr.sbin/ospfd/interface.c
102
new_state = iface_fsm[i].new_state;
usr.sbin/ospfd/interface.c
136
if (new_state != 0)
usr.sbin/ospfd/interface.c
137
iface->state = new_state;
usr.sbin/ospfd/interface.c
54
int new_state;
usr.sbin/ospfd/interface.c
94
int new_state = 0;
usr.sbin/ospfd/neighbor.c
123
int new_state = 0;
usr.sbin/ospfd/neighbor.c
133
new_state = nbr_fsm_tbl[i].new_state;
usr.sbin/ospfd/neighbor.c
195
if (new_state != 0)
usr.sbin/ospfd/neighbor.c
196
nbr->state = new_state;
usr.sbin/ospfd/neighbor.c
59
int new_state; /* 0 means action decides or unchanged */
usr.sbin/ripd/interface.c
100
int new_state = 0;
usr.sbin/ripd/interface.c
108
new_state = iface_fsm[i].new_state;
usr.sbin/ripd/interface.c
139
if (new_state != 0)
usr.sbin/ripd/interface.c
140
iface->state = new_state;
usr.sbin/ripd/interface.c
52
int new_state;
usr.sbin/ripd/neighbor.c
106
new_state = nbr_fsm_tbl[i].new_state;
usr.sbin/ripd/neighbor.c
134
if (new_state != 0)
usr.sbin/ripd/neighbor.c
135
nbr->state = new_state;
usr.sbin/ripd/neighbor.c
64
int new_state;
usr.sbin/ripd/neighbor.c
99
int new_state = 0;