number_of_states_plus_one
for (i = 0; i <= number_of_states_plus_one; i++) {
for (i = 0; i <= number_of_states_plus_one; i++) {
for (i = 0; i <= number_of_states_plus_one; i++) {
for (i = 0; i <= number_of_states_plus_one; i++) {
for (i = 0; i <= number_of_states_plus_one; i++) {
for (i = 0; i <= number_of_states_plus_one; i++) {
for (i = 0; i <= number_of_states_plus_one; i++) {
for (i = 0; i <= number_of_states_plus_one; i++) {
for (i = 0; i <= number_of_states_plus_one; i++) {
for (i = 0; i <= number_of_states_plus_one; i++) {
for (i = 0; i <= number_of_states_plus_one; i++) {
for (i = number_of_states_plus_one; i >= 0; i--) {
for (i = number_of_states_plus_one; i >= 0; i--) {
if ((i == number_of_states_plus_one || v->mode_support_with_immediate_flip[i][1] == dcn_bw_yes || v->mode_support_with_immediate_flip[i][0] == dcn_bw_yes) && i >= v->voltage_override_level) {
for (i = number_of_states_plus_one; i >= 0; i--) {
if ((i == number_of_states_plus_one || v->mode_support_without_immediate_flip[i][1] == dcn_bw_yes || v->mode_support_without_immediate_flip[i][0] == dcn_bw_yes) && i >= v->voltage_override_level) {
if (v->voltage_level_with_immediate_flip == number_of_states_plus_one) {
if (v->voltage_level != number_of_states_plus_one && validate_mode == DC_VALIDATE_MODE_AND_PROGRAMMING) {
} else if (v->voltage_level == number_of_states_plus_one) {
float voltage[number_of_states_plus_one + 1];
float max_dispclk[number_of_states_plus_one + 1];
float max_dppclk[number_of_states_plus_one + 1];
float dcfclk_per_state[number_of_states_plus_one + 1];
float phyclk_per_state[number_of_states_plus_one + 1];
float fabric_and_dram_bandwidth_per_state[number_of_states_plus_one + 1];
float no_of_dpp[number_of_states_plus_one + 1][1 + 1][number_of_planes_minus_one + 1];
float swath_width_yper_state[number_of_states_plus_one + 1][1 + 1][number_of_planes_minus_one + 1];
float swath_height_yper_state[number_of_states_plus_one + 1][1 + 1][number_of_planes_minus_one + 1];
float swath_height_cper_state[number_of_states_plus_one + 1][1 + 1][number_of_planes_minus_one + 1];
float urgent_latency_support_us_per_state[number_of_states_plus_one + 1][1 + 1][number_of_planes_minus_one + 1];
float v_ratio_pre_ywith_immediate_flip[number_of_states_plus_one + 1][1 + 1][number_of_planes_minus_one + 1];
float v_ratio_pre_cwith_immediate_flip[number_of_states_plus_one + 1][1 + 1][number_of_planes_minus_one + 1];
float required_prefetch_pixel_data_bw_with_immediate_flip[number_of_states_plus_one + 1][1 + 1][number_of_planes_minus_one + 1];
float v_ratio_pre_ywithout_immediate_flip[number_of_states_plus_one + 1][1 + 1][number_of_planes_minus_one + 1];
float v_ratio_pre_cwithout_immediate_flip[number_of_states_plus_one + 1][1 + 1][number_of_planes_minus_one + 1];
float required_prefetch_pixel_data_bw_without_immediate_flip[number_of_states_plus_one + 1][1 + 1][number_of_planes_minus_one + 1];
enum dcn_bw_defs prefetch_supported_with_immediate_flip[number_of_states_plus_one + 1][1 + 1];
enum dcn_bw_defs prefetch_supported_without_immediate_flip[number_of_states_plus_one + 1][1 + 1];
enum dcn_bw_defs v_ratio_in_prefetch_supported_with_immediate_flip[number_of_states_plus_one + 1][1 + 1];
enum dcn_bw_defs v_ratio_in_prefetch_supported_without_immediate_flip[number_of_states_plus_one + 1][1 + 1];
float required_dispclk[number_of_states_plus_one + 1][1 + 1];
enum dcn_bw_defs dispclk_dppclk_support[number_of_states_plus_one + 1][1 + 1];
enum dcn_bw_defs total_available_pipes_support[number_of_states_plus_one + 1][1 + 1];
float total_number_of_active_dpp[number_of_states_plus_one + 1][1 + 1];
float total_number_of_dcc_active_dpp[number_of_states_plus_one + 1][1 + 1];
enum dcn_bw_defs urgent_latency_support[number_of_states_plus_one + 1][1 + 1];
enum dcn_bw_defs mode_support_with_immediate_flip[number_of_states_plus_one + 1][1 + 1];
enum dcn_bw_defs mode_support_without_immediate_flip[number_of_states_plus_one + 1][1 + 1];
float return_bw_per_state[number_of_states_plus_one + 1];
enum dcn_bw_defs dio_support[number_of_states_plus_one + 1];
float urgent_round_trip_and_out_of_order_latency_per_state[number_of_states_plus_one + 1];
enum dcn_bw_defs rob_support[number_of_states_plus_one + 1];
enum dcn_bw_defs bandwidth_support[number_of_states_plus_one + 1];