sys/dev/pci/if_mwx.c

1668

mwx_set(sc, MT_HW_EMI_CTL, MT_HW_EMI_CTL_SLPPROT_EN);

sys/dev/pci/if_mwx.c

1669

mwx_set(sc, MT_MCU2HOST_SW_INT_ENA, MT_MCU_CMD_WAKE_RX_PCIE);

sys/dev/pci/if_mwx.c

3112

mwx_set(sc, MT_DMASHDL_SW_CONTROL, MT_DMASHDL_DMASHDL_BYPASS);

sys/dev/pci/if_mwx.c

3118

mwx_set(sc, MT_WFDMA0_RST, MT_WFDMA0_RST_DMASHDL_ALL_RST |

sys/dev/pci/if_mwx.c

3171

mwx_set(sc, MT_WFDMA0_GLO_CFG,

sys/dev/pci/if_mwx.c

3183

mwx_set(sc, MT_WFDMA0_GLO_CFG,

sys/dev/pci/if_mwx.c

3188

mwx_set(sc, MT_UWFDMA0_GLO_CFG_EXT1, (1U << 28));

sys/dev/pci/if_mwx.c

3189

mwx_set(sc, MT_WFDMA0_INT_RX_PRI, 0x0f00);

sys/dev/pci/if_mwx.c

3190

mwx_set(sc, MT_WFDMA0_INT_TX_PRI, 0x7f00);

sys/dev/pci/if_mwx.c

3193

mwx_set(sc, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT);

sys/dev/pci/if_mwx.c

3254

mwx_set(sc, reg, WFSYS_SW_RST_B);

sys/dev/pci/if_mwx.c

3435

mwx_set(sc, MT_PCIE_MAC_PM, MT_PCIE_MAC_PM_L0S_DIS);

sys/dev/pci/if_mwx.c

3672

mwx_set(sc, MT_TMAC_CTCR0(band),

sys/dev/pci/if_mwx.c

3677

mwx_set(sc, MT_WF_RMAC_MIB_TIME0(band), MT_WF_RMAC_MIB_RXTIME_EN);

sys/dev/pci/if_mwx.c

3678

mwx_set(sc, MT_WF_RMAC_MIB_AIRTIME0(band), MT_WF_RMAC_MIB_RXTIME_EN);

sys/dev/pci/if_mwx.c

3681

mwx_set(sc, MT_MIB_SCR1(band), MT_MIB_TXDUR_EN);

sys/dev/pci/if_mwx.c

3682

mwx_set(sc, MT_MIB_SCR1(band), MT_MIB_RXDUR_EN);

sys/dev/pci/if_mwx.c

3716

mwx_set(sc, dcr0, MT_MDP_DCR0_DAMSDU_EN);

sys/dev/pci/if_mwx.c

3720

mwx_set(sc, dcr0, MT_MDP_DCR0_RX_HDR_TRANS_EN);

sys/dev/pci/if_mwx.c

4695

mwx_set(sc, MT_WF_RMAC_MIB_TIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR);

sys/dev/pci/if_mwx.c

4696

mwx_set(sc, MT_WF_RMAC_MIB_AIRTIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR);

sys/dev/pci/if_mwx.c

4716

mwx_set(sc, MT_ARB_SCR(0),

sys/dev/pci/if_mwx.c

4880

mwx_set(sc, MT_WF_RFCR(0), MT_WF_RFCR_DROP_OTHER_BEACON);

sys/dev/pci/if_mwx.c

789

mwx_set(sc, MT_DMA_DCR0(0), MT_DMA_DCR0_RXD_G5_EN);