Symbol: mvpp2_write
sys/dev/fdt/if_mvpp.c
1429
mvpp2_write(sc->sc, MVPP2_ISR_RXQ_GROUP_INDEX_REG,
sys/dev/fdt/if_mvpp.c
1432
mvpp2_write(sc->sc, MVPP2_ISR_RXQ_SUB_GROUP_CONFIG_REG,
sys/dev/fdt/if_mvpp.c
1796
mvpp2_write(sc->sc, MVPP2_AGGR_TXQ_UPDATE_REG, used);
sys/dev/fdt/if_mvpp.c
2080
mvpp2_write(sc->sc, MVPP2_ISR_MISC_CAUSE_REG, 0);
sys/dev/fdt/if_mvpp.c
2081
mvpp2_write(sc->sc, MVPP2_ISR_RX_TX_CAUSE_REG(sc->sc_id),
sys/dev/fdt/if_mvpp.c
2251
mvpp2_write(sc->sc, MVPP22_BM_ADDR_HIGH_RLS_REG,
sys/dev/fdt/if_mvpp.c
2255
mvpp2_write(sc->sc, MVPP2_BM_VIRT_RLS_REG,
sys/dev/fdt/if_mvpp.c
2257
mvpp2_write(sc->sc, MVPP2_BM_PHY_RLS_REG(pool),
sys/dev/fdt/if_mvpp.c
2302
mvpp2_write(sc->sc, MVPP2_ISR_RX_TX_MASK_REG(sc->sc_id),
sys/dev/fdt/if_mvpp.c
2340
mvpp2_write(sc, MVPP2_AGGR_TXQ_DESC_ADDR_REG(txq->id),
sys/dev/fdt/if_mvpp.c
2342
mvpp2_write(sc, MVPP2_AGGR_TXQ_DESC_SIZE_REG(txq->id),
sys/dev/fdt/if_mvpp.c
2375
mvpp2_write(sc->sc, MVPP2_TXQ_NUM_REG, txq->id);
sys/dev/fdt/if_mvpp.c
2376
mvpp2_write(sc->sc, MVPP2_TXQ_DESC_ADDR_REG,
sys/dev/fdt/if_mvpp.c
2378
mvpp2_write(sc->sc, MVPP2_TXQ_DESC_SIZE_REG,
sys/dev/fdt/if_mvpp.c
2380
mvpp2_write(sc->sc, MVPP2_TXQ_INDEX_REG, 0);
sys/dev/fdt/if_mvpp.c
2381
mvpp2_write(sc->sc, MVPP2_TXQ_RSVD_CLR_REG,
sys/dev/fdt/if_mvpp.c
2385
mvpp2_write(sc->sc, MVPP2_TXQ_PENDING_REG, reg);
sys/dev/fdt/if_mvpp.c
2391
mvpp2_write(sc->sc, MVPP2_TXQ_PREF_BUF_REG,
sys/dev/fdt/if_mvpp.c
2396
mvpp2_write(sc->sc, MVPP2_TXP_SCHED_PORT_INDEX_REG,
sys/dev/fdt/if_mvpp.c
2403
mvpp2_write(sc->sc, MVPP2_TXQ_SCHED_REFILL_REG(txq->log_id), reg);
sys/dev/fdt/if_mvpp.c
2405
mvpp2_write(sc->sc, MVPP2_TXQ_SCHED_TOKEN_SIZE_REG(txq->log_id),
sys/dev/fdt/if_mvpp.c
2427
mvpp2_write(sc->sc, MVPP2_RXQ_STATUS_REG(rxq->id), 0);
sys/dev/fdt/if_mvpp.c
2428
mvpp2_write(sc->sc, MVPP2_RXQ_NUM_REG, rxq->id);
sys/dev/fdt/if_mvpp.c
2429
mvpp2_write(sc->sc, MVPP2_RXQ_DESC_ADDR_REG,
sys/dev/fdt/if_mvpp.c
2431
mvpp2_write(sc->sc, MVPP2_RXQ_DESC_SIZE_REG, MVPP2_NRXDESC);
sys/dev/fdt/if_mvpp.c
2432
mvpp2_write(sc->sc, MVPP2_RXQ_INDEX_REG, 0);
sys/dev/fdt/if_mvpp.c
262
void mvpp2_write(struct mvpp2_softc *, bus_addr_t, uint32_t);
sys/dev/fdt/if_mvpp.c
2881
mvpp2_write(sc->sc, MVPP2_ISR_RX_TX_MASK_REG(sc->sc_id), 0);
sys/dev/fdt/if_mvpp.c
2885
mvpp2_write(sc->sc, MVPP2_TX_PORT_FLUSH_REG, reg);
sys/dev/fdt/if_mvpp.c
2891
mvpp2_write(sc->sc, MVPP2_TX_PORT_FLUSH_REG, reg);
sys/dev/fdt/if_mvpp.c
2910
mvpp2_write(sc->sc, MVPP2_TXQ_NUM_REG, txq->id);
sys/dev/fdt/if_mvpp.c
2913
mvpp2_write(sc->sc, MVPP2_TXQ_PREF_BUF_REG, reg);
sys/dev/fdt/if_mvpp.c
2934
mvpp2_write(sc->sc, MVPP2_TXQ_PREF_BUF_REG, reg);
sys/dev/fdt/if_mvpp.c
2936
mvpp2_write(sc->sc, MVPP2_TXQ_SCHED_TOKEN_CNTR_REG(txq->log_id), 0);
sys/dev/fdt/if_mvpp.c
2937
mvpp2_write(sc->sc, MVPP2_TXQ_NUM_REG, txq->id);
sys/dev/fdt/if_mvpp.c
2938
mvpp2_write(sc->sc, MVPP2_TXQ_DESC_ADDR_REG, 0);
sys/dev/fdt/if_mvpp.c
2939
mvpp2_write(sc->sc, MVPP2_TXQ_DESC_SIZE_REG, 0);
sys/dev/fdt/if_mvpp.c
2986
mvpp2_write(sc->sc, MVPP22_BM_ADDR_HIGH_RLS_REG,
sys/dev/fdt/if_mvpp.c
2990
mvpp2_write(sc->sc, MVPP2_BM_VIRT_RLS_REG,
sys/dev/fdt/if_mvpp.c
2992
mvpp2_write(sc->sc, MVPP2_BM_PHY_RLS_REG(pool),
sys/dev/fdt/if_mvpp.c
3009
mvpp2_write(sc->sc, MVPP2_RXQ_STATUS_REG(rxq->id), 0);
sys/dev/fdt/if_mvpp.c
3010
mvpp2_write(sc->sc, MVPP2_RXQ_NUM_REG, rxq->id);
sys/dev/fdt/if_mvpp.c
3011
mvpp2_write(sc->sc, MVPP2_RXQ_DESC_ADDR_REG, 0);
sys/dev/fdt/if_mvpp.c
3012
mvpp2_write(sc->sc, MVPP2_RXQ_DESC_SIZE_REG, 0);
sys/dev/fdt/if_mvpp.c
3030
mvpp2_write(port->sc, MVPP2_RXQ_CONFIG_REG(prxq), val);
sys/dev/fdt/if_mvpp.c
3046
mvpp2_write(port->sc, MVPP2_RXQ_CONFIG_REG(prxq), val);
sys/dev/fdt/if_mvpp.c
3164
mvpp2_write(port->sc, MVPP2_ISR_ENABLE_REG(port->sc_id),
sys/dev/fdt/if_mvpp.c
3171
mvpp2_write(port->sc, MVPP2_ISR_ENABLE_REG(port->sc_id),
sys/dev/fdt/if_mvpp.c
3192
mvpp2_write(port->sc, MVPP2_TXP_SCHED_PORT_INDEX_REG,
sys/dev/fdt/if_mvpp.c
3194
mvpp2_write(port->sc, MVPP2_TXP_SCHED_CMD_1_REG, 0);
sys/dev/fdt/if_mvpp.c
3197
mvpp2_write(port->sc, MVPP2_TXQ_SCHED_TOKEN_CNTR_REG(queue), 0);
sys/dev/fdt/if_mvpp.c
3199
mvpp2_write(port->sc, MVPP2_TXP_SCHED_PERIOD_REG, port->sc->sc_tclk /
sys/dev/fdt/if_mvpp.c
3205
mvpp2_write(port->sc, MVPP2_TXP_SCHED_REFILL_REG, val);
sys/dev/fdt/if_mvpp.c
3207
mvpp2_write(port->sc, MVPP2_TXP_SCHED_TOKEN_SIZE_REG, val);
sys/dev/fdt/if_mvpp.c
3210
mvpp2_write(port->sc, MVPP2_RX_CTRL_REG(port->sc_id),
sys/dev/fdt/if_mvpp.c
3228
mvpp2_write(port->sc, MVPP2_RXQ_CONFIG_REG(queue), val);
sys/dev/fdt/if_mvpp.c
3242
mvpp2_write(port->sc, MVPP2_RXQ_CONFIG_REG(queue), val);
sys/dev/fdt/if_mvpp.c
3262
mvpp2_write(port->sc, MVPP2_TXP_SCHED_PORT_INDEX_REG,
sys/dev/fdt/if_mvpp.c
3264
mvpp2_write(port->sc, MVPP2_TXP_SCHED_Q_CMD_REG, qmap);
sys/dev/fdt/if_mvpp.c
3273
mvpp2_write(port->sc, MVPP2_TXP_SCHED_PORT_INDEX_REG,
sys/dev/fdt/if_mvpp.c
3278
mvpp2_write(port->sc, MVPP2_TXP_SCHED_Q_CMD_REG,
sys/dev/fdt/if_mvpp.c
3343
mvpp2_write(port->sc, MVPP2_RXQ_STATUS_UPDATE_REG(rxq_id), val);
sys/dev/fdt/if_mvpp.c
3356
mvpp2_write(port->sc, MVPP2_RXQ_CONFIG_REG(prxq), val);
sys/dev/fdt/if_mvpp.c
3373
mvpp2_write(port->sc, MVPP2_TXP_SCHED_PORT_INDEX_REG,
sys/dev/fdt/if_mvpp.c
3380
mvpp2_write(port->sc, MVPP2_TXP_SCHED_MTU_REG, val);
sys/dev/fdt/if_mvpp.c
3389
mvpp2_write(port->sc, MVPP2_TXP_SCHED_TOKEN_SIZE_REG, val);
sys/dev/fdt/if_mvpp.c
3400
mvpp2_write(port->sc, MVPP2_TXQ_SCHED_TOKEN_SIZE_REG(txq), val);
sys/dev/fdt/if_mvpp.c
3413
mvpp2_write(port->sc, MVPP2_RXQ_NUM_REG, rxq->id);
sys/dev/fdt/if_mvpp.c
3414
mvpp2_write(port->sc, MVPP2_RXQ_THRESH_REG, rxq->pkts_coal);
sys/dev/fdt/if_mvpp.c
3426
mvpp2_write(port->sc, MVPP2_TXQ_NUM_REG, txq->id);
sys/dev/fdt/if_mvpp.c
3427
mvpp2_write(port->sc, MVPP2_TXQ_THRESH_REG,
sys/dev/fdt/if_mvpp.c
3438
mvpp2_write(port->sc, MVPP2_ISR_RX_THRESHOLD_REG(rxq->id), val);
sys/dev/fdt/if_mvpp.c
3449
mvpp2_write(port->sc, MVPP2_ISR_TX_THRESHOLD_REG(port->sc_id), val);
sys/dev/fdt/if_mvpp.c
3728
mvpp2_write(sc, MVPP2_PRS_TCAM_IDX_REG, pe->index);
sys/dev/fdt/if_mvpp.c
3730
mvpp2_write(sc, MVPP2_PRS_TCAM_DATA_REG(i), pe->tcam.word[i]);
sys/dev/fdt/if_mvpp.c
3731
mvpp2_write(sc, MVPP2_PRS_SRAM_IDX_REG, pe->index);
sys/dev/fdt/if_mvpp.c
3733
mvpp2_write(sc, MVPP2_PRS_SRAM_DATA_REG(i), pe->sram.word[i]);
sys/dev/fdt/if_mvpp.c
3749
mvpp2_write(sc, MVPP2_PRS_TCAM_IDX_REG, pe->index);
sys/dev/fdt/if_mvpp.c
3758
mvpp2_write(sc, MVPP2_PRS_SRAM_IDX_REG, pe->index);
sys/dev/fdt/if_mvpp.c
4563
mvpp2_write(sc, MVPP2_CLS_FLOW_INDEX_REG, fe->index);
sys/dev/fdt/if_mvpp.c
4564
mvpp2_write(sc, MVPP2_CLS_FLOW_TBL0_REG, fe->data[0]);
sys/dev/fdt/if_mvpp.c
4565
mvpp2_write(sc, MVPP2_CLS_FLOW_TBL1_REG, fe->data[1]);
sys/dev/fdt/if_mvpp.c
4566
mvpp2_write(sc, MVPP2_CLS_FLOW_TBL2_REG, fe->data[2]);
sys/dev/fdt/if_mvpp.c
4575
mvpp2_write(sc, MVPP2_CLS_LKP_INDEX_REG, val);
sys/dev/fdt/if_mvpp.c
4576
mvpp2_write(sc, MVPP2_CLS_LKP_TBL_REG, le->data);
sys/dev/fdt/if_mvpp.c
4586
mvpp2_write(sc, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK);
sys/dev/fdt/if_mvpp.c
4611
mvpp2_write(port->sc, MVPP2_CLS_PORT_WAY_REG, val);
sys/dev/fdt/if_mvpp.c
4637
mvpp2_write(port->sc, MVPP2_CLS_OVERSIZE_RXQ_LOW_REG(port->sc_id),
sys/dev/fdt/if_mvpp.c
4639
mvpp2_write(port->sc, MVPP2_CLS_SWFWD_P2HQ_REG(port->sc_id),
sys/dev/fdt/if_mvpp.c
4643
mvpp2_write(port->sc, MVPP2_CLS_SWFWD_PCTRL_REG, val);
sys/dev/fdt/if_mvpp.c
508
mvpp2_write(sc, MVPP2_TX_SNOOP_REG, 0x1);
sys/dev/fdt/if_mvpp.c
531
mvpp2_write(sc, MVPP22_BM_ADDR_HIGH_RLS_REG, 0);
sys/dev/fdt/if_mvpp.c
535
mvpp2_write(sc, MVPP22_AXI_BM_WR_ATTR_REG, reg);
sys/dev/fdt/if_mvpp.c
536
mvpp2_write(sc, MVPP22_AXI_TXQ_DESCR_WR_ATTR_REG, reg);
sys/dev/fdt/if_mvpp.c
537
mvpp2_write(sc, MVPP22_AXI_RXQ_DESCR_WR_ATTR_REG, reg);
sys/dev/fdt/if_mvpp.c
538
mvpp2_write(sc, MVPP22_AXI_RX_DATA_WR_ATTR_REG, reg);
sys/dev/fdt/if_mvpp.c
542
mvpp2_write(sc, MVPP22_AXI_BM_RD_ATTR_REG, reg);
sys/dev/fdt/if_mvpp.c
543
mvpp2_write(sc, MVPP22_AXI_AGGRQ_DESCR_RD_ATTR_REG, reg);
sys/dev/fdt/if_mvpp.c
544
mvpp2_write(sc, MVPP22_AXI_TXQ_DESCR_RD_ATTR_REG, reg);
sys/dev/fdt/if_mvpp.c
545
mvpp2_write(sc, MVPP22_AXI_TX_DATA_RD_ATTR_REG, reg);
sys/dev/fdt/if_mvpp.c
549
mvpp2_write(sc, MVPP22_AXI_RD_NORMAL_CODE_REG, reg);
sys/dev/fdt/if_mvpp.c
550
mvpp2_write(sc, MVPP22_AXI_WR_NORMAL_CODE_REG, reg);
sys/dev/fdt/if_mvpp.c
554
mvpp2_write(sc, MVPP22_AXI_RD_SNOOP_CODE_REG, reg);
sys/dev/fdt/if_mvpp.c
558
mvpp2_write(sc, MVPP22_AXI_WR_SNOOP_CODE_REG, reg);
sys/dev/fdt/if_mvpp.c
570
mvpp2_write(sc, MVPP2_BM_INTR_MASK_REG(i), 0);
sys/dev/fdt/if_mvpp.c
571
mvpp2_write(sc, MVPP2_BM_INTR_CAUSE_REG(i), 0);
sys/dev/fdt/if_mvpp.c
590
mvpp2_write(sc, MVPP2_BM_POOL_CTRL_REG(i),
sys/dev/fdt/if_mvpp.c
594
mvpp2_write(sc, MVPP2_BM_POOL_BASE_REG(i),
sys/dev/fdt/if_mvpp.c
596
mvpp2_write(sc, MVPP22_BM_POOL_BASE_HIGH_REG,
sys/dev/fdt/if_mvpp.c
599
mvpp2_write(sc, MVPP2_BM_POOL_SIZE_REG(i),
sys/dev/fdt/if_mvpp.c
602
mvpp2_write(sc, MVPP2_BM_POOL_CTRL_REG(i),
sys/dev/fdt/if_mvpp.c
623
mvpp2_write(sc, MVPP2_POOL_BUF_SIZE_REG(i),
sys/dev/fdt/if_mvpp.c
654
mvpp2_write(sc, MVPP22_BM_ADDR_HIGH_RLS_REG,
sys/dev/fdt/if_mvpp.c
658
mvpp2_write(sc, MVPP2_BM_VIRT_RLS_REG,
sys/dev/fdt/if_mvpp.c
660
mvpp2_write(sc, MVPP2_BM_PHY_RLS_REG(i),
sys/dev/fdt/if_mvpp.c
671
mvpp2_write(sc, MVPP2_RX_DATA_FIFO_SIZE_REG(0),
sys/dev/fdt/if_mvpp.c
673
mvpp2_write(sc, MVPP2_RX_ATTR_FIFO_SIZE_REG(0),
sys/dev/fdt/if_mvpp.c
676
mvpp2_write(sc, MVPP2_RX_DATA_FIFO_SIZE_REG(1),
sys/dev/fdt/if_mvpp.c
678
mvpp2_write(sc, MVPP2_RX_ATTR_FIFO_SIZE_REG(1),
sys/dev/fdt/if_mvpp.c
682
mvpp2_write(sc, MVPP2_RX_DATA_FIFO_SIZE_REG(i),
sys/dev/fdt/if_mvpp.c
684
mvpp2_write(sc, MVPP2_RX_ATTR_FIFO_SIZE_REG(i),
sys/dev/fdt/if_mvpp.c
688
mvpp2_write(sc, MVPP2_RX_MIN_PKT_SIZE_REG, MVPP2_RX_FIFO_PORT_MIN_PKT);
sys/dev/fdt/if_mvpp.c
689
mvpp2_write(sc, MVPP2_RX_FIFO_INIT_REG, 0x1);
sys/dev/fdt/if_mvpp.c
697
mvpp2_write(sc, MVPP22_TX_FIFO_SIZE_REG(0),
sys/dev/fdt/if_mvpp.c
699
mvpp2_write(sc, MVPP22_TX_FIFO_THRESH_REG(0),
sys/dev/fdt/if_mvpp.c
703
mvpp2_write(sc, MVPP22_TX_FIFO_SIZE_REG(i),
sys/dev/fdt/if_mvpp.c
705
mvpp2_write(sc, MVPP22_TX_FIFO_THRESH_REG(i),
sys/dev/fdt/if_mvpp.c
715
mvpp2_write(sc, MVPP2_PRS_TCAM_CTRL_REG, MVPP2_PRS_TCAM_EN_MASK);
sys/dev/fdt/if_mvpp.c
718
mvpp2_write(sc, MVPP2_PRS_TCAM_IDX_REG, i);
sys/dev/fdt/if_mvpp.c
720
mvpp2_write(sc, MVPP2_PRS_TCAM_DATA_REG(j), 0);
sys/dev/fdt/if_mvpp.c
722
mvpp2_write(sc, MVPP2_PRS_SRAM_IDX_REG, i);
sys/dev/fdt/if_mvpp.c
724
mvpp2_write(sc, MVPP2_PRS_SRAM_DATA_REG(j), 0);
sys/dev/fdt/if_mvpp.c
760
mvpp2_write(sc, MVPP2_PRS_TCAM_IDX_REG, index);
sys/dev/fdt/if_mvpp.c
761
mvpp2_write(sc, MVPP2_PRS_TCAM_DATA_REG(MVPP2_PRS_TCAM_INV_WORD),
sys/dev/fdt/if_mvpp.c
774
mvpp2_write(sc, MVPP2_PRS_INIT_LOOKUP_REG, reg);
sys/dev/fdt/if_mvpp.c
779
mvpp2_write(sc, MVPP2_PRS_MAX_LOOP_REG(port), reg);
sys/dev/fdt/if_mvpp.c
784
mvpp2_write(sc, MVPP2_PRS_INIT_OFFS_REG(port), reg);