sys/arch/amd64/amd64/vmm_machdep.c

2293

want1 &= ~(CR0_PG | CR0_PE);

sys/arch/amd64/amd64/vmm_machdep.c

2294

want0 &= ~(CR0_PG | CR0_PE);

sys/arch/amd64/amd64/vmm_machdep.c

3540

if (vrs.vrs_crs[VCPU_REGS_CR0] & CR0_PE) {

sys/arch/amd64/amd64/vmm_machdep.c

3855

if (ret == EINVAL || !(cr0 & CR0_PE))

sys/arch/amd64/amd64/vmm_machdep.c

5292

if (!(cr0 & CR0_PE))

sys/arch/amd64/amd64/vmm_machdep.c

5579

if ((r & CR0_PG) && (r & CR0_PE) == 0) {

sys/arch/amd64/amd64/vmm_machdep.c

6758

if (vmcb->v_cr0 & CR0_PE) {

sys/arch/amd64/amd64/vmm_machdep.c

8549

{ CR0_PE, "PE", "pe" }

sys/arch/amd64/include/specialreg.h

1645

#define CR0_DEFAULT (CR0_PE|CR0_PG|CR0_NE|CR0_WP)

usr.sbin/vmd/loadfile_elf.c

247

vrs->vrs_crs[VCPU_REGS_CR0] = CR0_ET | CR0_PE;

usr.sbin/vmd/x86_mmio.c

372

if (!(cr0 & CR0_PE))

usr.sbin/vmd/x86_vm.c

1040

if (vrs->vrs_crs[VCPU_REGS_CR0] & CR0_PE) {

usr.sbin/vmd/x86_vm.c

79

.vrs_crs[VCPU_REGS_CR0] = CR0_ET | CR0_PE | CR0_PG,