sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6519

tmp = REG_SET_FIELD(0, CP_RB0_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6520

tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, RB_BLKSZ, rb_bufsz - 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6522

tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, BUF_SWAP, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3733

tmp = REG_SET_FIELD(0, CP_RB0_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3734

tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, RB_BLKSZ, rb_bufsz - 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2729

tmp = REG_SET_FIELD(0, CP_RB0_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2730

tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, RB_BLKSZ, rb_bufsz - 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4243

tmp = REG_SET_FIELD(0, CP_RB0_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4244

tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, RB_BLKSZ, rb_bufsz - 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4245

tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, MTYPE, 3);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4246

tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, MIN_IB_AVAILSZ, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4248

tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, BUF_SWAP, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3404

tmp = REG_SET_FIELD(0, CP_RB0_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3405

tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, RB_BLKSZ, rb_bufsz - 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3407

tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, BUF_SWAP, 1);

sys/dev/pci/drm/radeon/cik.c

4074

WREG32(CP_RB0_CNTL, tmp);

sys/dev/pci/drm/radeon/cik.c

4077

WREG32(CP_RB0_CNTL, tmp | RB_RPTR_WR_ENA);

sys/dev/pci/drm/radeon/cik.c

4092

WREG32(CP_RB0_CNTL, tmp);

sys/dev/pci/drm/radeon/ni.c

1606

CP_RB0_CNTL,

sys/dev/pci/drm/radeon/si.c

3654

WREG32(CP_RB0_CNTL, tmp);

sys/dev/pci/drm/radeon/si.c

3657

WREG32(CP_RB0_CNTL, tmp | RB_RPTR_WR_ENA);

sys/dev/pci/drm/radeon/si.c

3673

WREG32(CP_RB0_CNTL, tmp);