sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5433

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5435

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_EMPTY_INT_ENABLE,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5437

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CMP_BUSY_INT_ENABLE,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5439

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, GFX_IDLE_INT_ENABLE,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9078

cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9084

cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9245

cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9291

cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9336

cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2220

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2222

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_EMPTY_INT_ENABLE,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2224

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CMP_BUSY_INT_ENABLE,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2226

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, GFX_IDLE_INT_ENABLE,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6335

cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6337

cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6343

cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6345

cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6511

cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6557

cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6602

cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1885

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1887

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_EMPTY_INT_ENABLE,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1889

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CMP_BUSY_INT_ENABLE,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1891

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, GFX_IDLE_INT_ENABLE,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4717

cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4719

cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4725

cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4727

cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4887

cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4933

cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4978

cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

3848

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE, enable ? 1 : 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

3849

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_EMPTY_INT_ENABLE, enable ? 1 : 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

3850

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CMP_BUSY_INT_ENABLE, enable ? 1 : 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

3851

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, GFX_IDLE_INT_ENABLE, enable ? 1 : 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6362

WREG32_FIELD(CP_INT_CNTL_RING0, TIME_STAMP_INT_ENABLE,

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6422

WREG32_FIELD(CP_INT_CNTL_RING0, PRIV_REG_INT_ENABLE,

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6433

WREG32_FIELD(CP_INT_CNTL_RING0, PRIV_INSTR_INT_ENABLE,

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6499

WREG32_FIELD(CP_INT_CNTL_RING0, CP_ECC_ERROR_INT_ENABLE, enable_flag);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2759

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE, enable ? 1 : 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2760

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_EMPTY_INT_ENABLE, enable ? 1 : 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2761

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CMP_BUSY_INT_ENABLE, enable ? 1 : 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2763

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, GFX_IDLE_INT_ENABLE, enable ? 1 : 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5940

WREG32_FIELD15(GC, 0, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6038

WREG32_FIELD15(GC, 0, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6074

WREG32_FIELD15(GC, 0, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6107

WREG32_FIELD15(GC, 0, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6133

WREG32_FIELD15(GC, 0, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6142

WREG32_FIELD15(GC, 0, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1514

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE, enable ? 1 : 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1515

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_EMPTY_INT_ENABLE, enable ? 1 : 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1516

tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CMP_BUSY_INT_ENABLE, enable ? 1 : 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3156

WREG32_FIELD15_PREREG(GC, GET_INST(GC, i), CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3196

WREG32_FIELD15_PREREG(GC, GET_INST(GC, i), CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3235

WREG32_FIELD15_PREREG(GC, GET_INST(GC, i), CP_INT_CNTL_RING0,

sys/dev/pci/drm/radeon/cik.c

5760

u32 tmp = RREG32(CP_INT_CNTL_RING0);

sys/dev/pci/drm/radeon/cik.c

5766

WREG32(CP_INT_CNTL_RING0, tmp);

sys/dev/pci/drm/radeon/cik.c

6859

tmp = RREG32(CP_INT_CNTL_RING0) &

sys/dev/pci/drm/radeon/cik.c

6861

WREG32(CP_INT_CNTL_RING0, tmp);

sys/dev/pci/drm/radeon/cik.c

7037

cp_int_cntl = RREG32(CP_INT_CNTL_RING0) &

sys/dev/pci/drm/radeon/cik.c

7217

WREG32(CP_INT_CNTL_RING0, cp_int_cntl);

sys/dev/pci/drm/radeon/si.c

5128

u32 tmp = RREG32(CP_INT_CNTL_RING0);

sys/dev/pci/drm/radeon/si.c

5136

WREG32(CP_INT_CNTL_RING0, tmp);

sys/dev/pci/drm/radeon/si.c

5933

tmp = RREG32(CP_INT_CNTL_RING0) &

sys/dev/pci/drm/radeon/si.c

5935

WREG32(CP_INT_CNTL_RING0, tmp);

sys/dev/pci/drm/radeon/si.c

6051

cp_int_cntl = RREG32(CP_INT_CNTL_RING0) &

sys/dev/pci/drm/radeon/si.c

6083

WREG32(CP_INT_CNTL_RING0, cp_int_cntl);