Symbol: mmVCE_SYS_INT_EN
sys/dev/pci/drm/amd/amdgpu/vce_v2_0.c
558
WREG32_P(mmVCE_SYS_INT_EN, val, ~VCE_SYS_INT_EN__VCE_SYS_INT_TRAP_INTERRUPT_EN_MASK);
sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c
736
WREG32_P(mmVCE_SYS_INT_EN, val, ~VCE_SYS_INT_EN__VCE_SYS_INT_TRAP_INTERRUPT_EN_MASK);
sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c
300
MMSCH_V1_0_INSERT_DIRECT_RD_MOD_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_SYS_INT_EN),
sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c
682
WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_SYS_INT_EN),
sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c
782
WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_SYS_INT_EN), val,