sys/dev/pci/drm/amd/amdgpu/amdgpu_uvd.c

1010

case mmUVD_GPCOM_VCPU_DATA0:

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

117

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

124

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

484

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

491

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

499

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

506

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1069

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1082

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1097

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

932

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

939

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1192

PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_GPCOM_VCPU_DATA0), 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1202

PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_GPCOM_VCPU_DATA0), 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1374

PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_GPCOM_VCPU_DATA0), 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1390

PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_GPCOM_VCPU_DATA0), 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1519

PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA0), 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1563

PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA0), 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1573

PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA0), 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1623

PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA0), 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1657

PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA0), 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

179

SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA0);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

53

SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_GPCOM_VCPU_DATA0),

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

190

adev->vcn.inst->external.data0 = SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA0);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

62

SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_GPCOM_VCPU_DATA0),

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

333

adev->vcn.inst[j].external.data0 = SOC15_REG_OFFSET(VCN, j, mmUVD_GPCOM_VCPU_DATA0);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

65

SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_GPCOM_VCPU_DATA0),

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

219

adev->vcn.inst[i].external.data0 = SOC15_REG_OFFSET(VCN, i, mmUVD_GPCOM_VCPU_DATA0);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

69

SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_GPCOM_VCPU_DATA0),