sys/dev/pci/drm/amd/amdgpu/cik.c

1050

{mmSRBM_STATUS},

sys/dev/pci/drm/amd/amdgpu/cik_ih.c

351

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/cik_ih.c

367

tmp = RREG32(mmSRBM_STATUS) & SRBM_STATUS__IH_BUSY_MASK;

sys/dev/pci/drm/amd/amdgpu/cik_ih.c

380

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/cz_ih.c

347

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/cz_ih.c

363

tmp = RREG32(mmSRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/cz_ih.c

375

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4535

tmp = RREG32(mmSRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4933

tmp = RREG32(mmSRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/gmc_v6_0.c

964

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/gmc_v6_0.c

992

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/gmc_v7_0.c

1150

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/gmc_v7_0.c

1177

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/gmc_v8_0.c

1273

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/gmc_v8_0.c

1290

tmp = RREG32(mmSRBM_STATUS) & (SRBM_STATUS__MCB_BUSY_MASK |

sys/dev/pci/drm/amd/amdgpu/gmc_v8_0.c

1308

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/iceland_ih.c

341

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/iceland_ih.c

357

tmp = RREG32(mmSRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/iceland_ih.c

369

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/si.c

1131

{mmSRBM_STATUS},

sys/dev/pci/drm/amd/amdgpu/si_ih.c

217

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/si_ih.c

243

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/tonga_ih.c

359

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/tonga_ih.c

375

tmp = RREG32(mmSRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/tonga_ih.c

387

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

786

return !(RREG32(mmSRBM_STATUS) & SRBM_STATUS__UVD_BUSY_MASK);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

795

if (!(RREG32(mmSRBM_STATUS) & SRBM_STATUS__UVD_BUSY_MASK))

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

666

return !(RREG32(mmSRBM_STATUS) & SRBM_STATUS__UVD_BUSY_MASK);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

675

if (!(RREG32(mmSRBM_STATUS) & SRBM_STATUS__UVD_BUSY_MASK))

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

587

return !(RREG32(mmSRBM_STATUS) & SRBM_STATUS__UVD_BUSY_MASK);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

596

if (!(RREG32(mmSRBM_STATUS) & SRBM_STATUS__UVD_BUSY_MASK))

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1152

return !(RREG32(mmSRBM_STATUS) & SRBM_STATUS__UVD_BUSY_MASK);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1172

u32 tmp = RREG32(mmSRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/vi.c

672

{mmSRBM_STATUS},