sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

900

orig = data = RREG32(mmSDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

903

WREG32(mmSDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET, data);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

905

orig = data = RREG32(mmSDMA0_POWER_CNTL + SDMA1_REGISTER_OFFSET);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

908

WREG32(mmSDMA0_POWER_CNTL + SDMA1_REGISTER_OFFSET, data);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

910

orig = data = RREG32(mmSDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

913

WREG32(mmSDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET, data);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

915

orig = data = RREG32(mmSDMA0_POWER_CNTL + SDMA1_REGISTER_OFFSET);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

918

WREG32(mmSDMA0_POWER_CNTL + SDMA1_REGISTER_OFFSET, data);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

1471

temp = data = RREG32(mmSDMA0_POWER_CNTL + sdma_offsets[i]);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

1475

WREG32(mmSDMA0_POWER_CNTL + sdma_offsets[i], data);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

1479

temp = data = RREG32(mmSDMA0_POWER_CNTL + sdma_offsets[i]);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

1483

WREG32(mmSDMA0_POWER_CNTL + sdma_offsets[i], data);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

151

mmSDMA0_POWER_CNTL, 0x00000800, 0x0003c800,

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

1531

data = RREG32(mmSDMA0_POWER_CNTL + sdma_offsets[0]);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

171

mmSDMA0_POWER_CNTL, 0x00000800, 0x0003c800,

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1277

def = data = RREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_POWER_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1280

WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_POWER_CNTL), data);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1289

def = data = RREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_POWER_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1296

WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_POWER_CNTL), data);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

143

SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_POWER_CNTL, 0x003ff006, 0x0003c000),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

189

SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_POWER_CNTL, 0xfc3fffff, 0x40000051),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

2284

def = data = RREG32_SDMA(0, mmSDMA0_POWER_CNTL);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

2287

WREG32_SDMA(0, mmSDMA0_POWER_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

2292

def = data = RREG32_SDMA(0, mmSDMA0_POWER_CNTL);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

2295

WREG32_SDMA(0, mmSDMA0_POWER_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

2348

data = RREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_POWER_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

335

SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_POWER_CNTL, 0x003fff07, 0x40000051),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1807

def = data = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1810

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL), data);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1814

def = data = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1817

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL), data);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1867

data = RREG32(sdma_v5_0_get_reg_offset(adev, 0, mmSDMA0_POWER_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1774

def = data = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1777

WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL), data);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1781

def = data = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1784

WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL), data);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1839

data = RREG32_KIQ(sdma_v5_2_get_reg_offset(adev, 0, mmSDMA0_POWER_CNTL));