sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

1054

tmp = RREG32(mmSDMA0_F32_CNTL + SDMA0_REGISTER_OFFSET);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

1056

WREG32(mmSDMA0_F32_CNTL + SDMA0_REGISTER_OFFSET, tmp);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

1060

tmp = RREG32(mmSDMA0_F32_CNTL + SDMA1_REGISTER_OFFSET);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

1062

WREG32(mmSDMA0_F32_CNTL + SDMA1_REGISTER_OFFSET, tmp);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

409

me_cntl = RREG32(mmSDMA0_F32_CNTL + sdma_offsets[i]);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

414

WREG32(mmSDMA0_F32_CNTL + sdma_offsets[i], me_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

384

f32_cntl = RREG32(mmSDMA0_F32_CNTL + sdma_offsets[i]);

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

389

WREG32(mmSDMA0_F32_CNTL + sdma_offsets[i], f32_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

951

tmp = RREG32(mmSDMA0_F32_CNTL + SDMA0_REGISTER_OFFSET);

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

953

WREG32(mmSDMA0_F32_CNTL + SDMA0_REGISTER_OFFSET, tmp);

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

958

tmp = RREG32(mmSDMA0_F32_CNTL + SDMA1_REGISTER_OFFSET);

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

960

WREG32(mmSDMA0_F32_CNTL + SDMA1_REGISTER_OFFSET, tmp);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

621

f32_cntl = RREG32(mmSDMA0_F32_CNTL + sdma_offsets[i]);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

626

WREG32(mmSDMA0_F32_CNTL + sdma_offsets[i], f32_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1057

f32_cntl = RREG32_SDMA(i, mmSDMA0_F32_CNTL);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1059

WREG32_SDMA(i, mmSDMA0_F32_CNTL, f32_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1420

temp = RREG32_SDMA(i, mmSDMA0_F32_CNTL);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1422

WREG32_SDMA(i, mmSDMA0_F32_CNTL, temp);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1595

f32_cntl = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_F32_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1597

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_F32_CNTL), f32_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

672

f32_cntl = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_F32_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

674

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_F32_CNTL), f32_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

816

temp = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_F32_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

818

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_F32_CNTL), temp);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1504

f32_cntl = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_F32_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1506

WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_F32_CNTL), f32_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

519

f32_cntl = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_F32_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

521

WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_F32_CNTL), f32_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

663

temp = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_F32_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

665

WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_F32_CNTL), temp);