Symbol: CPU_IS_SH3
sys/arch/sh/include/cache.h
184
#define SH_HAS_UNIFIED_CACHE CPU_IS_SH3
sys/arch/sh/sh/cache.c
78
if (CPU_IS_SH3)
sys/arch/sh/sh/clock.c
141
CPU_IS_SH3 ? SH3_TCR_TPSC_RTC : SH4_TCR_TPSC_RTC);
sys/arch/sh/sh/clock.c
280
(CPU_IS_SH3 ? SH3_TCR_TPSC_RTC : SH4_TCR_TPSC_RTC));
sys/arch/sh/sh/clock.c
288
CPU_IS_SH3 ? sh3_clock_intr : sh4_clock_intr, NULL, "clock");
sys/arch/sh/sh/clock.c
392
if (CPU_IS_SH3)
sys/arch/sh/sh/clock.c
431
if (CPU_IS_SH3)
sys/arch/sh/sh/db_interface.c
227
if (CPU_IS_SH3) {
sys/arch/sh/sh/db_interface.c
405
if (CPU_IS_SH3)
sys/arch/sh/sh/devreg.c
155
if (CPU_IS_SH3)
sys/arch/sh/sh/interrupt.c
247
if (CPU_IS_SH3) \
sys/arch/sh/sh/interrupt.c
278
if (CPU_IS_SH3) {
sys/arch/sh/sh/mmu.c
56
if (CPU_IS_SH3) {
sys/arch/sh/sh/mmu.c
79
if (CPU_IS_SH3) {
sys/arch/sh/sh/process_machdep.c
186
if (CPU_IS_SH3)
sys/arch/sh/sh/process_machdep.c
246
if (CPU_IS_SH3)
sys/arch/sh/sh/sh_machdep.c
174
if (CPU_IS_SH3)
sys/arch/sh/sh/sh_machdep.c
192
__sh_switch_resume = CPU_IS_SH3 ? sh3_switch_resume : sh4_switch_resume;
sys/arch/sh/sh/sh_machdep.c
253
CPU_IS_SH3 ? sh3_vector_tlbmiss_end - sh3_vector_tlbmiss :
sys/arch/sh/sh/vm_machdep.c
160
if (CPU_IS_SH3)
sys/arch/sh/sh/vm_machdep.c
186
if (CPU_IS_SH3)