sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

3019

lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

3022

WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

3025

lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

3028

WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

3048

lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

3051

WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

3054

lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

3057

WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

2953

lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

2955

WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

2958

lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

2960

WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

3004

lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

3006

WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

3009

lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

3011

WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask);