Symbol: mmIH_RB_CNTL_RING1
sys/dev/pci/drm/amd/amdgpu/navi10_ih.c
114
ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1);
sys/dev/pci/drm/amd/amdgpu/navi10_ih.c
127
WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1, ih_rb_cntl);
sys/dev/pci/drm/amd/amdgpu/navi10_ih.c
70
ih_regs->ih_rb_cntl = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_CNTL_RING1);
sys/dev/pci/drm/amd/amdgpu/vega10_ih.c
68
ih_regs->ih_rb_cntl = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_CNTL_RING1);
sys/dev/pci/drm/amd/amdgpu/vega20_ih.c
76
ih_regs->ih_rb_cntl = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_CNTL_RING1);