sys/dev/pci/drm/amd/amdgpu/cik.c

1115

{mmGC_USER_RB_BACKEND_DISABLE, true},

sys/dev/pci/drm/amd/amdgpu/cik.c

1134

case mmGC_USER_RB_BACKEND_DISABLE:

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5088

data |= RREG32_SOC15(GC, 0, mmGC_USER_RB_BACKEND_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1334

RREG32(mmGC_USER_RB_BACKEND_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1511

RREG32(mmGC_USER_RB_BACKEND_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

1597

data |= RREG32(mmGC_USER_RB_BACKEND_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

1802

RREG32(mmGC_USER_RB_BACKEND_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

3422

RREG32(mmGC_USER_RB_BACKEND_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

3628

RREG32(mmGC_USER_RB_BACKEND_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2526

data |= RREG32_SOC15(GC, 0, mmGC_USER_RB_BACKEND_DISABLE);

sys/dev/pci/drm/amd/amdgpu/si.c

1174

{mmGC_USER_RB_BACKEND_DISABLE, true},

sys/dev/pci/drm/amd/amdgpu/si.c

1190

case mmGC_USER_RB_BACKEND_DISABLE:

sys/dev/pci/drm/amd/amdgpu/vi.c

738

{mmGC_USER_RB_BACKEND_DISABLE, true},

sys/dev/pci/drm/amd/amdgpu/vi.c

756

case mmGC_USER_RB_BACKEND_DISABLE: