sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

276

tmp = RREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd]);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

281

WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd], tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

294

tmp = RREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd]);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

296

WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd], tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

3016

dc_hpd_int_cntl = RREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd]);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

3018

WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd], dc_hpd_int_cntl);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

3021

dc_hpd_int_cntl = RREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd]);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

3023

WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd], dc_hpd_int_cntl);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

332

tmp = RREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd]);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

334

WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

260

tmp = RREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd]);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

265

WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd], tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

278

tmp = RREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd]);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

280

WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd], tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

3032

dc_hpd_int_cntl = RREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[type]);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

3034

WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[type], dc_hpd_int_cntl);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

3037

dc_hpd_int_cntl = RREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[type]);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

3039

WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[type], dc_hpd_int_cntl);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

316

tmp = RREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd]);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

318

WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp);