min_t
count = min_t(int, count, max_count);
min_t(u32, adev->doorbell.size / sizeof(u32),
min_t(size_t, sizeof(fru_info->manufacturer_name),
min_t(size_t, sizeof(fru_info->product_name), pia[addr] & 0x3F));
min_t(size_t, sizeof(fru_info->product_number),
min_t(size_t, sizeof(fru_info->serial), pia[addr] & 0x3F));
min_t(size_t, sizeof(fru_info->fru_id), pia[addr] & 0x3F));
min_t(u64, size, sizeof(ras_mask))) ?
ret = copy_to_user(out, &ip, min_t(size_t, size, sizeof(ip)));
s = min_t(u64, s, size);
con->bad_page_cnt_threshold = min_t(int, max_count,
ssize_t s = min_t(u64, 64, size);
res = min_t(size_t, res, size);
data_len = min_t(size_t, data_len, size);
data_len = min_t(size_t, data_len, size);
data_len = min_t(size_t, data_len, size);
data_len = min_t(size_t, rec_hdr_fmt_size - r, size);
res = min_t(size_t, res, size);
ssize_t bytes = min_t(ssize_t, ring->mqd_size - *pos, size);
num_pages = min_t(uint32_t, num_pages, AMDGPU_GTT_MAX_TRANSFER_SIZE);
read_num[0] = min_t(size_t, size, available);
read_num[0] = min_t(size_t, size, available);
adev->vm_manager.num_level = min_t(unsigned int, max_level, tmp);
*frag = min_t(unsigned int, ffs(start) - 1, fls64(end - start) - 1);
line_time = min_t(u32, line_time, 65535);
latency_watermark_a = min_t(u32, dce_v10_0_latency_watermark(&wm_high), 65535);
latency_watermark_b = min_t(u32, dce_v10_0_latency_watermark(&wm_low), 65535);
line_time = min_t(u32, line_time, 65535);
latency_watermark_a = min_t(u32, dce_v6_0_latency_watermark(&wm_high), 65535);
latency_watermark_b = min_t(u32, dce_v6_0_latency_watermark(&wm_low), 65535);
latency_watermark_a = min_t(u32, dce_v8_0_latency_watermark(&wm_high), 65535);
latency_watermark_b = min_t(u32, dce_v8_0_latency_watermark(&wm_low), 65535);
line_time = min_t(u32, line_time, 65535);
unsigned rb_per_pkr = min_t(unsigned, num_rb / num_se / sh_per_se, 2);
num_rb_pipes = min_t(unsigned, adev->gfx.config.max_backends_per_se *
unsigned rb_per_pkr = min_t(unsigned, num_rb / num_se / sh_per_se, 2);
num_rb_pipes = min_t(unsigned, adev->gfx.config.max_backends_per_se *
unsigned rb_per_pkr = min_t(unsigned, num_rb / num_se / sh_per_se, 2);
num_rb_pipes = min_t(unsigned, adev->gfx.config.max_backends_per_se *
tmp_num_devices = min_t(size_t, *number_of_device_infos, target->n_pdds);
*entry_size = min_t(size_t, *entry_size, sizeof(device_info));
user_timeout_ms = min_t(uint32_t, user_timeout_ms, 0x7FFFFFFF);
*entry_size = min_t(size_t, *entry_size, sizeof(struct kfd_queue_snapshot_entry));
size = min_t(size_t, size, KFD_MAX_KFIFO_SIZE);
last = min_t(unsigned long, ALIGN(addr + 1, size) - 1, prange->last);
svms->default_granularity = min_t(u8, amdgpu_svm_default_granularity, 0x1B);
prange->granularity = min_t(uint32_t, attrs[i].value, 0x3F);
bpc = min_t(u8, bpc, requested_bpc);
*speed = min_t(u32, tmp64, 255);
speed = min_t(uint32_t, speed, 255);
*speed = min_t(uint32_t, tmp64, 255);
speed = min_t(uint32_t, speed, 255);
*speed = min_t(uint32_t, tmp64, 255);
*speed = min_t(uint32_t, tmp64, 255);
speed = min_t(uint32_t, speed, 255);
uint32_t min = min_t(uint32_t, clock_insr, CISLAND_MINIMUM_ENGINE_CLOCK);
speed = min_t(uint32_t, speed, 255);
*speed = min_t(uint32_t, tmp64, 255);
clocks->num_levels = min_t(uint32_t,
speed = min_t(uint32_t, speed, 255);
*speed = min_t(uint32_t, tmp64, 255);
clocks->num_levels = min_t(uint32_t,
speed = min_t(uint32_t, speed, 255);
high = min_t(typeof(high),
high = min_t(typeof(high),
count = min_t(int, 16, ARRAY_SIZE(bank->regs));
high = min_t(typeof(high),
high = min_t(typeof(high),
__entry->colorimetry = min_t(u32, colorimetry, 17U);
__entry->eotf = min_t(u32, eotf, 4U);
__entry->range = min_t(u32, range, 2U);
__entry->pixel_enc = min_t(u32, pixel_enc, 15U);
ret = min_t(size_t, txmsg->reply.u.remote_dpcd_read_ack.num_bytes,
const int count = min_t(unsigned int, connector_count, BITS_PER_LONG);
int i, len = min_t(int, info->vics_len, BITS_PER_TYPE(y420cmdb_map));
sizes->fb_width = min_t(u32, desired_mode->hdisplay + x, sizes->fb_width);
sizes->fb_height = min_t(u32, desired_mode->vdisplay + y, sizes->fb_height);
clip->x1 = min_t(u32, clip->x1, clip_copy.x1);
clip->y1 = min_t(u32, clip->y1, clip_copy.y1);
clip->x1 = min_t(u32, clip->x1, x);
clip->y1 = min_t(u32, clip->y1, y);
len = min_t(ssize_t, strlen(str), iterator->remain);
return min_t(unsigned int, wm, USHRT_MAX);
return min_t(unsigned int, wm, USHRT_MAX);
wm->level = min_t(int, wm->level, wm_state->num_levels - 1);
result->pri_val = min_t(u32, result->pri_val, max->pri);
result->spr_val = min_t(u32, result->spr_val, max->spr);
result->cur_val = min_t(u32, result->cur_val, max->cur);
for (j = 0; j < min_t(u32, len - i, 4); j++)
len = min_t(int, sizeof(crtc_state->eld) / 4, eld_buffer_size);
min_t(size_t, defs->child_dev_size, sizeof(*child)));
num_channels = min_t(u8, num_channels, qi.max_numchannels);
mpll_div_multiplier = min_t(u8, div64_u64((vco_freq * 16 + (datarate >> 1)),
*ret_n = min_t(unsigned int, roundup_pow_of_two(n), DATA_LINK_N_MAX);
bpc = min_t(int, bpc, intel_dp->dfp.max_bpc);
bits_per_pixel = min_t(u32, bits_per_pixel, 27);
bits_per_pixel = min_t(u32, bits_per_pixel, 31);
min_t(u16, hweight16(pmdemand_state->active_combo_phys_mask),
min_t(u8, intel_dbuf_num_enabled_slices(new_dbuf_state), 3);
min_t(u8, intel_dbuf_num_active_pipes(new_dbuf_state), 3);
min_t(u8, intel_dbuf_num_active_pipes(new_dbuf_state), INTEL_NUM_PIPES(display));
min_t(u16, new_pmdemand_state->params.active_phys + 1, 7);
u32 dbufs = min_t(u32, hweight8(dbuf_slices), 3);
memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
hbuf_size = min_t(unsigned int, length, hbuf_size);
min_t(unsigned int, 8, hbuf_size - i)))
dsc_reg_num = min_t(int, ARRAY_SIZE(dsc_reg), vdsc_per_pipe);
dsc_reg_num = min_t(int, ARRAY_SIZE(dsc_reg), vdsc_per_pipe);
extra = min_t(u16, iter->size,
for (j = 0; j < min_t(u32, len - i, 4); j++)
for (j = 0; j < min_t(u32, len - i, 4); j++)
txesc2_div = min_t(u32, div2_value, 10);
min_t(unsigned long, remain, ARRAY_SIZE(stack));
min_t(u64, BIT_ULL(31), size - copied);
if (nfences > min_t(unsigned long,
if (num_fences > min_t(unsigned long,
min_t(unsigned int, chunk,
end = min_t(long, end, vm_end);
end = min_t(long, end, vm_end);
nr_pages = min_t(unsigned long, nr_pages,
unsigned int len = min_t(typeof(size), size, PAGE_SIZE);
return min_t(u64, MAX_JIFFY_OFFSET, nsecs_to_jiffies64(n) + 1);
min_t(unsigned int, ndwords - dw, max_dwords(obj));
min_t(unsigned int, ndwords - dw, max_dwords(obj));
min_t(unsigned int, ndwords - dw, max_dwords(obj));
value = min_t(u64, value, jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT));
value = min_t(u64, value, guc_policy_max_preempt_timeout_ms());
value = min_t(u64, value, jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT));
value = min_t(u64, value, jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT));
value = min_t(u64, value, guc_policy_max_exec_quantum_ms());
value = min_t(u64, value, jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT));
min_t(u64, ggtt->mappable_end, ggtt->vm.total);
u32 n_ptes = min_t(u32, 511, num_entries);
pkt = min_t(int, pkt, (ring->space - rq->reserved_space) / sizeof(u32) + 5);
pkt = min_t(int, pkt, (ring->size - ring->emit) / sizeof(u32) + 5);
return min_t(u64, bytes_to_cpy, CHUNK_SZ);
lmem_size = min_t(resource_size_t, lmem_size,
rp0 = min_t(u32, rp0, 0xea);
subslices > min_t(u8, 4, hweight8(sseu->subslice_mask.hsw[0]) / 2)) {
int x = i915_prandom_u32_max_state(min_t(int, 1024,
min_t(int, 4096,
sz = min_t(u32, sz, (SZ_1K - rq->reserved_space) / sizeof(u32) -
min_t(size_t, PAGE_SIZE - offset_in_page(off), len);
min_t(size_t, PAGE_SIZE - offset_in_page(off), len);
min_t(size_t, PAGE_SIZE - offset_in_page(off), len);
min_t(size_t, PAGE_SIZE - offset_in_page(off), len);
guc->submission_state.sched_disable_delay_ms = min_t(u64, val, 60000);
unsigned int max = min_t(unsigned int, 100,
u32 size = min_t(u32, uc_fw->rsa_size, max_len);
u32 len = min_t(u32, size, PAGE_SIZE - offset);
u32 len = min_t(u32, size, PAGE_SIZE - offset);
unsigned int length = min_t(u64, remain, PAGE_SIZE - offset);
unsigned int length = min_t(u64, remain, PAGE_SIZE - offset);
ret = min_t(size_t, count, len - off);
u32 n_lri = min_t(u32,
len = min_t(u64, block_size, max_segment - sg->length);
block_size = min_t(u64, size, drm_buddy_block_size(mm, block));
len = min_t(u64, block_size, max_segment - sg->length);
size_t max = min_t(size_t, UINT_MAX, dma_max_mapping_size(dev));
count = min_t(size_t, GEN7_L3LOG_SIZE - offset, count);
return min_t(unsigned long, MAX_JIFFY_OFFSET, j + 1);
end = min_t(u64, end, i915_vm_to_ggtt(vma->vm)->mappable_end);
end = min_t(u64, end, (1ULL << 32) - I915_GTT_PAGE_SIZE);
min_t(u64, ULONG_MAX - 1, (hole_size / 2) >> ilog2(min_alignment));
min_t(u64, ULONG_MAX - 1, hole_size >> PAGE_SHIFT);
unsigned long len = min_t(typeof(rem), rem, BIT(31));
total += min_t(u64, end, resource_size(&mr->io)) - start;
#define MIN_T(t, a, b) min_t(t, a, b)
#define clamp_t(t, x, a, b) min_t(t, max_t(t, x, a), b)
lvds->panel_vcc_delay = min_t(u16, lvds->panel_vcc_delay, 2000);
rdev->doorbell.num_doorbells = min_t(u32, rdev->doorbell.size / sizeof(u32), RADEON_MAX_DOORBELLS);
size_t cur_size = min_t(size_t, size, PAGE_SIZE - off);
min_t(unsigned int, MAX_PAGE_ORDER,
return min_t(unsigned int, highest, __fls(alloc->remaining_pages));
(first_data_bytes != min_t(int, 188, bytecount))) {
middle_count = min_t(int, 188, bytecount);
middle_count = min_t(int, 188,