le32_to_cpup
WREG32(mmSDMA0_UCODE_DATA + sdma_offsets[i], le32_to_cpup(fw_data++));
le32_to_cpup(fw_data++));
le32_to_cpup(fw_data + pfp_hdr->jt_offset + i));
le32_to_cpup(fw_data + ce_hdr->jt_offset + i));
le32_to_cpup(fw_data + me_hdr->jt_offset + i));
le32_to_cpup(fw_data + mec_hdr->jt_offset + i));
le32_to_cpup(fw_data++));
le32_to_cpup(fw_data++));
le32_to_cpup(fw_data++));
le32_to_cpup(fw_data++));
le32_to_cpup(fw_data++));
le32_to_cpup(fw_data + pfp_hdr->jt_offset + i));
le32_to_cpup(fw_data + me_hdr->jt_offset + i));
le32_to_cpup(fw_data + mec_hdr->jt_offset + i));
le32_to_cpup(fw_data++));
le32_to_cpup(fw_data++));
le32_to_cpup(fw_data++));
WREG32(mmCP_PFP_UCODE_DATA, le32_to_cpup(fw_data++));
WREG32(mmCP_CE_UCODE_DATA, le32_to_cpup(fw_data++));
WREG32(mmCP_ME_RAM_DATA, le32_to_cpup(fw_data++));
WREG32(mmRLC_UCODE_DATA, le32_to_cpup(fw_data++));
WREG32(mmCP_PFP_UCODE_DATA, le32_to_cpup(fw_data++));
WREG32(mmCP_CE_UCODE_DATA, le32_to_cpup(fw_data++));
WREG32(mmCP_ME_RAM_DATA, le32_to_cpup(fw_data++));
WREG32(mmCP_MEC_ME1_UCODE_DATA, le32_to_cpup(fw_data++));
WREG32(mmCP_MEC_ME2_UCODE_DATA, le32_to_cpup(fw_data++));
WREG32(mmRLC_GPM_UCODE_DATA, le32_to_cpup(fw_data++));
WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_DATA, le32_to_cpup(fw_data++));
WREG32_SOC15(GC, 0, mmCP_PFP_UCODE_DATA, le32_to_cpup(fw_data++));
WREG32_SOC15(GC, 0, mmCP_CE_UCODE_DATA, le32_to_cpup(fw_data++));
WREG32_SOC15(GC, 0, mmCP_ME_RAM_DATA, le32_to_cpup(fw_data++));
le32_to_cpup(fw_data + mec_hdr->jt_offset + i));
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_GPM_UCODE_DATA, le32_to_cpup(fw_data++));
le32_to_cpup(fw_data + mec_hdr->jt_offset + i));
WREG32(mmMC_SEQ_IO_DEBUG_INDEX, le32_to_cpup(new_io_mc_regs++));
WREG32(mmMC_SEQ_IO_DEBUG_DATA, le32_to_cpup(new_io_mc_regs++));
WREG32(mmMC_SEQ_SUP_PGM, le32_to_cpup(new_fw_data++));
WREG32(mmMC_SEQ_IO_DEBUG_INDEX, le32_to_cpup(io_mc_regs++));
WREG32(mmMC_SEQ_IO_DEBUG_DATA, le32_to_cpup(io_mc_regs++));
WREG32(mmMC_SEQ_SUP_PGM, le32_to_cpup(fw_data++));
WREG32(mmMC_SEQ_IO_DEBUG_INDEX, le32_to_cpup(io_mc_regs++));
WREG32(mmMC_SEQ_IO_DEBUG_DATA, le32_to_cpup(io_mc_regs++));
WREG32(mmMC_SEQ_SUP_PGM, le32_to_cpup(fw_data++));
WREG32(mmMC_SEQ_IO_DEBUG_INDEX, le32_to_cpup(io_mc_regs++));
WREG32(mmMC_SEQ_IO_DEBUG_DATA, le32_to_cpup(io_mc_regs++));
WREG32(mmMC_SEQ_SUP_PGM, le32_to_cpup(fw_data++));
WREG32_SOC15(GC, 0, regGFX_IMU_I_RAM_DATA, le32_to_cpup(fw_data++));
WREG32_SOC15(GC, 0, regGFX_IMU_D_RAM_DATA, le32_to_cpup(fw_data++));
WREG32_SOC15(GC, 0, regGFX_IMU_I_RAM_DATA, le32_to_cpup(fw_data++));
WREG32_SOC15(GC, 0, regGFX_IMU_D_RAM_DATA, le32_to_cpup(fw_data++));
le32_to_cpup(fw_data++));
le32_to_cpup(fw_data++));
WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UCODE_DATA), le32_to_cpup(fw_data++));
WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_UCODE_DATA), le32_to_cpup(fw_data++));
WREG32(sdma_v6_0_get_reg_offset(adev, 0, regSDMA0_BROADCAST_UCODE_DATA), le32_to_cpup(fw_data++));
WREG32(sdma_v6_0_get_reg_offset(adev, 0, regSDMA0_BROADCAST_UCODE_DATA), le32_to_cpup(fw_data++));
WREG32(sdma_v6_0_get_reg_offset(adev, i, regSDMA0_UCODE_DATA), le32_to_cpup(fw_data++));
WREG32(sdma_v6_0_get_reg_offset(adev, i, regSDMA0_UCODE_DATA), le32_to_cpup(fw_data++));
WREG32(vpe_get_reg_offset(vpe, j, regVPEC_UCODE_DATA), le32_to_cpup(data++));
le32_to_cpup(sbuf32),
le32_to_cpup(sbuf32 + 1),
le32_to_cpup(sbuf32 + 2),
le32_to_cpup(sbuf32 + 3),
*dbuf8++ = xfrm_pixel(le32_to_cpup(sbuf32++));
le32_to_cpup(sbuf32),
le32_to_cpup(sbuf32 + 1),
le32_to_cpup(sbuf32 + 2),
le32_to_cpup(sbuf32 + 3),
le32_to_cpup(sbuf32),
le32_to_cpup(sbuf32 + 1),
*dbuf16++ = cpu_to_le16(xfrm_pixel(le32_to_cpup(sbuf32++)));
xfrm_pixel(le32_to_cpup(sbuf32)),
xfrm_pixel(le32_to_cpup(sbuf32 + 1)),
xfrm_pixel(le32_to_cpup(sbuf32 + 2)),
xfrm_pixel(le32_to_cpup(sbuf32 + 3)),
u32 val24 = xfrm_pixel(le32_to_cpup(sbuf32++));
*dbuf32++ = cpu_to_le32(xfrm_pixel(le32_to_cpup(sbuf32++)));
WREG32(MC_SEQ_IO_DEBUG_INDEX, le32_to_cpup(new_io_mc_regs++));
WREG32(MC_SEQ_IO_DEBUG_DATA, le32_to_cpup(new_io_mc_regs++));
WREG32(MC_SEQ_SUP_PGM, le32_to_cpup(new_fw_data++));
WREG32(CP_PFP_UCODE_DATA, le32_to_cpup(fw_data++));
WREG32(CP_CE_UCODE_DATA, le32_to_cpup(fw_data++));
WREG32(CP_ME_RAM_DATA, le32_to_cpup(fw_data++));
WREG32(CP_MEC_ME1_UCODE_DATA, le32_to_cpup(fw_data++));
WREG32(CP_MEC_ME2_UCODE_DATA, le32_to_cpup(fw_data++));
WREG32(RLC_GPM_UCODE_DATA, le32_to_cpup(fw_data++));
WREG32(SDMA0_UCODE_DATA + SDMA0_REGISTER_OFFSET, le32_to_cpup(fw_data++));
WREG32(SDMA0_UCODE_DATA + SDMA1_REGISTER_OFFSET, le32_to_cpup(fw_data++));
WREG32(MC_SEQ_IO_DEBUG_INDEX, le32_to_cpup(new_io_mc_regs++));
WREG32(MC_SEQ_IO_DEBUG_DATA, le32_to_cpup(new_io_mc_regs++));
WREG32(MC_SEQ_SUP_PGM, le32_to_cpup(new_fw_data++));
WREG32(CP_PFP_UCODE_DATA, le32_to_cpup(fw_data++));
WREG32(CP_CE_UCODE_DATA, le32_to_cpup(fw_data++));
WREG32(CP_ME_RAM_DATA, le32_to_cpup(fw_data++));
WREG32(RLC_UCODE_DATA, le32_to_cpup(fw_data++));
le32_to_cpup((uint32_t *)(phy_sku + IWM_RADIO_CFG_8000));
sku = le32_to_cpup((uint32_t *)(phy_sku + IWM_SKU_8000));
return le32_to_cpup((uint32_t *)&tx_resp->status +
ch_flags = le32_to_cpup(channel_profile_v4 + ch_idx);
sha1 = le32_to_cpup((const uint32_t *)data);
if (le32_to_cpup((const uint32_t *)data) == 0xddddeeee)
return le32_to_cpup((uint32_t *)&tx_resp->status +
do { *((uint32_t *)(x)) = le32_to_cpup((x)); } while (0)