sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

414

input->scale_ratio_depth.lb_depth = 30; break;

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

416

input->scale_ratio_depth.lb_depth = 36; break;

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

418

input->scale_ratio_depth.lb_depth = 24; break;

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1571

pipes[pipe_cnt].pipe.scale_ratio_depth.lb_depth = dm_lb_16;

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1669

pipes[pipe_cnt].pipe.scale_ratio_depth.lb_depth = dm_lb_16;

sys/dev/pci/drm/amd/display/dc/dml/display_mode_lib.c

256

dml_print("DML PARAMS: lb_depth = %d\n", scale_ratio_depth->lb_depth);

sys/dev/pci/drm/amd/display/dc/dml/display_mode_structs.h

496

int lb_depth;

sys/dev/pci/drm/amd/display/dc/dml/display_mode_vba.c

713

unsigned int lb_depth;

sys/dev/pci/drm/amd/display/dc/dml/display_mode_vba.c

715

switch (scl->lb_depth) {

sys/dev/pci/drm/amd/display/dc/dml/display_mode_vba.c

717

lb_depth = 18;

sys/dev/pci/drm/amd/display/dc/dml/display_mode_vba.c

720

lb_depth = 24;

sys/dev/pci/drm/amd/display/dc/dml/display_mode_vba.c

723

lb_depth = 30;

sys/dev/pci/drm/amd/display/dc/dml/display_mode_vba.c

726

lb_depth = 36;

sys/dev/pci/drm/amd/display/dc/dml/display_mode_vba.c

729

lb_depth = 48;

sys/dev/pci/drm/amd/display/dc/dml/display_mode_vba.c

732

lb_depth = 57;

sys/dev/pci/drm/amd/display/dc/dml/display_mode_vba.c

735

lb_depth = 36;

sys/dev/pci/drm/amd/display/dc/dml/display_mode_vba.c

737

mode_lib->vba.LBBitPerPixel[mode_lib->vba.NumberOfActivePlanes] = lb_depth;

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1335

pipes[pipe_cnt++].pipe.scale_ratio_depth.lb_depth =

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1962

pipes[pipe_cnt].pipe.scale_ratio_depth.lb_depth = dm_lb_19;