sys/dev/pci/if_ixl.c

1666

val = ixl_rd(sc, I40E_PFLAN_QALLOC);

sys/dev/pci/if_ixl.c

1678

port = ixl_rd(sc, I40E_PFGEN_PORTNUM);

sys/dev/pci/if_ixl.c

1684

ari = ixl_rd(sc, I40E_GLPCI_CAPSUP);

sys/dev/pci/if_ixl.c

1688

func = ixl_rd(sc, I40E_PF_FUNC_RID);

sys/dev/pci/if_ixl.c

2294

reg = ixl_rd(sc, I40E_QRX_ENA(i));

sys/dev/pci/if_ixl.c

2298

reg = ixl_rd(sc, I40E_QTX_ENA(i));

sys/dev/pci/if_ixl.c

2478

reg = ixl_rd(sc, I40E_QINT_RQCTL(I40E_INTR_NOTX_QUEUE));

sys/dev/pci/if_ixl.c

2482

reg = ixl_rd(sc, I40E_QINT_TQCTL(I40E_INTR_NOTX_QUEUE));

sys/dev/pci/if_ixl.c

2510

reg = ixl_rd(sc, I40E_QTX_ENA(i));

sys/dev/pci/if_ixl.c

2514

reg = ixl_rd(sc, I40E_QRX_ENA(i));

sys/dev/pci/if_ixl.c

2631

r = ixl_rd(sc, reg);

sys/dev/pci/if_ixl.c

2706

reg = ixl_rd(sc, ena);

sys/dev/pci/if_ixl.c

2724

reg = ixl_rd(sc, ena);

sys/dev/pci/if_ixl.c

3127

reg = ixl_rd(sc, ena);

sys/dev/pci/if_ixl.c

3145

reg = ixl_rd(sc, ena);

sys/dev/pci/if_ixl.c

3468

icr = ixl_rd(sc, I40E_PFINT_ICR0);

sys/dev/pci/if_ixl.c

3583

prod = ixl_rd(sc, sc->sc_aq_regs->arq_head) &

sys/dev/pci/if_ixl.c

3767

while (ixl_rd(sc, sc->sc_aq_regs->atq_head) != prod) {

sys/dev/pci/if_ixl.c

4683

ixl_rd(sc, I40E_GLHMC_LANQMAX);

sys/dev/pci/if_ixl.c

4690

e->hmc_size = 1U << ixl_rd(sc, regs[i].maxcnt);

sys/dev/pci/if_ixl.c

4934

val = ixl_rd(sc, I40E_GLPCI_CNF2);

sys/dev/pci/if_ixl.c

4940

val = ixl_rd(sc, I40E_PFLAN_QALLOC);

sys/dev/pci/if_ixl.c

4950

val = ixl_rd(sc, I40E_PF_VT_PFALLOC);

sys/dev/pci/if_ixl.c

4987

val = ixl_rd(sc, I40E_GLLAN_TXPRE_QDIS(reg_block));

sys/dev/pci/if_ixl.c

5021

grst_del = ixl_rd(sc, I40E_GLGEN_RSTCTL);

sys/dev/pci/if_ixl.c

5027

reg = ixl_rd(sc, I40E_GLGEN_RSTAT);

sys/dev/pci/if_ixl.c

5039

reg = ixl_rd(sc, I40E_GLNVM_ULD);

sys/dev/pci/if_ixl.c

5060

reg = ixl_rd(sc, I40E_PFGEN_CTRL);

sys/dev/pci/if_ixl.c

5063

reg = ixl_rd(sc, I40E_PFGEN_CTRL);

sys/dev/pci/if_ixl.c

5148

return (ixl_rd(sc, r));