Symbol: isr
sys/arch/alpha/include/logout.h
215
u_int64_t isr; /* Interrupt Status Reg. */
sys/arch/alpha/include/logout.h
275
u_int64_t isr; /* Interrupt Status Reg. */
sys/arch/armv7/sunxi/sxitimer.c
210
uint32_t isr, ier, ctrl;
sys/arch/armv7/sunxi/sxitimer.c
217
isr = bus_space_read_4(sxitimer_iot, sxitimer_ioh, TIMER_ISR);
sys/arch/armv7/sunxi/sxitimer.c
218
isr |= TIMER_IRQ(TICKTIMER);
sys/arch/armv7/sunxi/sxitimer.c
219
bus_space_write_4(sxitimer_iot, sxitimer_ioh, TIMER_ISR, isr);
sys/arch/hppa/dev/ssio.c
309
int irq, isr;
sys/arch/hppa/dev/ssio.c
318
isr = bus_space_read_1(sc->sc_iot, sc->sc_ic1h, 0);
sys/arch/hppa/dev/ssio.c
319
if ((isr & 0x80) == 0)
sys/arch/hppa/include/asm.h
158
isr .reg %cr20
sys/arch/loongson/dev/bonito.c
582
uint64_t imr, isr, mask;
sys/arch/loongson/dev/bonito.c
584
isr = REGVAL(BONITO_INTISR);
sys/arch/loongson/dev/bonito.c
591
while (ISSET(isr, BONITO_INTRMASK_MASTERERR)) {
sys/arch/loongson/dev/bonito.c
593
isr = REGVAL(BONITO_INTISR);
sys/arch/loongson/dev/bonito.c
596
isr &= BONITO_INTRMASK_GPIN;
sys/arch/loongson/dev/bonito.c
598
isr &= imr;
sys/arch/loongson/dev/bonito.c
600
printf("pci interrupt: imr %04x isr %04x\n", imr, isr);
sys/arch/loongson/dev/bonito.c
602
if (isr == 0)
sys/arch/loongson/dev/bonito.c
608
REGVAL(BONITO_INTENCLR) = isr;
sys/arch/loongson/dev/bonito.c
615
if ((mask = isr & bonito_imask[frame->ipl]) != 0) {
sys/arch/loongson/dev/bonito.c
616
isr &= ~mask;
sys/arch/loongson/dev/bonito.c
623
if (isr != 0) {
sys/arch/loongson/dev/bonito.c
624
bonito_intr_dispatch(isr, 30, frame);
sys/arch/loongson/dev/bonito.c
639
uint64_t imr, isr, mask;
sys/arch/loongson/dev/bonito.c
641
isr = REGVAL(BONITO_INTISR) & LOONGSON_INTRMASK_LVL4;
sys/arch/loongson/dev/bonito.c
643
isr &= imr;
sys/arch/loongson/dev/bonito.c
645
printf("pci interrupt: imr %04x isr %04x\n", imr, isr);
sys/arch/loongson/dev/bonito.c
647
if (isr == 0)
sys/arch/loongson/dev/bonito.c
653
REGVAL(BONITO_INTENCLR) = isr;
sys/arch/loongson/dev/bonito.c
660
if ((mask = isr & bonito_imask[frame->ipl]) != 0) {
sys/arch/loongson/dev/bonito.c
661
isr &= ~mask;
sys/arch/loongson/dev/bonito.c
668
if (isr != 0) {
sys/arch/loongson/dev/bonito.c
669
bonito_intr_dispatch(isr,
sys/arch/loongson/dev/bonito.c
684
bonito_intr_dispatch(uint64_t isr, int startbit, struct trapframe *frame)
sys/arch/loongson/dev/bonito.c
693
tmpisr = isr & (bonito_imask[lvl] ^ bonito_imask[lvl - 1]);
sys/arch/loongson/dev/bonito.c
723
if ((isr ^= mask) == 0)
sys/arch/loongson/dev/voyager.c
211
uint32_t isr, imr, mask, bitno;
sys/arch/loongson/dev/voyager.c
214
isr = bus_space_read_4(sc->sc_mmiot, sc->sc_mmioh, VOYAGER_ISR);
sys/arch/loongson/dev/voyager.c
217
isr &= imr;
sys/arch/loongson/dev/voyager.c
218
if (isr == 0)
sys/arch/loongson/dev/voyager.c
221
for (bitno = 0, mask = 1 << 0; isr != 0; bitno++, mask <<= 1) {
sys/arch/loongson/dev/voyager.c
222
if ((isr & mask) == 0)
sys/arch/loongson/dev/voyager.c
224
isr ^= mask;
sys/arch/loongson/loongson/generic2e_machdep.c
242
uint64_t isr, mask = 0;
sys/arch/loongson/loongson/generic2e_machdep.c
270
isr = 1UL << irq;
sys/arch/loongson/loongson/generic2e_machdep.c
271
loongson_set_isa_imr(loongson_isaimr & ~isr);
sys/arch/loongson/loongson/generic2e_machdep.c
277
if ((isr & BONITO_ISA_MASK(bonito_imask[frame->ipl])) != 0)
sys/arch/loongson/loongson/generic2e_machdep.c
280
mask |= isr;
sys/arch/loongson/loongson/loongson3_intr.c
371
uint32_t imr, isr, mask;
sys/arch/loongson/loongson/loongson3_intr.c
379
isr = REGVAL(LS3_IRT_INTISR(0));
sys/arch/loongson/loongson/loongson3_intr.c
382
isr &= imr;
sys/arch/loongson/loongson/loongson3_intr.c
383
if (isr == 0)
sys/arch/loongson/loongson/loongson3_intr.c
387
REGVAL(LS3_IRT_INTENCLR(0)) = isr;
sys/arch/loongson/loongson/loongson3_intr.c
389
if ((mask = isr & loongson3_imask[frame->ipl]) != 0) {
sys/arch/loongson/loongson/loongson3_intr.c
390
isr &= ~mask;
sys/arch/loongson/loongson/loongson3_intr.c
393
if (isr == 0)
sys/arch/loongson/loongson/loongson3_intr.c
398
while ((irq = next_irq(&isr)) >= 0) {
sys/arch/loongson/loongson/loongson3_intr.c
444
uint32_t imr, isr, mask;
sys/arch/loongson/loongson/loongson3_intr.c
452
isr = HT_REGVAL(LS3_HT_ISR_OFFSET(0));
sys/arch/loongson/loongson/loongson3_intr.c
455
isr &= imr;
sys/arch/loongson/loongson/loongson3_intr.c
456
if (isr == 0)
sys/arch/loongson/loongson/loongson3_intr.c
462
if ((mask = isr & loongson3_ht_imask[frame->ipl]) != 0) {
sys/arch/loongson/loongson/loongson3_intr.c
463
isr &= ~mask;
sys/arch/loongson/loongson/loongson3_intr.c
466
if (isr == 0)
sys/arch/loongson/loongson/loongson3_intr.c
470
HT_REGVAL(LS3_HT_ISR_OFFSET(0)) = isr;
sys/arch/loongson/loongson/loongson3_intr.c
474
while ((irq = next_irq(&isr)) >= 0) {
sys/arch/loongson/loongson/loongson3_intr.c
56
next_irq(uint32_t *isr)
sys/arch/loongson/loongson/loongson3_intr.c
58
uint64_t tmp = *isr;
sys/arch/loongson/loongson/loongson3_intr.c
72
*isr &= ~(1u << irq);
sys/arch/loongson/loongson/yeeloong_machdep.c
346
uint64_t imr, isr, mask;
sys/arch/loongson/loongson/yeeloong_machdep.c
351
isr = lemote_get_isa_isr();
sys/arch/loongson/loongson/yeeloong_machdep.c
354
isr &= imr;
sys/arch/loongson/loongson/yeeloong_machdep.c
355
isr &= ~(1 << 2); /* cascade */
sys/arch/loongson/loongson/yeeloong_machdep.c
357
printf("isa interrupt: imr %04x isr %04x\n", imr, isr);
sys/arch/loongson/loongson/yeeloong_machdep.c
359
if (isr == 0)
sys/arch/loongson/loongson/yeeloong_machdep.c
366
loongson_set_isa_imr(imr & ~isr);
sys/arch/loongson/loongson/yeeloong_machdep.c
372
if ((mask = isr & (BONITO_ISA_MASK(bonito_imask[frame->ipl]))) != 0) {
sys/arch/loongson/loongson/yeeloong_machdep.c
373
isr &= ~mask;
sys/arch/loongson/loongson/yeeloong_machdep.c
380
if (isr != 0) {
sys/arch/loongson/loongson/yeeloong_machdep.c
387
tmpisr = isr & BONITO_ISA_MASK(bonito_imask[lvl] ^
sys/arch/loongson/loongson/yeeloong_machdep.c
423
if ((isr ^= mask) == 0)
sys/arch/luna88k/luna88k/isr.c
144
struct isr_autovec *isr;
sys/arch/luna88k/luna88k/isr.c
163
LIST_FOREACH(isr, list, isr_link) {
sys/arch/luna88k/luna88k/isr.c
165
if (isr->isr_ipl < IPL_CLOCK)
sys/arch/luna88k/luna88k/isr.c
168
rc = (*isr->isr_func)(isr->isr_arg);
sys/arch/luna88k/luna88k/isr.c
170
if (isr->isr_ipl < IPL_CLOCK)
sys/arch/luna88k/luna88k/isr.c
174
isr->isr_count.ec_count++;
sys/arch/macppc/dev/kiic.c
194
u_int isr, x;
sys/arch/macppc/dev/kiic.c
196
isr = kiic_readreg(sc, ISR);
sys/arch/macppc/dev/kiic.c
197
if (isr & I2C_INT_ADDR) {
sys/arch/macppc/dev/kiic.c
218
if (isr & I2C_INT_DATA) {
sys/arch/macppc/dev/kiic.c
248
if (isr & I2C_INT_STOP) {
sys/arch/macppc/dev/kiic.c
253
kiic_writereg(sc, ISR, isr);
sys/arch/octeon/dev/octcib.c
278
uint64_t en, isr, mask;
sys/arch/octeon/dev/octcib.c
286
isr = CIB_RAW_RD(sc);
sys/arch/octeon/dev/octcib.c
287
isr &= en;
sys/arch/octeon/dev/octcib.c
289
for (bit = 0; isr != 0 && bit < sc->sc_maxbits; bit++) {
sys/arch/octeon/dev/octcib.c
292
if ((isr & mask) == 0)
sys/arch/octeon/dev/octcib.c
294
isr &= ~mask;
sys/arch/octeon/dev/octciu.c
440
octciu_next_irq(uint64_t *isr)
sys/arch/octeon/dev/octciu.c
442
uint64_t irq, tmp = *isr;
sys/arch/octeon/dev/octciu.c
455
*isr &= ~(1u << irq);
sys/arch/octeon/dev/octciu.c
469
uint64_t imr, isr, mask;
sys/arch/octeon/dev/octciu.c
476
isr = bus_space_read_8(sc->sc_iot, sc->sc_ioh, bank->sum);
sys/arch/octeon/dev/octciu.c
479
isr &= imr;
sys/arch/octeon/dev/octciu.c
480
if (isr == 0)
sys/arch/octeon/dev/octciu.c
486
bus_space_write_8(sc->sc_iot, sc->sc_ioh, bank->en, imr & ~isr);
sys/arch/octeon/dev/octciu.c
492
if ((mask = isr & scpu->scpu_imask[frame->ipl][bank->id])
sys/arch/octeon/dev/octciu.c
494
isr &= ~mask;
sys/arch/octeon/dev/octciu.c
497
if (isr == 0)
sys/arch/octeon/dev/octciu.c
506
while ((irq = octciu_next_irq(&isr)) >= 0) {
sys/arch/octeon/dev/octmmc.c
455
uint64_t isr;
sys/arch/octeon/dev/octmmc.c
458
isr = MMC_RD_8(sc, MIO_EMM_INT);
sys/arch/octeon/dev/octmmc.c
459
if (isr == 0)
sys/arch/octeon/dev/octmmc.c
461
MMC_WR_8(sc, MIO_EMM_INT, isr);
sys/arch/octeon/dev/octmmc.c
463
if (ISSET(isr, MIO_EMM_INT_CMD_DONE) ||
sys/arch/octeon/dev/octmmc.c
464
ISSET(isr, MIO_EMM_INT_CMD_ERR) ||
sys/arch/octeon/dev/octmmc.c
465
ISSET(isr, MIO_EMM_INT_DMA_DONE) ||
sys/arch/octeon/dev/octmmc.c
466
ISSET(isr, MIO_EMM_INT_DMA_ERR)) {
sys/arch/octeon/dev/octmmc.c
468
sc->sc_intr_status |= isr;
sys/dev/fdt/cduart.c
201
uint32_t cr, isr;
sys/dev/fdt/cduart.c
220
isr = cduart_read(sc, CDUART_ISR);
sys/dev/fdt/cduart.c
221
cduart_write(sc, CDUART_ISR, isr);
sys/dev/fdt/cduart.c
273
uint32_t isr, sr;
sys/dev/fdt/cduart.c
279
isr = cduart_read(sc, CDUART_ISR);
sys/dev/fdt/cduart.c
280
cduart_write(sc, CDUART_ISR, isr);
sys/dev/fdt/cduart.c
282
if ((isr & CDUART_IXR_TXEMPTY) && (tp->t_state & TS_BUSY)) {
sys/dev/fdt/cduart.c
288
if (isr & (CDUART_IXR_TOUT | CDUART_IXR_RTRIG)) {
sys/dev/fdt/cduart.c
311
if (isr & CDUART_IXR_RXOVR) {
sys/dev/fdt/if_cad.c
1276
uint32_t isr;
sys/dev/fdt/if_cad.c
1278
isr = HREAD4(sc, GEM_ISR);
sys/dev/fdt/if_cad.c
1279
HWRITE4(sc, GEM_ISR, isr);
sys/dev/fdt/if_cad.c
1281
if (isr & GEM_IXR_RXDONE)
sys/dev/fdt/if_cad.c
1283
if (isr & GEM_IXR_TXDONE)
sys/dev/fdt/if_cad.c
1286
if (isr & GEM_IXR_RXOVR)
sys/dev/fdt/if_cad.c
1289
if (sc->sc_rxhang_erratum && (isr & GEM_IXR_RXUSED)) {
sys/dev/fdt/if_cad.c
1299
if (isr & GEM_IXR_HRESP) {
sys/dev/fdt/virtio_mmio.c
522
int isr, r = 0;
sys/dev/fdt/virtio_mmio.c
525
isr = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
sys/dev/fdt/virtio_mmio.c
528
VIRTIO_MMIO_INTERRUPT_ACK, isr);
sys/dev/fdt/virtio_mmio.c
529
if ((isr & VIRTIO_MMIO_INT_CONFIG) &&
sys/dev/fdt/virtio_mmio.c
532
if ((isr & VIRTIO_MMIO_INT_VRING))
sys/dev/ic/aic6915.c
573
uint32_t isr;
sys/dev/ic/aic6915.c
578
isr = sf_funcreg_read(sc, SF_InterruptStatus);
sys/dev/ic/aic6915.c
579
if ((isr & IS_PCIPadInt) == 0)
sys/dev/ic/aic6915.c
585
if (isr & IS_RxQ1DoneInt)
sys/dev/ic/aic6915.c
589
if (isr & (IS_TxDmaDoneInt|IS_TxQueueDoneInt))
sys/dev/ic/aic6915.c
593
if (isr & IS_AbnormalInterrupt) {
sys/dev/ic/aic6915.c
595
if (isr & IS_StatisticWrapInt)
sys/dev/ic/aic6915.c
599
if (isr & IS_DmaErrInt) {
sys/dev/ic/aic6915.c
606
if (isr & IS_TxDataLowInt) {
sys/dev/ic/am7990.c
382
uint16_t isr;
sys/dev/ic/am7990.c
384
isr = (*sc->sc_rdcsr)(sc, LE_CSR0) | sc->sc_saved_csr0;
sys/dev/ic/am7990.c
389
sc->sc_dev.dv_xname, isr);
sys/dev/ic/am7990.c
391
if ((isr & LE_C0_INTR) == 0)
sys/dev/ic/am7990.c
399
(*sc->sc_wrcsr)(sc, LE_CSR0, isr & ~LE_C0_INEA);
sys/dev/ic/am7990.c
402
if (isr & LE_C0_ERR) {
sys/dev/ic/am7990.c
403
if (isr & LE_C0_BABL) {
sys/dev/ic/am7990.c
410
if (isr & LE_C0_CERR) {
sys/dev/ic/am7990.c
415
if (isr & LE_C0_MISS) {
sys/dev/ic/am7990.c
421
if (isr & LE_C0_MERR) {
sys/dev/ic/am7990.c
428
if ((isr & LE_C0_RXON) == 0) {
sys/dev/ic/am7990.c
434
if ((isr & LE_C0_TXON) == 0) {
sys/dev/ic/am7990.c
447
if (isr & LE_C0_RINT)
sys/dev/ic/am7990.c
449
if (isr & LE_C0_TINT)
sys/dev/ic/am79900.c
409
uint16_t isr;
sys/dev/ic/am79900.c
411
isr = (*sc->sc_rdcsr)(sc, LE_CSR0) | sc->sc_saved_csr0;
sys/dev/ic/am79900.c
416
sc->sc_dev.dv_xname, isr);
sys/dev/ic/am79900.c
418
if ((isr & LE_C0_INTR) == 0)
sys/dev/ic/am79900.c
422
isr & (LE_C0_INEA | LE_C0_BABL | LE_C0_MISS | LE_C0_MERR |
sys/dev/ic/am79900.c
424
if (isr & LE_C0_ERR) {
sys/dev/ic/am79900.c
425
if (isr & LE_C0_BABL) {
sys/dev/ic/am79900.c
432
if (isr & LE_C0_CERR) {
sys/dev/ic/am79900.c
438
if (isr & LE_C0_MISS) {
sys/dev/ic/am79900.c
444
if (isr & LE_C0_MERR) {
sys/dev/ic/am79900.c
451
if ((isr & LE_C0_RXON) == 0) {
sys/dev/ic/am79900.c
457
if ((isr & LE_C0_TXON) == 0) {
sys/dev/ic/am79900.c
470
if (isr & LE_C0_RINT)
sys/dev/ic/am79900.c
472
if (isr & LE_C0_TINT)
sys/dev/ic/dc.c
1173
u_int32_t isr;
sys/dev/ic/dc.c
1183
isr = CSR_READ_4(sc, DC_ISR);
sys/dev/ic/dc.c
1184
if (isr & DC_ISR_TX_IDLE &&
sys/dev/ic/dc.c
1185
((isr & DC_ISR_RX_STATE) == DC_RXSTATE_STOPPED ||
sys/dev/ic/dc.c
1186
(isr & DC_ISR_RX_STATE) == DC_RXSTATE_WAIT))
sys/dev/ic/dc.c
1192
if (!(isr & DC_ISR_TX_IDLE) && !DC_IS_ASIX(sc))
sys/dev/ic/dc.c
1195
if (!((isr & DC_ISR_RX_STATE) == DC_RXSTATE_STOPPED ||
sys/dev/ic/dc.c
1196
(isr & DC_ISR_RX_STATE) == DC_RXSTATE_WAIT) &&
sys/dev/ic/dc.c
2377
u_int32_t isr;
sys/dev/ic/dc.c
2392
isr = CSR_READ_4(sc, DC_ISR);
sys/dev/ic/dc.c
2393
if (isr & DC_ISR_TX_IDLE)
sys/dev/ic/dc.c
2972
u_int32_t isr;
sys/dev/ic/dc.c
2987
isr = CSR_READ_4(sc, DC_ISR);
sys/dev/ic/dc.c
2988
if ((isr & DC_ISR_TX_IDLE ||
sys/dev/ic/dc.c
2989
(isr & DC_ISR_TX_STATE) == DC_TXSTATE_RESET) &&
sys/dev/ic/dc.c
2990
(isr & DC_ISR_RX_STATE) == DC_RXSTATE_STOPPED)
sys/dev/ic/dc.c
2996
if (!((isr & DC_ISR_TX_IDLE) ||
sys/dev/ic/dc.c
2997
(isr & DC_ISR_TX_STATE) == DC_TXSTATE_RESET) &&
sys/dev/ic/dc.c
3001
if (!((isr & DC_ISR_RX_STATE) == DC_RXSTATE_STOPPED) &&
sys/dev/ic/dp8390.c
617
u_char isr;
sys/dev/ic/dp8390.c
628
isr = NIC_GET(regt, regh, ED_P0_ISR);
sys/dev/ic/dp8390.c
629
if (!isr)
sys/dev/ic/dp8390.c
639
NIC_PUT(regt, regh, ED_P0_ISR, isr);
sys/dev/ic/dp8390.c
643
while ((NIC_GET(regt, regh, ED_P0_ISR) & isr) != 0) {
sys/dev/ic/dp8390.c
645
NIC_PUT(regt, regh, ED_P0_ISR, isr);
sys/dev/ic/dp8390.c
656
if (isr & (ED_ISR_PTX | ED_ISR_TXE) &&
sys/dev/ic/dp8390.c
670
if (isr & ED_ISR_TXE) {
sys/dev/ic/dp8390.c
719
if (isr & (ED_ISR_PRX | ED_ISR_RXE | ED_ISR_OVW)) {
sys/dev/ic/dp8390.c
729
if (isr & ED_ISR_OVW) {
sys/dev/ic/dp8390.c
744
if (isr & ED_ISR_RXE) {
sys/dev/ic/dp8390.c
793
if (isr & ED_ISR_CNT) {
sys/dev/ic/dp8390.c
799
isr = NIC_GET(regt, regh, ED_P0_ISR);
sys/dev/ic/dp8390.c
800
if (!isr)
sys/dev/ic/qla.c
1048
u_int16_t isr, info;
sys/dev/ic/qla.c
1052
if (qla_read_isr(sc, &isr, &info) == 0) {
sys/dev/ic/qla.c
1056
if (isr != QLA_INT_TYPE_IO) {
sys/dev/ic/qla.c
1057
qla_handle_intr(sc, isr, info);
sys/dev/ic/qla.c
1075
qla_clear_isr(sc, isr);
sys/dev/ic/qla.c
1154
u_int16_t isr, info;
sys/dev/ic/qla.c
1158
if (qla_read_isr(sc, &isr, &info) == 0)
sys/dev/ic/qla.c
1161
switch (isr) {
sys/dev/ic/qla.c
1167
qla_handle_intr(sc, isr, info);
sys/dev/ic/qla.c
1233
qla_read_isr_1G(struct qla_softc *sc, u_int16_t *isr, u_int16_t *info)
sys/dev/ic/qla.c
1240
*isr = QLA_INT_TYPE_MBOX;
sys/dev/ic/qla.c
1242
*isr = QLA_INT_TYPE_ASYNC;
sys/dev/ic/qla.c
1248
*isr = QLA_INT_TYPE_IO;
sys/dev/ic/qla.c
1255
qla_read_isr_2G(struct qla_softc *sc, u_int16_t *isr, u_int16_t *info)
sys/dev/ic/qla.c
1271
*isr = QLA_INT_TYPE_MBOX;
sys/dev/ic/qla.c
1275
*isr = QLA_INT_TYPE_ASYNC;
sys/dev/ic/qla.c
1279
*isr = QLA_INT_TYPE_IO;
sys/dev/ic/qla.c
1283
*isr = QLA_INT_TYPE_OTHER;
sys/dev/ic/qla.c
1293
qla_clear_isr(struct qla_softc *sc, u_int16_t isr)
sys/dev/ic/qla.c
1296
switch (isr) {
sys/dev/ic/qla.c
655
u_int16_t isr, info;
sys/dev/ic/qla.c
659
if (qla_read_isr(sc, &isr, &info) == 0)
sys/dev/ic/qla.c
662
qla_handle_intr(sc, isr, info);
sys/dev/ic/qla.c
854
qla_handle_intr(struct qla_softc *sc, u_int16_t isr, u_int16_t info)
sys/dev/ic/qla.c
860
switch (isr) {
sys/dev/ic/qla.c
925
qla_clear_isr(sc, isr);
sys/dev/ic/qla.c
932
u_int16_t isr;
sys/dev/ic/qla.c
935
if (qla_read_isr(sc, &isr, &info) == 0)
sys/dev/ic/qla.c
938
qla_handle_intr(sc, isr, info);
sys/dev/ic/qlw.c
1006
u_int16_t isr, info;
sys/dev/ic/qlw.c
1010
if (qlw_read_isr(sc, &isr, &info) == 0)
sys/dev/ic/qlw.c
1013
switch (isr) {
sys/dev/ic/qlw.c
1019
qlw_handle_intr(sc, isr, info);
sys/dev/ic/qlw.c
1071
qlw_read_isr(struct qlw_softc *sc, u_int16_t *isr, u_int16_t *info)
sys/dev/ic/qlw.c
1078
*isr = QLW_INT_TYPE_MBOX;
sys/dev/ic/qlw.c
1080
*isr = QLW_INT_TYPE_ASYNC;
sys/dev/ic/qlw.c
1086
*isr = QLW_INT_TYPE_IO;
sys/dev/ic/qlw.c
1093
qlw_clear_isr(struct qlw_softc *sc, u_int16_t isr)
sys/dev/ic/qlw.c
1096
switch (isr) {
sys/dev/ic/qlw.c
712
qlw_handle_intr(struct qlw_softc *sc, u_int16_t isr, u_int16_t info)
sys/dev/ic/qlw.c
718
switch (isr) {
sys/dev/ic/qlw.c
721
qlw_clear_isr(sc, isr);
sys/dev/ic/qlw.c
725
qlw_clear_isr(sc, isr);
sys/dev/ic/qlw.c
776
qlw_clear_isr(sc, isr);
sys/dev/ic/qlw.c
789
u_int16_t isr;
sys/dev/ic/qlw.c
792
if (qlw_read_isr(sc, &isr, &info) == 0)
sys/dev/ic/qlw.c
795
qlw_handle_intr(sc, isr, info);
sys/dev/ic/qlw.c
911
u_int16_t isr, info;
sys/dev/ic/qlw.c
915
if (qlw_read_isr(sc, &isr, &info) == 0) {
sys/dev/ic/qlw.c
919
if (isr != QLW_INT_TYPE_IO) {
sys/dev/ic/qlw.c
920
qlw_handle_intr(sc, isr, info);
sys/dev/ic/qlw.c
924
qlw_clear_isr(sc, isr);
sys/dev/ic/rtw.c
1075
rtw_intr_rx(struct rtw_softc *sc, u_int16_t isr)
sys/dev/ic/rtw.c
1439
rtw_intr_tx(struct rtw_softc *sc, u_int16_t isr)
sys/dev/ic/rtw.c
1453
if ((isr & RTW_INTR_TX) != 0)
sys/dev/ic/rtw.c
1459
rtw_intr_beacon(struct rtw_softc *sc, u_int16_t isr)
sys/dev/ic/rtw.c
1471
if ((isr & (RTW_INTR_TBDOK|RTW_INTR_TBDER)) != 0) {
sys/dev/ic/rtw.c
1476
(next == tdb->tdb_next) ? "" : "un", isr, next,
sys/dev/ic/rtw.c
1485
if ((isr & RTW_INTR_BCNINT) != 0 &&
sys/dev/ic/rtw.c
1490
", %16llu\n", __func__, isr,
sys/dev/ic/rtw.c
1685
rtw_intr_ioerror(struct rtw_softc *sc, u_int16_t isr)
sys/dev/ic/rtw.c
1691
if ((isr & RTW_INTR_TXFOVW) != 0) {
sys/dev/ic/rtw.c
1698
if ((isr & (RTW_INTR_RDU|RTW_INTR_RXFOVW)) != 0) {
sys/dev/ic/rtw.c
1704
"\n", sc->sc_dev.dv_xname, isr));
sys/dev/ic/rtw.c
1784
u_int16_t isr;
sys/dev/ic/rtw.c
1799
isr = RTW_READ16(regs, RTW_ISR);
sys/dev/ic/rtw.c
1801
RTW_WRITE16(regs, RTW_ISR, isr);
sys/dev/ic/rtw.c
1807
if (isr == 0)
sys/dev/ic/rtw.c
1812
if ((isr & flag) != 0) { \
sys/dev/ic/rtw.c
1818
if ((rtw_debug & RTW_DEBUG_INTR) != 0 && isr != 0) {
sys/dev/ic/rtw.c
1821
printf("%s: reg[ISR] = %x", sc->sc_dev.dv_xname, isr);
sys/dev/ic/rtw.c
1845
if ((isr & RTW_INTR_RX) != 0)
sys/dev/ic/rtw.c
1846
rtw_intr_rx(sc, isr & RTW_INTR_RX);
sys/dev/ic/rtw.c
1847
if ((isr & RTW_INTR_TX) != 0)
sys/dev/ic/rtw.c
1848
rtw_intr_tx(sc, isr & RTW_INTR_TX);
sys/dev/ic/rtw.c
1850
if ((isr & RTW_INTR_BEACON) != 0)
sys/dev/ic/rtw.c
1851
rtw_intr_beacon(sc, isr & RTW_INTR_BEACON);
sys/dev/ic/rtw.c
1852
if ((isr & RTW_INTR_ATIMINT) != 0)
sys/dev/ic/rtw.c
1855
if ((isr & RTW_INTR_IOERROR) != 0)
sys/dev/ic/rtw.c
1856
rtw_intr_ioerror(sc, isr & RTW_INTR_IOERROR);
sys/dev/ic/rtw.c
1857
if ((isr & RTW_INTR_TIMEOUT) != 0)
sys/dev/pci/drm/i915/display/intel_overlay.c
1478
u32 isr;
sys/dev/pci/drm/i915/display/intel_overlay.c
1495
error->isr = intel_de_read(display, GEN2_ISR);
sys/dev/pci/drm/i915/display/intel_overlay.c
1511
error->dovsta, error->isr);
sys/dev/pci/drm/i915/gvt/interrupt.c
381
u32 isr = i915_mmio_reg_offset(up_irq_info->reg_base);
sys/dev/pci/drm/i915/gvt/interrupt.c
383
vgpu_vreg(vgpu, isr) &= ~clear_bits;
sys/dev/pci/drm/i915/gvt/interrupt.c
384
vgpu_vreg(vgpu, isr) |= set_bits;
sys/dev/pci/if_aq_pci.c
1272
int (*isr)(void *);
sys/dev/pci/if_aq_pci.c
1306
isr = aq_intr;
sys/dev/pci/if_aq_pci.c
1320
isr = aq_intr_link;
sys/dev/pci/if_aq_pci.c
1334
IPL_NET | IPL_MPSAFE, isr, sc, self->dv_xname);
sys/dev/pci/if_stge.c
712
uint16_t isr;
sys/dev/pci/if_stge.c
718
isr = CSR_READ_2(sc, STGE_IntStatusAck);
sys/dev/pci/if_stge.c
719
if ((isr & sc->sc_IntEnable) == 0)
sys/dev/pci/if_stge.c
723
if (isr & IS_HostError) {
sys/dev/pci/if_stge.c
731
if (isr & (IS_RxDMAComplete|IS_RFDListEnd)) {
sys/dev/pci/if_stge.c
733
if (isr & IS_RFDListEnd) {
sys/dev/pci/if_stge.c
745
if (isr & (IS_TxDMAComplete|IS_TxComplete))
sys/dev/pci/if_stge.c
749
if (isr & IS_UpdateStats)
sys/dev/pci/if_stge.c
753
if (isr & IS_TxComplete) {
sys/dev/pci/if_tht.c
822
u_int32_t isr;
sys/dev/pci/if_tht.c
829
isr = tht_read(sc, THT_REG_ISR);
sys/dev/pci/if_tht.c
830
if (isr == 0x0) {
sys/dev/pci/if_tht.c
836
DPRINTF(THT_D_INTR, "%s: isr: 0x%b\n", DEVNAME(sc), isr, THT_FMT_ISR);
sys/dev/pci/if_tht.c
838
if (ISSET(isr, THT_REG_ISR_LINKCHG(0) | THT_REG_ISR_LINKCHG(1)))
sys/dev/pci/if_tht.c
843
if (ISSET(isr, THT_REG_ISR_RXD(0)))
sys/dev/pci/if_tht.c
846
if (ISSET(isr, THT_REG_ISR_RXF(0)))
sys/dev/pci/if_tht.c
849
if (ISSET(isr, THT_REG_ISR_TXF(0)))
sys/dev/pci/if_txp.c
539
u_int32_t isr;
sys/dev/pci/if_txp.c
552
isr = READ_REG(sc, TXP_ISR);
sys/dev/pci/if_txp.c
553
while (isr) {
sys/dev/pci/if_txp.c
555
WRITE_REG(sc, TXP_ISR, isr);
sys/dev/pci/if_txp.c
573
isr = READ_REG(sc, TXP_ISR);
sys/dev/pci/if_vmx.c
264
int (*isr)(void *);
sys/dev/pci/if_vmx.c
305
isr = vmxnet3_intr;
sys/dev/pci/if_vmx.c
318
isr = vmxnet3_intr_event;
sys/dev/pci/if_vmx.c
334
isr = vmxnet3_intr_intx;
sys/dev/pci/if_vmx.c
343
isr, sc, self->dv_xname);
sys/dev/pci/qle.c
1200
qle_handle_intr(struct qle_softc *sc, u_int16_t isr, u_int16_t info)
sys/dev/pci/qle.c
1206
switch (isr) {
sys/dev/pci/qle.c
1248
qle_clear_isr(sc, isr);
sys/dev/pci/qle.c
1255
u_int16_t isr;
sys/dev/pci/qle.c
1258
if (qle_read_isr(sc, &isr, &info) == 0)
sys/dev/pci/qle.c
1261
qle_handle_intr(sc, isr, info);
sys/dev/pci/qle.c
1381
u_int16_t isr, info;
sys/dev/pci/qle.c
1385
if (qle_read_isr(sc, &isr, &info) == 0) {
sys/dev/pci/qle.c
1389
if (isr != QLE_INT_TYPE_IO) {
sys/dev/pci/qle.c
1390
qle_handle_intr(sc, isr, info);
sys/dev/pci/qle.c
1408
qle_clear_isr(sc, isr);
sys/dev/pci/qle.c
1493
u_int16_t isr, info;
sys/dev/pci/qle.c
1497
if (qle_read_isr(sc, &isr, &info) == 0)
sys/dev/pci/qle.c
1500
switch (isr) {
sys/dev/pci/qle.c
1506
qle_handle_intr(sc, isr, info);
sys/dev/pci/qle.c
1543
qle_read_isr(struct qle_softc *sc, u_int16_t *isr, u_int16_t *info)
sys/dev/pci/qle.c
1560
*isr = QLE_INT_TYPE_MBOX;
sys/dev/pci/qle.c
1564
*isr = QLE_INT_TYPE_ASYNC;
sys/dev/pci/qle.c
1568
*isr = QLE_INT_TYPE_IO;
sys/dev/pci/qle.c
1572
*isr = QLE_INT_TYPE_OTHER;
sys/dev/pci/qle.c
1585
qle_clear_isr(struct qle_softc *sc, u_int16_t isr)
sys/dev/pci/qle.c
1867
u_int16_t isr, info;
sys/dev/pci/qle.c
1870
if (qle_read_isr(sc, &isr, &info) != 0)
sys/dev/pci/qle.c
1871
qle_handle_intr(sc, isr, info);
sys/dev/pci/qle.c
1996
u_int16_t isr, info;
sys/dev/pci/qle.c
1999
if (qle_read_isr(sc, &isr, &info) != 0)
sys/dev/pci/qle.c
2000
qle_handle_intr(sc, isr, info);
sys/dev/pci/qle.c
623
u_int16_t isr, info;
sys/dev/pci/qle.c
633
if (qle_read_isr(sc, &isr, &info) == 0)
sys/dev/pci/qle.c
636
qle_handle_intr(sc, isr, info);
sys/dev/pci/virtio_pci.c
1148
int isr, r = 0;
sys/dev/pci/virtio_pci.c
1151
isr = bus_space_read_1(sc->sc_isr_iot, sc->sc_isr_ioh, 0);
sys/dev/pci/virtio_pci.c
1152
if (isr == 0)
sys/dev/pci/virtio_pci.c
1155
if ((isr & VIRTIO_CONFIG_ISR_CONFIG_CHANGE) &&
sys/dev/pci/virtio_pci.c
1170
int isr, r = 0;
sys/dev/pci/virtio_pci.c
1173
isr = bus_space_read_1(sc->sc_isr_iot, sc->sc_isr_ioh, 0);
sys/dev/pci/virtio_pci.c
1174
if (isr == 0)
sys/dev/pci/virtio_pci.c
1176
if ((isr & VIRTIO_CONFIG_ISR_CONFIG_CHANGE) &&
sys/dev/pci/virtio_pci.c
446
struct virtio_pci_cap common, isr, device;
sys/dev/pci/virtio_pci.c
451
struct virtio_pci_cap *caps[] = { &common, &isr, &device, &notify.cap };
sys/dev/pci/virtio_pci.c
459
if (virtio_pci_find_cap(sc, VIRTIO_PCI_CAP_ISR_CFG, &isr, sizeof(isr)) != 0)
sys/dev/pci/virtio_pci.c
526
i = bars_idx[isr.bar];
sys/dev/pci/virtio_pci.c
528
isr.offset, isr.length, &sc->sc_isr_ioh) != 0) {
sys/dev/pci/virtio_pci.c
534
sc->sc_isr_iosize = isr.length;
sys/dev/pci/vmwpvs.c
401
int (*isr)(void *) = vmwpvs_intx;
sys/dev/pci/vmwpvs.c
439
isr = vmwpvs_intr;
sys/dev/pci/vmwpvs.c
529
isr, sc, DEVNAME(sc));
sys/dev/pcmcia/if_xe.c
615
u_int8_t esr, rsr, isr, rx_status, savedpage;
sys/dev/pcmcia/if_xe.c
631
isr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + ISR0);
sys/dev/pcmcia/if_xe.c
635
if (isr == 0xff) {
sys/netinet/ip_input.c
1436
struct ip_srcrt *isr;
sys/netinet/ip_input.c
1441
if (olen > sizeof(isr->isr_hdr) + sizeof(isr->isr_routes))
sys/netinet/ip_input.c
1444
mtag = m_tag_get(PACKET_TAG_SRCROUTE, sizeof(*isr), M_NOWAIT);
sys/netinet/ip_input.c
1449
isr = (struct ip_srcrt *)(mtag + 1);
sys/netinet/ip_input.c
1451
memcpy(isr->isr_hdr, option, olen);
sys/netinet/ip_input.c
1452
isr->isr_nhops = (olen - IPOPT_OFFSET - 1) / sizeof(struct in_addr);
sys/netinet/ip_input.c
1453
isr->isr_dst = dst;
sys/netinet/ip_input.c
1467
struct ip_srcrt *isr;
sys/netinet/ip_input.c
1476
isr = (struct ip_srcrt *)(mtag + 1);
sys/netinet/ip_input.c
1478
if (isr->isr_nhops == 0)
sys/netinet/ip_input.c
1486
#define OPTSIZ (sizeof(isr->isr_nop) + sizeof(isr->isr_hdr))
sys/netinet/ip_input.c
1489
m->m_len = (isr->isr_nhops + 1) * sizeof(struct in_addr) + OPTSIZ;
sys/netinet/ip_input.c
1494
p = &(isr->isr_routes[isr->isr_nhops - 1]);
sys/netinet/ip_input.c
1500
isr->isr_nop = IPOPT_NOP;
sys/netinet/ip_input.c
1501
isr->isr_hdr[IPOPT_OFFSET] = IPOPT_MINOFF;
sys/netinet/ip_input.c
1502
memcpy(mtod(m, caddr_t) + sizeof(struct in_addr), &isr->isr_nop,
sys/netinet/ip_input.c
1511
while (p >= isr->isr_routes) {
sys/netinet/ip_input.c
1517
*q = isr->isr_dst;
sys/netinet/ip_input.c
1518
m_tag_delete(m0, (struct m_tag *)isr);
usr.sbin/vmd/i8259.c
162
pics[MASTER].isr |= (1 << i);
usr.sbin/vmd/i8259.c
186
pics[SLAVE].isr |= (1 << i);
usr.sbin/vmd/i8259.c
187
pics[MASTER].isr |= (1 << 2);
usr.sbin/vmd/i8259.c
353
if (!(pics[n].isr & (1 << (data & 0x7)))) {
usr.sbin/vmd/i8259.c
358
pics[n].isr &= ~(1 << (data & 0x7));
usr.sbin/vmd/i8259.c
36
uint8_t isr;
usr.sbin/vmd/i8259.c
373
if ((pics[n].isr & (1 << (i & 0x7)))) {
usr.sbin/vmd/i8259.c
446
pic->isr = 0;
usr.sbin/vmd/i8259.c
570
return (pic->isr);
usr.sbin/vmd/vioblk.c
363
dev->isr |= 1;
usr.sbin/vmd/vioblk.c
383
dev->isr |= VIRTIO_CONFIG_ISR_CONFIG_CHANGE;
usr.sbin/vmd/vioblk.c
574
data = dev->isr;
usr.sbin/vmd/vioblk.c
575
dev->isr = 0;
usr.sbin/vmd/vionet.c
1134
dev->isr = 0;
usr.sbin/vmd/vionet.c
1285
data = dev->isr;
usr.sbin/vmd/vionet.c
1286
dev->isr = 0;
usr.sbin/vmd/vionet.c
1486
dev->isr |= 1;
usr.sbin/vmd/vionet.c
1491
dev->isr |= VIRTIO_CONFIG_ISR_CONFIG_CHANGE;
usr.sbin/vmd/vionet.c
1527
dev->isr = 0;
usr.sbin/vmd/vionet.c
618
dev->isr |= 1;
usr.sbin/vmd/vionet.c
623
dev->isr |= VIRTIO_CONFIG_ISR_CONFIG_CHANGE;
usr.sbin/vmd/vioscsi.c
1056
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
1137
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
1185
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
1237
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
1294
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
1329
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
1369
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
1428
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
1462
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
1523
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
1567
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
1621
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
1677
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
1766
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
1802
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
1850
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
1902
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
2053
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
2277
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
413
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
608
data = dev->isr;
usr.sbin/vmd/vioscsi.c
609
dev->isr = 0;
usr.sbin/vmd/vioscsi.c
683
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
803
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
825
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
942
dev->isr = 1;
usr.sbin/vmd/vioscsi.c
964
dev->isr = 1;
usr.sbin/vmd/virtio.c
1357
dev->isr = 0;
usr.sbin/vmd/virtio.c
312
viornd.isr = 1;
usr.sbin/vmd/virtio.c
422
dev->isr = 0;
usr.sbin/vmd/virtio.c
649
*data = dev->isr;
usr.sbin/vmd/virtio.c
650
dev->isr = 0;
usr.sbin/vmd/virtio.c
749
dev->isr = VIRTIO_CONFIG_ISR_CONFIG_CHANGE;
usr.sbin/vmd/virtio.c
761
dev->isr = VIRTIO_CONFIG_ISR_CONFIG_CHANGE;
usr.sbin/vmd/virtio.c
933
*data = dev->isr;
usr.sbin/vmd/virtio.c
934
dev->isr = 0;
usr.sbin/vmd/virtio.h
356
uint8_t isr; /* isr status register [rw] */