sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

2155

} else if (!is_power_of_2(amdgpu_sched_jobs)) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

2186

} else if (!is_power_of_2(amdgpu_sched_hw_submission)) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_fence.c

484

if (!is_power_of_2(ring->num_hw_submission))

sys/dev/pci/drm/amd/amdgpu/amdgpu_userq.c

660

if (!is_power_of_2(args->in.queue_size)) {

sys/dev/pci/drm/amd/amdgpu/gmc_v12_0.c

579

if (is_power_of_2(max_tex_channel_caches))

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

209

if (!is_power_of_2(args->ring_size) && (args->ring_size != 0)) {

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

463

if (!is_power_of_2(args->ring_size) && (args->ring_size != 0)) {

sys/dev/pci/drm/drm_atomic_uapi.c

531

if (!is_power_of_2(val & DRM_MODE_ROTATE_MASK)) {

sys/dev/pci/drm/drm_blend.c

293

WARN_ON(!is_power_of_2(rotation & DRM_MODE_ROTATE_MASK));

sys/dev/pci/drm/drm_buddy.c

1132

if (!is_power_of_2(min_block_size))

sys/dev/pci/drm/drm_buddy.c

319

if (!is_power_of_2(chunk_size))

sys/dev/pci/drm/drm_mm.c

517

remainder_mask = is_power_of_2(alignment) ? alignment - 1 : 0;

sys/dev/pci/drm/drm_mm.c

734

scan->remainder_mask = is_power_of_2(alignment) ? alignment - 1 : 0;

sys/dev/pci/drm/drm_modes.c

2253

if (!is_power_of_2(rotation & DRM_MODE_ROTATE_MASK))

sys/dev/pci/drm/drm_property.c

76

if (legacy_type && !is_power_of_2(legacy_type))

sys/dev/pci/drm/drm_suballoc.c

68

BUILD_BUG_ON(!is_power_of_2(DRM_SUBALLOC_MAX_QUEUES));

sys/dev/pci/drm/i915/display/intel_bw.c

1777

bw_state->active_pipes && !is_power_of_2(bw_state->active_pipes))

sys/dev/pci/drm/i915/display/intel_bw.c

187

return !is_power_of_2(~points_mask & icl_qgv_points_mask(display) &

sys/dev/pci/drm/i915/display/intel_cdclk.c

2900

!is_power_of_2(cdclk_state->active_pipes))

sys/dev/pci/drm/i915/display/intel_cdclk.c

3304

if (is_power_of_2(new_cdclk_state->active_pipes) &&

sys/dev/pci/drm/i915/display/intel_display.c

3826

!is_power_of_2(enabled_transcoders));

sys/dev/pci/drm/i915/display/intel_dp.c

2187

drm_WARN_ON(display->drm, !is_power_of_2(bpp_step_x16));

sys/dev/pci/drm/i915/display/intel_dp.c

716

if (drm_WARN_ON(display->drm, !is_power_of_2(intel_dp_max_common_lane_count(intel_dp))))

sys/dev/pci/drm/i915/display/intel_dp_mst.c

506

drm_WARN_ON(display->drm, !is_power_of_2(bpp_step_x16));

sys/dev/pci/drm/i915/display/intel_fb.c

1676

!is_power_of_2(plane_min_alignment));

sys/dev/pci/drm/i915/display/intel_fb_pin.c

132

if (drm_WARN_ON(dev, alignment && !is_power_of_2(alignment)))

sys/dev/pci/drm/i915/display/intel_hdmi.c

2292

!is_power_of_2(crtc_state->uapi.encoder_mask);

sys/dev/pci/drm/i915/display/intel_modeset_setup.c

238

drm_WARN_ON(display->drm, !is_power_of_2(*master_pipe_mask));

sys/dev/pci/drm/i915/display/intel_pfit.c

174

!is_power_of_2(crtc_state->uapi.encoder_mask)) {

sys/dev/pci/drm/i915/display/skl_universal_plane.c

1968

if (drm_WARN_ON(display->drm, alignment && !is_power_of_2(alignment)))

sys/dev/pci/drm/i915/display/skl_watermark.c

3358

return is_power_of_2(active_pipes);

sys/dev/pci/drm/i915/display/skl_watermark.c

3505

drm_WARN_ON(display->drm, !is_power_of_2(dbuf_state->active_pipes));

sys/dev/pci/drm/i915/gem/i915_gem_create.c

28

GEM_BUG_ON(!is_power_of_2(mr->min_page_size));

sys/dev/pci/drm/i915/gem/i915_gem_tiling.c

144

if (!is_power_of_2(stride))

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

1358

GEM_BUG_ON(!is_power_of_2(min_page_size));

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

1359

GEM_BUG_ON(!is_power_of_2(max_page_size));

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

1020

GEM_BUG_ON(!is_power_of_2(execlists_num_ports(execlists)));

sys/dev/pci/drm/i915/gt/intel_execlists_submission.c

4008

GEM_BUG_ON(!is_power_of_2(sibling->mask));

sys/dev/pci/drm/i915/gt/intel_ggtt_fencing.c

127

GEM_BUG_ON(!is_power_of_2(stride));

sys/dev/pci/drm/i915/gt/intel_ppgtt.c

240

GEM_BUG_ON(!is_power_of_2(pt_sz));

sys/dev/pci/drm/i915/gt/intel_ring.c

152

GEM_BUG_ON(!is_power_of_2(size));

sys/dev/pci/drm/i915/gt/intel_ring.h

137

GEM_BUG_ON(!is_power_of_2(size));

sys/dev/pci/drm/i915/gt/intel_workarounds.c

154

GEM_BUG_ON(!is_power_of_2(grow));

sys/dev/pci/drm/i915/gt/intel_workarounds.c

560

if (!is_power_of_2(gt->info.sseu.subslice_7eu[i]))

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

5948

GEM_BUG_ON(!is_power_of_2(sibling->mask));

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

821

BUILD_BUG_ON(!is_power_of_2(WQ_SIZE));

sys/dev/pci/drm/i915/i915_gem_gtt.c

209

GEM_BUG_ON(alignment && !is_power_of_2(alignment));

sys/dev/pci/drm/i915/i915_ioctl.c

57

GEM_BUG_ON(!is_power_of_2(entry->size));

sys/dev/pci/drm/i915/i915_perf.c

891

if (is_power_of_2(report_size)) {

sys/dev/pci/drm/i915/i915_request.c

1573

is_power_of_2(to->execution_mask | READ_ONCE(from->execution_mask)))

sys/dev/pci/drm/i915/i915_request.c

173

if (is_power_of_2(rq->execution_mask) &&

sys/dev/pci/drm/i915/i915_request.c

1766

bool pow2 = is_power_of_2(READ_ONCE(prev->engine)->mask |

sys/dev/pci/drm/i915/i915_vma.c

240

GEM_BUG_ON(!is_power_of_2(vma->fence_alignment));

sys/dev/pci/drm/i915/i915_vma.c

709

GEM_BUG_ON(alignment && !is_power_of_2(alignment));

sys/dev/pci/drm/i915/i915_vma.c

819

GEM_BUG_ON(!is_power_of_2(alignment));

sys/dev/pci/drm/i915/selftests/i915_syncmap.c

523

if (!is_power_of_2(leaf->bitmap)) {

sys/dev/pci/drm/radeon/radeon_device.c

1131

if (radeon_vram_limit != 0 && !is_power_of_2(radeon_vram_limit)) {

sys/dev/pci/drm/radeon/radeon_device.c

1145

} else if (!is_power_of_2(radeon_gart_size)) {

sys/dev/pci/drm/radeon/radeon_device.c

1168

if (!is_power_of_2(radeon_vm_size)) {