sys/dev/ic/qwx.c

20642

sc->ops.irq_enable(sc);

sys/dev/ic/qwx.c

26639

sc->ops.irq_enable(sc);

sys/dev/ic/qwxvar.h

459

void (*irq_enable)(struct qwx_softc *sc);

sys/dev/ic/qwz.c

17884

sc->ops.irq_enable(sc);

sys/dev/ic/qwz.c

23397

sc->ops.irq_enable(sc);

sys/dev/ic/qwzvar.h

461

void (*irq_enable)(struct qwz_softc *sc);

sys/dev/pci/drm/i915/display/intel_gmbus.c

548

u32 irq_enable;

sys/dev/pci/drm/i915/display/intel_gmbus.c

552

irq_enable = 0;

sys/dev/pci/drm/i915/display/intel_gmbus.c

554

irq_enable = GMBUS_IDLE_EN;

sys/dev/pci/drm/i915/display/intel_gmbus.c

557

intel_de_write_fw(display, GMBUS4(display), irq_enable);

sys/dev/pci/drm/i915/gt/intel_breadcrumbs.c

296

b->irq_enable = irq_enable;

sys/dev/pci/drm/i915/gt/intel_breadcrumbs.c

312

b->irq_enable(b);

sys/dev/pci/drm/i915/gt/intel_breadcrumbs.c

52

if (!b->irq_enabled++ && b->irq_enable(b))

sys/dev/pci/drm/i915/gt/intel_breadcrumbs_types.h

52

bool (*irq_enable)(struct intel_breadcrumbs *b);

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

1945

if (!engine->irq_enable)

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

1950

engine->irq_enable(engine);

sys/dev/pci/drm/i915/gt/intel_engine_types.h

510

void (*irq_enable)(struct intel_engine_cs *engine);

sys/dev/pci/drm/i915/gt/intel_execlists_submission.c

3459

engine->irq_enable = gen8_logical_ring_enable_irq;

sys/dev/pci/drm/i915/gt/intel_ring_submission.c

1129

engine->irq_enable = gen6_irq_enable;

sys/dev/pci/drm/i915/gt/intel_ring_submission.c

1132

engine->irq_enable = gen5_irq_enable;

sys/dev/pci/drm/i915/gt/intel_ring_submission.c

1135

engine->irq_enable = gen2_irq_enable;

sys/dev/pci/drm/i915/gt/intel_ring_submission.c

1277

engine->irq_enable = hsw_irq_enable_vecs;

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

4328

engine->breadcrumbs->irq_enable = guc_irq_enable_breadcrumbs;

sys/dev/pci/if_qwx_pci.c

792

sc->ops.irq_enable = qwx_pcic_ext_irq_enable;

sys/dev/pci/if_qwz_pci.c

717

sc->ops.irq_enable = qwz_pcic_ext_irq_enable;