sys/dev/pci/drm/i915/display/intel_de.h

90

return intel_uncore_rmw(__to_uncore(display), reg, clear, set);

sys/dev/pci/drm/i915/gt/gen6_ppgtt.c

36

intel_uncore_rmw(uncore, GAC_ECO_BITS, 0, ECOBITS_PPGTT_CACHE64B);

sys/dev/pci/drm/i915/gt/gen6_ppgtt.c

52

intel_uncore_rmw(uncore,

sys/dev/pci/drm/i915/gt/gen6_ppgtt.c

57

intel_uncore_rmw(uncore,

sys/dev/pci/drm/i915/gt/gen6_ppgtt.c

62

intel_uncore_rmw(uncore,

sys/dev/pci/drm/i915/gt/intel_ggtt_fencing.c

908

intel_uncore_rmw(uncore, DISP_ARB_CTL, 0, DISP_TILE_SURFACE_SWIZZLING);

sys/dev/pci/drm/i915/gt/intel_ggtt_fencing.c

913

intel_uncore_rmw(uncore, TILECTL, 0, TILECTL_SWZCTL);

sys/dev/pci/drm/i915/gt/intel_gt.c

183

intel_uncore_rmw(uncore, HSW_IDICR, 0, IDIHASHMSK(0xf));

sys/dev/pci/drm/i915/gt/intel_gt.c

266

intel_uncore_rmw(uncore, EMR, 0, eir);

sys/dev/pci/drm/i915/gt/intel_gt.c

276

intel_uncore_rmw(uncore, XELPMP_RING_FAULT_REG,

sys/dev/pci/drm/i915/gt/intel_gt.c

287

intel_uncore_rmw(uncore, GEN12_RING_FAULT_REG, RING_FAULT_VALID, 0);

sys/dev/pci/drm/i915/gt/intel_gt.c

290

intel_uncore_rmw(uncore, GEN8_RING_FAULT_REG, RING_FAULT_VALID, 0);

sys/dev/pci/drm/i915/gt/intel_gt_irq.c

342

intel_uncore_rmw(uncore, MTL_GUC_MGUC_INTR_MASK, mask, 0);

sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c

572

intel_uncore_rmw(gt->uncore, intel_gt_perf_limit_reasons_reg(gt),

sys/dev/pci/drm/i915/gt/intel_gtt.c

475

intel_uncore_rmw(uncore,

sys/dev/pci/drm/i915/gt/intel_reset.c

740

intel_uncore_rmw(gt->uncore,

sys/dev/pci/drm/i915/gt/intel_reset.c

745

intel_uncore_rmw(gt->uncore,

sys/dev/pci/drm/i915/gt/intel_reset.c

760

intel_uncore_rmw(gt->uncore,

sys/dev/pci/drm/i915/gt/intel_rps.c

643

intel_uncore_rmw(uncore, MEMINTREN, MEMINT_EVAL_CHG_EN, 0);

sys/dev/pci/drm/i915/gt/uc/intel_gsc_proxy.c

284

intel_uncore_rmw(gt->uncore, HECI_H_CSR(MTL_GSC_HECI2_BASE),

sys/dev/pci/drm/i915/gt/uc/intel_gsc_proxy.c

320

intel_uncore_rmw(gt->uncore, HECI_H_CSR(MTL_GSC_HECI2_BASE),

sys/dev/pci/drm/i915/gt/uc/intel_gsc_proxy.c

346

intel_uncore_rmw(gt->uncore, HECI_H_CSR(MTL_GSC_HECI2_BASE),

sys/dev/pci/drm/i915/gt/uc/intel_guc_fw.c

45

intel_uncore_rmw(uncore, GEN7_MISCCPCTL, 0,

sys/dev/pci/drm/i915/gt/uc/intel_guc_fw.c

58

intel_uncore_rmw(uncore, GUC_SHIM_CONTROL2, 0, GUC_ENABLE_DEBUG_REG);

sys/dev/pci/drm/i915/gt/uc/intel_guc_slpc.c

650

intel_uncore_rmw(gt->uncore,

sys/dev/pci/drm/i915/i915_hwmon.c

476

intel_uncore_rmw(ddat->uncore, hwmon->rg.pkg_rapl_limit,

sys/dev/pci/drm/i915/i915_hwmon.c

489

intel_uncore_rmw(ddat->uncore, hwmon->rg.pkg_rapl_limit,

sys/dev/pci/drm/i915/i915_hwmon.c

555

r = intel_uncore_rmw(hwmon->ddat.uncore, hwmon->rg.pkg_rapl_limit,

sys/dev/pci/drm/i915/i915_hwmon.c

571

intel_uncore_rmw(hwmon->ddat.uncore, hwmon->rg.pkg_rapl_limit,

sys/dev/pci/drm/i915/i915_hwmon.c

88

intel_uncore_rmw(uncore, reg, clear, set);

sys/dev/pci/drm/i915/i915_irq.c

171

misccpctl = intel_uncore_rmw(&dev_priv->uncore, GEN7_MISCCPCTL,

sys/dev/pci/drm/i915/i915_irq.c

267

ier = intel_uncore_rmw(&dev_priv->uncore, VLV_IER, ~0, 0);

sys/dev/pci/drm/i915/i915_irq.c

360

ier = intel_uncore_rmw(&dev_priv->uncore, VLV_IER, ~0, 0);

sys/dev/pci/drm/i915/i915_perf.c

1015

intel_uncore_rmw(uncore, oastatus_reg,

sys/dev/pci/drm/i915/i915_perf.c

2418

intel_uncore_rmw(uncore, GEN7_MISCCPCTL,

sys/dev/pci/drm/i915/i915_perf.c

2420

intel_uncore_rmw(uncore, GEN6_UCGCTL1,

sys/dev/pci/drm/i915/i915_perf.c

2432

intel_uncore_rmw(uncore, GEN6_UCGCTL1,

sys/dev/pci/drm/i915/i915_perf.c

2434

intel_uncore_rmw(uncore, GEN7_MISCCPCTL,

sys/dev/pci/drm/i915/i915_perf.c

2437

intel_uncore_rmw(uncore, GDT_CHICKEN_BITS, GT_NOA_ENABLE, 0);

sys/dev/pci/drm/i915/i915_perf.c

2923

intel_uncore_rmw(uncore, GEN12_SQCNT1, 0, sqcnt1);

sys/dev/pci/drm/i915/i915_perf.c

2948

intel_uncore_rmw(uncore, GDT_CHICKEN_BITS, GT_NOA_ENABLE, 0);

sys/dev/pci/drm/i915/i915_perf.c

2959

intel_uncore_rmw(uncore, RPM_CONFIG1, GEN10_GT_NOA_ENABLE, 0);

sys/dev/pci/drm/i915/i915_perf.c

2983

intel_uncore_rmw(uncore, RPM_CONFIG1, GEN10_GT_NOA_ENABLE, 0);

sys/dev/pci/drm/i915/i915_perf.c

2989

intel_uncore_rmw(uncore, GEN12_SQCNT1, sqcnt1, 0);

sys/dev/pci/drm/i915/intel_clock_gating.c

106

intel_uncore_rmw(&i915->uncore, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);

sys/dev/pci/drm/i915/intel_clock_gating.c

139

intel_uncore_rmw(&dev_priv->uncore, DSPCNTR(display, pipe),

sys/dev/pci/drm/i915/intel_clock_gating.c

142

intel_uncore_rmw(&dev_priv->uncore, DSPSURF(display, pipe),

sys/dev/pci/drm/i915/intel_clock_gating.c

191

intel_uncore_rmw(&i915->uncore, ILK_DISPLAY_CHICKEN1, 0, ILK_FBCQ_DIS);

sys/dev/pci/drm/i915/intel_clock_gating.c

192

intel_uncore_rmw(&i915->uncore, ILK_DISPLAY_CHICKEN2, 0, ILK_DPARB_GATE);

sys/dev/pci/drm/i915/intel_clock_gating.c

197

intel_uncore_rmw(&i915->uncore, ILK_DISPLAY_CHICKEN2, 0, ILK_ELPIN_409_SELECT);

sys/dev/pci/drm/i915/intel_clock_gating.c

218

intel_uncore_rmw(&i915->uncore, SOUTH_CHICKEN2, 0, DPLS_EDP_PPS_FIX_DIS);

sys/dev/pci/drm/i915/intel_clock_gating.c

256

intel_uncore_rmw(&i915->uncore, ILK_DISPLAY_CHICKEN2, 0, ILK_ELPIN_409_SELECT);

sys/dev/pci/drm/i915/intel_clock_gating.c

318

intel_uncore_rmw(&i915->uncore, SOUTH_DSPCLK_GATE_D,

sys/dev/pci/drm/i915/intel_clock_gating.c

322

intel_uncore_rmw(&i915->uncore, TRANS_CHICKEN1(PIPE_A),

sys/dev/pci/drm/i915/intel_clock_gating.c

334

misccpctl = intel_uncore_rmw(&i915->uncore, GEN7_MISCCPCTL,

sys/dev/pci/drm/i915/intel_clock_gating.c

355

intel_uncore_rmw(&i915->uncore, XEHP_CLOCK_GATE_DIS, 0,

sys/dev/pci/drm/i915/intel_clock_gating.c

367

intel_uncore_rmw(&i915->uncore, SOUTH_DSPCLK_GATE_D, 0, CNP_PWM_CGE_GATING_DISABLE);

sys/dev/pci/drm/i915/intel_clock_gating.c

376

intel_uncore_rmw(&i915->uncore, FBC_LLC_READ_CTRL, 0, FBC_LLC_FULLY_OPEN);

sys/dev/pci/drm/i915/intel_clock_gating.c

382

intel_uncore_rmw(&i915->uncore, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);

sys/dev/pci/drm/i915/intel_clock_gating.c

390

intel_uncore_rmw(&i915->uncore, FBC_LLC_READ_CTRL, 0, FBC_LLC_FULLY_OPEN);

sys/dev/pci/drm/i915/intel_clock_gating.c

394

intel_uncore_rmw(&i915->uncore, GEN8_UCGCTL6,

sys/dev/pci/drm/i915/intel_clock_gating.c

399

intel_uncore_rmw(&i915->uncore, GEN6_UCGCTL1,

sys/dev/pci/drm/i915/intel_clock_gating.c

406

intel_uncore_rmw(&i915->uncore, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);

sys/dev/pci/drm/i915/intel_clock_gating.c

414

intel_uncore_rmw(&i915->uncore, GEN7_MISCCPCTL,

sys/dev/pci/drm/i915/intel_clock_gating.c

418

intel_uncore_rmw(&i915->uncore, FBC_LLC_READ_CTRL, 0, FBC_LLC_FULLY_OPEN);

sys/dev/pci/drm/i915/intel_clock_gating.c

424

intel_uncore_rmw(&i915->uncore, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);

sys/dev/pci/drm/i915/intel_clock_gating.c

433

intel_uncore_rmw(&i915->uncore, CHICKEN_PIPESL_1(PIPE_A), 0, HSW_FBCQ_DIS);

sys/dev/pci/drm/i915/intel_clock_gating.c

436

intel_uncore_rmw(&i915->uncore, GAM_ECOCHK, 0, HSW_ECOCHK_ARB_PRIO_SOL);

sys/dev/pci/drm/i915/intel_clock_gating.c

439

intel_uncore_rmw(&i915->uncore, CHICKEN_PAR1_1, 0, HSW_MASK_VBL_TO_PIPE_IN_SRD);

sys/dev/pci/drm/i915/intel_clock_gating.c

443

intel_uncore_rmw(&i915->uncore, CHICKEN_PIPESL_1(pipe),

sys/dev/pci/drm/i915/intel_clock_gating.c

449

intel_uncore_rmw(&i915->uncore, GEN7_FF_THREAD_MODE,

sys/dev/pci/drm/i915/intel_clock_gating.c

456

intel_uncore_rmw(&i915->uncore, GEN8_UCGCTL6, 0, GEN8_SDEUNIT_CLOCK_GATE_DISABLE);

sys/dev/pci/drm/i915/intel_clock_gating.c

462

intel_uncore_rmw(&i915->uncore, CHICKEN_PAR2_1,

sys/dev/pci/drm/i915/intel_clock_gating.c

472

intel_uncore_rmw(&i915->uncore, GEN6_UCGCTL1, 0, GEN6_EU_TCUNIT_CLOCK_GATE_DISABLE);

sys/dev/pci/drm/i915/intel_clock_gating.c

481

intel_uncore_rmw(&i915->uncore, CHICKEN_PIPESL_1(PIPE_A), 0, HSW_FBCQ_DIS);

sys/dev/pci/drm/i915/intel_clock_gating.c

484

intel_uncore_rmw(&i915->uncore, CHICKEN_PAR1_1, 0, HSW_MASK_VBL_TO_PIPE_IN_SRD);

sys/dev/pci/drm/i915/intel_clock_gating.c

488

intel_uncore_rmw(&i915->uncore, CHICKEN_PIPESL_1(pipe),

sys/dev/pci/drm/i915/intel_clock_gating.c

493

intel_uncore_rmw(&i915->uncore, GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,

sys/dev/pci/drm/i915/intel_clock_gating.c

497

intel_uncore_rmw(&i915->uncore, GAM_ECOCHK, 0, HSW_ECOCHK_ARB_PRIO_SOL);

sys/dev/pci/drm/i915/intel_clock_gating.c

509

intel_uncore_rmw(&i915->uncore, ILK_DISPLAY_CHICKEN1, 0, ILK_FBCQ_DIS);

sys/dev/pci/drm/i915/intel_clock_gating.c

535

intel_uncore_rmw(&i915->uncore, GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,

sys/dev/pci/drm/i915/intel_clock_gating.c

540

intel_uncore_rmw(&i915->uncore, GEN6_MBCUNIT_SNPCR, GEN6_MBC_SNPCR_MASK,

sys/dev/pci/drm/i915/intel_clock_gating.c

561

intel_uncore_rmw(&i915->uncore, GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,

sys/dev/pci/drm/i915/intel_clock_gating.c

57

intel_uncore_rmw(&i915->uncore, CHICKEN_PAR1_1, 0, SKL_DE_COMPRESSED_HASH_MODE);

sys/dev/pci/drm/i915/intel_clock_gating.c

574

intel_uncore_rmw(&i915->uncore, GEN7_UCGCTL4, 0, GEN7_L3BANK2X_CLOCK_GATE_DISABLE);

sys/dev/pci/drm/i915/intel_clock_gating.c

588

intel_uncore_rmw(&i915->uncore, GEN7_FF_THREAD_MODE,

sys/dev/pci/drm/i915/intel_clock_gating.c

596

intel_uncore_rmw(&i915->uncore, GEN6_UCGCTL1, 0, GEN6_CSUNIT_CLOCK_GATE_DISABLE);

sys/dev/pci/drm/i915/intel_clock_gating.c

599

intel_uncore_rmw(&i915->uncore, GEN8_UCGCTL6, 0, GEN8_SDEUNIT_CLOCK_GATE_DISABLE);

sys/dev/pci/drm/i915/intel_clock_gating.c

61

intel_uncore_rmw(&i915->uncore, CHICKEN_PAR1_1, 0, SKL_EDP_PSR_FIX_RDWRAP);

sys/dev/pci/drm/i915/intel_clock_gating.c

64

intel_uncore_rmw(&i915->uncore, GEN8_CHICKEN_DCPR_1, 0, MASK_WAKEMEM);

sys/dev/pci/drm/i915/intel_clock_gating.c

70

intel_uncore_rmw(&i915->uncore, DISP_ARB_CTL, 0, DISP_FBC_MEMORY_WAKE);

sys/dev/pci/drm/i915/intel_clock_gating.c

78

intel_uncore_rmw(&i915->uncore, GEN8_UCGCTL6, 0, GEN8_SDEUNIT_CLOCK_GATE_DISABLE);

sys/dev/pci/drm/i915/intel_clock_gating.c

84

intel_uncore_rmw(&i915->uncore, GEN8_UCGCTL6, 0, GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ);

sys/dev/pci/drm/i915/vlv_suspend.c

266

intel_uncore_rmw(uncore, VLV_GTLC_WAKE_CTRL, ~VLV_GTLC_ALLOWWAKEREQ,

sys/dev/pci/drm/i915/vlv_suspend.c

269

intel_uncore_rmw(uncore, VLV_GTLC_SURVIVABILITY_REG, ~VLV_GFX_CLK_FORCE_ON_BIT,

sys/dev/pci/drm/i915/vlv_suspend.c

310

intel_uncore_rmw(uncore, VLV_GTLC_SURVIVABILITY_REG, VLV_GFX_CLK_FORCE_ON_BIT,

sys/dev/pci/drm/i915/vlv_suspend.c

336

intel_uncore_rmw(uncore, VLV_GTLC_WAKE_CTRL, VLV_GTLC_ALLOWWAKEREQ,