Symbol: ipp_regs
sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c
148
static const struct dce_ipp_registers ipp_regs[] = {
sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c
149
ipp_regs(0),
sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c
150
ipp_regs(1),
sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c
151
ipp_regs(2),
sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c
152
ipp_regs(3),
sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c
153
ipp_regs(4),
sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c
154
ipp_regs(5)
sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c
608
&ipp_regs[inst], &ipp_shift, &ipp_mask);
sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c
180
static const struct dce_ipp_registers ipp_regs[] = {
sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c
181
ipp_regs(0),
sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c
182
ipp_regs(1),
sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c
183
ipp_regs(2)
sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c
652
&ipp_regs[inst], &ipp_shift, &ipp_mask);
sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c
189
static const struct dce_ipp_registers ipp_regs[] = {
sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c
190
ipp_regs(0),
sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c
191
ipp_regs(1),
sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c
192
ipp_regs(2),
sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c
193
ipp_regs(3),
sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c
194
ipp_regs(4),
sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c
195
ipp_regs(5)
sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c
675
&ipp_regs[inst], &ipp_shift, &ipp_mask);
sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c
189
static const struct dce_ipp_registers ipp_regs[] = {
sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c
190
ipp_regs(0),
sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c
191
ipp_regs(1),
sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c
192
ipp_regs(2),
sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c
193
ipp_regs(3),
sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c
194
ipp_regs(4),
sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c
195
ipp_regs(5)
sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c
760
&ipp_regs[inst], &ipp_shift, &ipp_mask);
sys/dev/pci/drm/amd/display/dc/resource/dce60/dce60_resource.c
165
static const struct dce_ipp_registers ipp_regs[] = {
sys/dev/pci/drm/amd/display/dc/resource/dce60/dce60_resource.c
166
ipp_regs(0),
sys/dev/pci/drm/amd/display/dc/resource/dce60/dce60_resource.c
167
ipp_regs(1),
sys/dev/pci/drm/amd/display/dc/resource/dce60/dce60_resource.c
168
ipp_regs(2),
sys/dev/pci/drm/amd/display/dc/resource/dce60/dce60_resource.c
169
ipp_regs(3),
sys/dev/pci/drm/amd/display/dc/resource/dce60/dce60_resource.c
170
ipp_regs(4),
sys/dev/pci/drm/amd/display/dc/resource/dce60/dce60_resource.c
171
ipp_regs(5)
sys/dev/pci/drm/amd/display/dc/resource/dce60/dce60_resource.c
794
&ipp_regs[inst], &ipp_shift, &ipp_mask);
sys/dev/pci/drm/amd/display/dc/resource/dce80/dce80_resource.c
164
static const struct dce_ipp_registers ipp_regs[] = {
sys/dev/pci/drm/amd/display/dc/resource/dce80/dce80_resource.c
165
ipp_regs(0),
sys/dev/pci/drm/amd/display/dc/resource/dce80/dce80_resource.c
166
ipp_regs(1),
sys/dev/pci/drm/amd/display/dc/resource/dce80/dce80_resource.c
167
ipp_regs(2),
sys/dev/pci/drm/amd/display/dc/resource/dce80/dce80_resource.c
168
ipp_regs(3),
sys/dev/pci/drm/amd/display/dc/resource/dce80/dce80_resource.c
169
ipp_regs(4),
sys/dev/pci/drm/amd/display/dc/resource/dce80/dce80_resource.c
170
ipp_regs(5)
sys/dev/pci/drm/amd/display/dc/resource/dce80/dce80_resource.c
800
&ipp_regs[inst], &ipp_shift, &ipp_mask);
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
298
static const struct dcn10_ipp_registers ipp_regs[] = {
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
299
ipp_regs(0),
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
300
ipp_regs(1),
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
301
ipp_regs(2),
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
302
ipp_regs(3),
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
596
&ipp_regs[inst], &ipp_shift, &ipp_mask);
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
357
static const struct dcn10_ipp_registers ipp_regs[] = {
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
358
ipp_regs(0),
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
359
ipp_regs(1),
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
360
ipp_regs(2),
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
361
ipp_regs(3),
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
362
ipp_regs(4),
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
363
ipp_regs(5),
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
762
&ipp_regs[inst], &ipp_shift, &ipp_mask);
sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
419
static const struct dcn10_ipp_registers ipp_regs[] = {
sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
420
ipp_regs(0),
sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
421
ipp_regs(1),
sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
422
ipp_regs(2),
sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
423
ipp_regs(3),
sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
656
&ipp_regs[inst], &ipp_shift, &ipp_mask);
sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
392
static const struct dcn10_ipp_registers ipp_regs[] = {
sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
393
ipp_regs(0),
sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
394
ipp_regs(1),
sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
395
ipp_regs(2),
sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
396
ipp_regs(3),
sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
495
&ipp_regs[inst], &ipp_shift, &ipp_mask);