iommu_write_8
iommu_write_8(iommu, DMAR_RTADDR_REG, paddr);
iommu_write_8(iommu, DMAR_IQT_REG, t);
iommu_write_8(iommu, DMAR_IOTLB_REG(iommu), val);
iommu_write_8(iommu, DMAR_IVA_REG(iommu), iva);
iommu_write_8(iommu, DMAR_IOTLB_REG(iommu), val);
iommu_write_8(iommu, DMAR_IQT_REG, t);
iommu_write_8(iommu, DMAR_IVA_REG(iommu), iva);
iommu_write_8(iommu, DMAR_IOTLB_REG(iommu), cmd);
iommu_write_8(iommu, DMAR_CCMD_REG, val);
iommu_write_8(iommu, DMAR_IQT_REG, 0);
iommu_write_8(iommu, DMAR_IQA_REG,
iommu_write_8(iommu, DMAR_IRTA_REG, 0);
iommu_write_8(iommu, IOMMUCTL_REG, ov & ~(CTL_IOMMUEN | CTL_COHERENT |
iommu_write_8(iommu, CMD_BASE_REG, (paddr & CMD_BASE_MASK) | CMD_TBL_LEN_4K);
iommu_write_8(iommu, EVT_BASE_REG, (paddr & EVT_BASE_MASK) | EVT_TBL_LEN_4K);
iommu_write_8(iommu, DEV_TAB_BASE_REG, (sc->sc_hwdtep & DEV_TAB_MASK) | DEV_TAB_LEN);
iommu_write_8(iommu, IOMMUCTL_REG, ov);
void iommu_write_8(struct iommu_softc *, int, uint64_t);