intel_sbi_read
tmp = intel_sbi_read(display, 0x21C4, SBI_MPHY);
tmp = intel_sbi_read(display, 0x20EC, SBI_MPHY);
tmp = intel_sbi_read(display, 0x21EC, SBI_MPHY);
temp = intel_sbi_read(display, SBI_SSCCTL6, SBI_ICLK);
temp = intel_sbi_read(display, SBI_SSCDIVINTPHASE6, SBI_ICLK);
temp = intel_sbi_read(display, SBI_SSCAUXDIV6, SBI_ICLK);
temp = intel_sbi_read(display, SBI_SSCCTL6, SBI_ICLK);
temp = intel_sbi_read(display, SBI_SSCCTL6, SBI_ICLK);
temp = intel_sbi_read(display, SBI_SSCDIVINTPHASE6, SBI_ICLK);
temp = intel_sbi_read(display, SBI_SSCAUXDIV6, SBI_ICLK);
tmp = intel_sbi_read(display, SBI_SSCCTL, SBI_ICLK);
tmp = intel_sbi_read(display, SBI_SSCCTL, SBI_ICLK);
tmp = intel_sbi_read(display, reg, SBI_ICLK);
tmp = intel_sbi_read(display, reg, SBI_ICLK);
tmp = intel_sbi_read(display, SBI_SSCCTL, SBI_ICLK);
tmp = intel_sbi_read(display, SBI_SSCDIVINTPHASE, SBI_ICLK);
tmp = intel_sbi_read(display, 0x8008, SBI_MPHY);
tmp = intel_sbi_read(display, 0x2008, SBI_MPHY);
tmp = intel_sbi_read(display, 0x2108, SBI_MPHY);
tmp = intel_sbi_read(display, 0x206C, SBI_MPHY);
tmp = intel_sbi_read(display, 0x216C, SBI_MPHY);
tmp = intel_sbi_read(display, 0x2080, SBI_MPHY);
tmp = intel_sbi_read(display, 0x2180, SBI_MPHY);
tmp = intel_sbi_read(display, 0x208C, SBI_MPHY);
tmp = intel_sbi_read(display, 0x218C, SBI_MPHY);
tmp = intel_sbi_read(display, 0x2098, SBI_MPHY);
tmp = intel_sbi_read(display, 0x2198, SBI_MPHY);
tmp = intel_sbi_read(display, 0x20C4, SBI_MPHY);
u32 intel_sbi_read(struct intel_display *display, u16 reg,