sys/dev/pci/drm/i915/display/intel_ddi.c

1489

if (intel_dp_is_uhbr(crtc_state)) {

sys/dev/pci/drm/i915/display/intel_ddi.c

2593

if (intel_dp_is_uhbr(crtc_state))

sys/dev/pci/drm/i915/display/intel_ddi.c

2725

if (!is_mst && intel_dp_is_uhbr(crtc_state)) {

sys/dev/pci/drm/i915/display/intel_ddi.c

2872

if (!is_mst && intel_dp_is_uhbr(crtc_state)) {

sys/dev/pci/drm/i915/display/intel_ddi.c

3144

if (is_mst || intel_dp_is_uhbr(old_crtc_state)) {

sys/dev/pci/drm/i915/display/intel_ddi.c

3242

if (!is_hdmi && intel_dp_is_uhbr(old_crtc_state)) {

sys/dev/pci/drm/i915/display/intel_ddi.c

3519

if (!is_hdmi && intel_dp_is_uhbr(crtc_state)) {

sys/dev/pci/drm/i915/display/intel_ddi.c

3534

if (!is_hdmi && intel_dp_is_uhbr(crtc_state)) {

sys/dev/pci/drm/i915/display/intel_ddi.c

367

if (intel_dp_is_uhbr(crtc_state))

sys/dev/pci/drm/i915/display/intel_ddi.c

3742

intel_dp_is_uhbr(crtc_state)) {

sys/dev/pci/drm/i915/display/intel_ddi.c

3795

intel_dp_is_uhbr(crtc_state)) {

sys/dev/pci/drm/i915/display/intel_ddi.c

496

if (enable && intel_dp_is_uhbr(crtc_state))

sys/dev/pci/drm/i915/display/intel_ddi.c

589

intel_dp_is_uhbr(crtc_state)) {

sys/dev/pci/drm/i915/display/intel_ddi.c

590

if (intel_dp_is_uhbr(crtc_state))

sys/dev/pci/drm/i915/display/intel_ddi_buf_trans.c

1683

intel_dp_is_uhbr(crtc_state))

sys/dev/pci/drm/i915/display/intel_ddi_buf_trans.c

1702

if (intel_crtc_has_dp_encoder(crtc_state) && intel_dp_is_uhbr(crtc_state))

sys/dev/pci/drm/i915/display/intel_dp.c

2357

if (intel_dp_is_uhbr(crtc_state))

sys/dev/pci/drm/i915/display/intel_dp.c

2697

if (!ret && intel_dp_is_uhbr(pipe_config))

sys/dev/pci/drm/i915/display/intel_dp.c

3133

intel_dp_is_uhbr(pipe_config);

sys/dev/pci/drm/i915/display/intel_dp.c

3173

int symbol_size = intel_dp_is_uhbr(crtc_state) ? 32 : 8;

sys/dev/pci/drm/i915/display/intel_dp.c

3178

int min_sym_cycles = intel_dp_is_uhbr(crtc_state) ? 3 : 5;

sys/dev/pci/drm/i915/display/intel_dp.c

3191

if (!is_mst && !intel_dp_is_uhbr(crtc_state))

sys/dev/pci/drm/i915/display/intel_dp.c

3235

if (intel_dp_is_uhbr(crtc_state)) {

sys/dev/pci/drm/i915/display/intel_dp.c

3308

if (intel_dp_is_uhbr(pipe_config)) {

sys/dev/pci/drm/i915/display/intel_dp.c

3345

if (!intel_dp_is_uhbr(pipe_config)) {

sys/dev/pci/drm/i915/display/intel_dp.h

85

bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);

sys/dev/pci/drm/i915/display/intel_dp_link_training.c

1036

intel_dp_is_uhbr(crtc_state));

sys/dev/pci/drm/i915/display/intel_dp_link_training.c

1146

if (intel_dp_is_uhbr(crtc_state)) {

sys/dev/pci/drm/i915/display/intel_dp_link_training.c

1662

if (intel_dp_is_uhbr(crtc_state))

sys/dev/pci/drm/i915/display/intel_dp_link_training.c

1717

if (!intel_dp_is_uhbr(crtc_state))

sys/dev/pci/drm/i915/display/intel_dp_link_training.c

451

if (intel_dp_is_uhbr(crtc_state))

sys/dev/pci/drm/i915/display/intel_dp_link_training.c

491

if (intel_dp_is_uhbr(crtc_state)) {

sys/dev/pci/drm/i915/display/intel_dp_link_training.c

610

if (intel_dp_is_uhbr(crtc_state)) {

sys/dev/pci/drm/i915/display/intel_dp_link_training.c

700

if (intel_dp_is_uhbr(crtc_state)) {

sys/dev/pci/drm/i915/display/intel_dp_link_training.c

783

if (intel_dp_is_uhbr(crtc_state))

sys/dev/pci/drm/i915/display/intel_dp_link_training.c

898

if (intel_dp_is_uhbr(crtc_state)) {

sys/dev/pci/drm/i915/display/intel_dp_link_training.c

942

intel_dp_is_uhbr(crtc_state));

sys/dev/pci/drm/i915/display/intel_dp_mst.c

1265

if (crtc_state->fec_enable || intel_dp_is_uhbr(crtc_state))

sys/dev/pci/drm/i915/display/intel_dp_mst.c

1270

if (intel_dp_is_uhbr(crtc_state))

sys/dev/pci/drm/i915/display/intel_dp_mst.c

1275

if (crtc_state->fec_enable || intel_dp_is_uhbr(crtc_state))

sys/dev/pci/drm/i915/display/intel_dp_mst.c

1303

if (intel_dp_is_uhbr(pipe_config)) {

sys/dev/pci/drm/i915/display/intel_dp_mst.c

149

if (!intel_dp_is_uhbr(crtc_state) || DISPLAY_VER(display) >= 20 || !dsc)

sys/dev/pci/drm/i915/display/intel_dp_mst.c

185

flags |= intel_dp_is_uhbr(crtc_state) ? DRM_DP_BW_OVERHEAD_UHBR : 0;

sys/dev/pci/drm/i915/display/intel_dp_mst.c

251

u8 link_coding_cap = intel_dp_is_uhbr(crtc_state) ?

sys/dev/pci/drm/i915/display/intel_dp_mst.c

300

crtc_state->fec_enable = !intel_dp_is_uhbr(crtc_state);

sys/dev/pci/drm/i915/display/intel_psr.c

1632

if (intel_dp_is_uhbr(crtc_state)) {

sys/dev/pci/drm/i915/display/intel_psr.c

2684

hactive_limit = intel_dp_is_uhbr(crtc_state) ? 1230 : 546;

sys/dev/pci/drm/i915/display/intel_psr.c

2686

hactive_limit = intel_dp_is_uhbr(crtc_state) ? 615 : 273;