intel_de_write_fw
intel_de_write_fw(display, DSPSTRIDE(display, i9xx_plane),
intel_de_write_fw(display, DSPPOS(display, i9xx_plane),
intel_de_write_fw(display, DSPSIZE(display, i9xx_plane),
intel_de_write_fw(display, PRIMPOS(display, i9xx_plane),
intel_de_write_fw(display, PRIMSIZE(display, i9xx_plane),
intel_de_write_fw(display,
intel_de_write_fw(display, DSPOFFSET(display, i9xx_plane),
intel_de_write_fw(display, DSPLINOFF(display, i9xx_plane),
intel_de_write_fw(display, DSPTILEOFF(display, i9xx_plane),
intel_de_write_fw(display, DSPCNTR(display, i9xx_plane), dspcntr);
intel_de_write_fw(display, DSPSURF(display, i9xx_plane), plane_state->surf);
intel_de_write_fw(display, DSPADDR(display, i9xx_plane), plane_state->surf);
intel_de_write_fw(display, DSPCNTR(display, i9xx_plane), dspcntr);
intel_de_write_fw(display, DSPSURF(display, i9xx_plane), 0);
intel_de_write_fw(display, DSPADDR(display, i9xx_plane), 0);
intel_de_write_fw(display, DSPCNTR(display, i9xx_plane), dspcntr);
intel_de_write_fw(display, DSPSURF(display, i9xx_plane), plane_state->surf);
intel_de_write_fw(display, DSPADDR_VLV(display, i9xx_plane), plane_state->surf);
intel_de_write_fw(display, DSPCNTR(display, i9xx_plane), dspcntr);
intel_de_write_fw(display, DSPSURF(display, i9xx_plane), reg);
intel_de_write_fw(display, DSPADDR(display, i9xx_plane), reg);
intel_de_write_fw(display, DSPARB(display), dsparb);
intel_de_write_fw(display, DSPARB2, dsparb2);
intel_de_write_fw(display, DSPARB(display), dsparb);
intel_de_write_fw(display, DSPARB2, dsparb2);
intel_de_write_fw(display, DSPARB3, dsparb3);
intel_de_write_fw(display, DSPARB2, dsparb2);
intel_de_write_fw(display, PIPE_CSC_MODE(crtc->pipe),
intel_de_write_fw(display, PIPE_CSC_MODE(crtc->pipe),
intel_de_write_fw(display, PALETTE(display, pipe, i),
intel_de_write_fw(display,
intel_de_write_fw(display,
intel_de_write_fw(display,
intel_de_write_fw(display,
intel_de_write_fw(display, PIPEGCMAX(display, pipe, 0), lut[i].red);
intel_de_write_fw(display, PIPEGCMAX(display, pipe, 1), lut[i].green);
intel_de_write_fw(display, PIPEGCMAX(display, pipe, 2), lut[i].blue);
intel_de_write_fw(display, reg, val);
intel_de_write_fw(display, reg, val);
intel_de_write_fw(display, CGM_PIPE_DEGAMMA(pipe, i, 0),
intel_de_write_fw(display, CGM_PIPE_DEGAMMA(pipe, i, 1),
intel_de_write_fw(display, CGM_PIPE_GAMMA(pipe, i, 0),
intel_de_write_fw(display, CGM_PIPE_GAMMA(pipe, i, 1),
intel_de_write_fw(display, CGM_PIPE_MODE(crtc->pipe),
intel_de_write_fw(display, PREC_PAL_INDEX(pipe),
intel_de_write_fw(display, PREC_PAL_INDEX(pipe),
intel_de_write_fw(display, PREC_PAL_INDEX(pipe),
intel_de_write_fw(display, PREC_PAL_INDEX(pipe),
intel_de_write_fw(display, PREC_PAL_INDEX(pipe),
intel_de_write_fw(display, PRE_CSC_GAMC_INDEX(pipe),
intel_de_write_fw(display, PRE_CSC_GAMC_INDEX(pipe),
intel_de_write_fw(display, PRE_CSC_GAMC_INDEX(pipe),
intel_de_write_fw(display, PREC_PAL_MULTI_SEG_INDEX(pipe),
intel_de_write_fw(display, PREC_PAL_MULTI_SEG_INDEX(pipe),
intel_de_write_fw(display, PREC_PAL_MULTI_SEG_INDEX(pipe),
intel_de_write_fw(display, PIPE_WGC_C01_C00(display, pipe),
intel_de_write_fw(display, PIPE_WGC_C02(display, pipe),
intel_de_write_fw(display, PIPE_WGC_C11_C10(display, pipe),
intel_de_write_fw(display, PIPE_WGC_C12(display, pipe),
intel_de_write_fw(display, PIPE_WGC_C21_C20(display, pipe),
intel_de_write_fw(display, PIPE_WGC_C22(display, pipe),
intel_de_write_fw(display, CGM_PIPE_CSC_COEFF01(pipe),
intel_de_write_fw(display, CGM_PIPE_CSC_COEFF23(pipe),
intel_de_write_fw(display, CGM_PIPE_CSC_COEFF45(pipe),
intel_de_write_fw(display, CGM_PIPE_CSC_COEFF67(pipe),
intel_de_write_fw(display, CGM_PIPE_CSC_COEFF8(pipe),
intel_de_write_fw(display, CURCNTR(display, PIPE_A), 0);
intel_de_write_fw(display, CURBASE(display, PIPE_A), base);
intel_de_write_fw(display, CURSIZE(display, PIPE_A), size);
intel_de_write_fw(display, CURPOS(display, PIPE_A), pos);
intel_de_write_fw(display, CURCNTR(display, PIPE_A), cntl);
intel_de_write_fw(display, CURPOS(display, PIPE_A), pos);
intel_de_write_fw(display, reg, val);
intel_de_write_fw(display,
intel_de_write_fw(display, DSB_CTRL(pipe, dsb->id),
intel_de_write_fw(display, DSB_CHICKEN(pipe, dsb->id),
intel_de_write_fw(display, DSB_INTERRUPT(pipe, dsb->id),
intel_de_write_fw(display, DSB_PMCTRL(pipe, dsb->id), 0);
intel_de_write_fw(display, DSB_HEAD(pipe, dsb->id),
intel_de_write_fw(display, DSB_TAIL(pipe, dsb->id),
intel_de_write_fw(display, DSB_CTRL(pipe, dsb->id),
intel_de_write_fw(display, DSB_CTRL(pipe, dsb->id), 0);
intel_de_write_fw(display, DSB_INTERRUPT(pipe, dsb->id),
intel_de_write_fw(display, DSB_INTERRUPT(pipe, dsb_id), tmp);
intel_de_write_fw(display, DSPADDR(display, i9xx_plane),
intel_de_write_fw(display, DSPSURF(display, i9xx_plane),
intel_de_write_fw(display, GMBUS4(display), irq_en);
intel_de_write_fw(display, GMBUS4(display), 0);
intel_de_write_fw(display, GMBUS4(display), irq_enable);
intel_de_write_fw(display, GMBUS4(display), 0);
intel_de_write_fw(display, GMBUS0(display),
intel_de_write_fw(display, GMBUS1(display),
intel_de_write_fw(display, GMBUS0(display), gmbus0_reg);
intel_de_write_fw(display, GMBUS3(display), val);
intel_de_write_fw(display, GMBUS1(display),
intel_de_write_fw(display, GMBUS3(display), val);
intel_de_write_fw(display, GMBUS5(display), gmbus5);
intel_de_write_fw(display, GMBUS5(display), 0);
intel_de_write_fw(display, GMBUS0(display), gmbus0_source | bus->reg0);
intel_de_write_fw(display, GMBUS1(display), GMBUS_CYCLE_STOP | GMBUS_SW_RDY);
intel_de_write_fw(display, GMBUS0(display), 0);
intel_de_write_fw(display, GMBUS1(display), GMBUS_SW_CLR_INT);
intel_de_write_fw(display, GMBUS1(display), 0);
intel_de_write_fw(display, GMBUS0(display), 0);
intel_de_write_fw(display, GMBUS0(display), 0);
intel_de_write_fw(display, PF_CTL(pipe), PF_ENABLE |
intel_de_write_fw(display, PF_CTL(pipe), PF_ENABLE |
intel_de_write_fw(display, PF_WIN_POS(pipe),
intel_de_write_fw(display, PF_WIN_SZ(pipe),
intel_de_write_fw(display, PF_CTL(pipe), 0);
intel_de_write_fw(display, PF_WIN_POS(pipe), 0);
intel_de_write_fw(display, PF_WIN_SZ(pipe), 0);
intel_de_write_fw(display, PSR2_MAN_TRK_CTL(display, cpu_transcoder), val);
intel_de_write_fw(display, PIPE_SRCSZ_ERLY_TPT(crtc->pipe), 0);
intel_de_write_fw(display, SBI_ADDR, SBI_ADDR_VALUE(reg));
intel_de_write_fw(display, SBI_DATA, is_read ? 0 : *val);
intel_de_write_fw(display, SBI_CTL_STAT, cmd | SBI_STATUS_BUSY);
intel_de_write_fw(display, SPCSCYGOFF(plane_id),
intel_de_write_fw(display, SPCSCCBOFF(plane_id),
intel_de_write_fw(display, SPCSCCROFF(plane_id),
intel_de_write_fw(display, DVSGAMC_G4X(pipe, i - 1),
intel_de_write_fw(display, SPCSCC01(plane_id),
intel_de_write_fw(display, DVSGAMC_ILK(pipe, i),
intel_de_write_fw(display, SPCSCC23(plane_id),
intel_de_write_fw(display, DVSGAMCMAX_ILK(pipe, 0), gamma[i]);
intel_de_write_fw(display, DVSGAMCMAX_ILK(pipe, 1), gamma[i]);
intel_de_write_fw(display, DVSGAMCMAX_ILK(pipe, 2), gamma[i]);
intel_de_write_fw(display, SPCSCC45(plane_id),
intel_de_write_fw(display, DVSSTRIDE(pipe),
intel_de_write_fw(display, DVSPOS(pipe),
intel_de_write_fw(display, DVSSIZE(pipe),
intel_de_write_fw(display, DVSSCALE(pipe), dvsscale);
intel_de_write_fw(display, SPCSCC67(plane_id),
intel_de_write_fw(display, DVSKEYVAL(pipe), key->min_value);
intel_de_write_fw(display, DVSKEYMSK(pipe),
intel_de_write_fw(display, DVSKEYMAX(pipe), key->max_value);
intel_de_write_fw(display, DVSLINOFF(pipe),
intel_de_write_fw(display, SPCSCC8(plane_id), SPCSC_C0(csc[8]));
intel_de_write_fw(display, DVSTILEOFF(pipe),
intel_de_write_fw(display, DVSCNTR(pipe), dvscntr);
intel_de_write_fw(display, DVSSURF(pipe), plane_state->surf);
intel_de_write_fw(display, SPCSCYGICLAMP(plane_id),
intel_de_write_fw(display, DVSCNTR(pipe), 0);
intel_de_write_fw(display, DVSSCALE(pipe), 0);
intel_de_write_fw(display, DVSSURF(pipe), 0);
intel_de_write_fw(display, SPCSCCBICLAMP(plane_id),
intel_de_write_fw(display, SPCSCCRICLAMP(plane_id),
intel_de_write_fw(display, SPCSCYGOCLAMP(plane_id),
intel_de_write_fw(display, SPCSCCBOCLAMP(plane_id),
intel_de_write_fw(display, SPCSCCROCLAMP(plane_id),
intel_de_write_fw(display, SPCLRC0(pipe, plane_id),
intel_de_write_fw(display, SPCLRC1(pipe, plane_id),
intel_de_write_fw(display, SPGAMC(pipe, plane_id, i - 1),
intel_de_write_fw(display, SPSTRIDE(pipe, plane_id),
intel_de_write_fw(display, SPPOS(pipe, plane_id),
intel_de_write_fw(display, SPSIZE(pipe, plane_id),
intel_de_write_fw(display, SPKEYMINVAL(pipe, plane_id),
intel_de_write_fw(display, SPKEYMSK(pipe, plane_id),
intel_de_write_fw(display, SPKEYMAXVAL(pipe, plane_id),
intel_de_write_fw(display, SPCONSTALPHA(pipe, plane_id), 0);
intel_de_write_fw(display, SPLINOFF(pipe, plane_id),
intel_de_write_fw(display, SPTILEOFF(pipe, plane_id),
intel_de_write_fw(display, SPCNTR(pipe, plane_id), sprctl);
intel_de_write_fw(display, SPSURF(pipe, plane_id), plane_state->surf);
intel_de_write_fw(display, SPCNTR(pipe, plane_id), 0);
intel_de_write_fw(display, SPSURF(pipe, plane_id), 0);
intel_de_write_fw(display, SPRGAMC(pipe, i),
intel_de_write_fw(display, SPRGAMC16(pipe, 0), gamma[i]);
intel_de_write_fw(display, SPRGAMC16(pipe, 1), gamma[i]);
intel_de_write_fw(display, SPRGAMC16(pipe, 2), gamma[i]);
intel_de_write_fw(display, SPRGAMC17(pipe, 0), gamma[i]);
intel_de_write_fw(display, SPRGAMC17(pipe, 1), gamma[i]);
intel_de_write_fw(display, SPRGAMC17(pipe, 2), gamma[i]);
intel_de_write_fw(display, SPRSTRIDE(pipe),
intel_de_write_fw(display, SPRPOS(pipe),
intel_de_write_fw(display, SPRSIZE(pipe),
intel_de_write_fw(display, SPRSCALE(pipe), sprscale);
intel_de_write_fw(display, SPRKEYVAL(pipe), key->min_value);
intel_de_write_fw(display, SPRKEYMSK(pipe),
intel_de_write_fw(display, SPRKEYMAX(pipe), key->max_value);
intel_de_write_fw(display, SPROFFSET(pipe),
intel_de_write_fw(display, SPRLINOFF(pipe),
intel_de_write_fw(display, SPRTILEOFF(pipe),
intel_de_write_fw(display, SPRCTL(pipe), sprctl);
intel_de_write_fw(display, SPRSURF(pipe), plane_state->surf);
intel_de_write_fw(display, SPRCTL(pipe), 0);
intel_de_write_fw(display, SPRSCALE(pipe), 0);
intel_de_write_fw(display, SPRSURF(pipe), 0);
intel_de_write_fw(display, SKL_PS_CTRL(pipe, id), ps_ctrl);
intel_de_write_fw(display, SKL_PS_VPHASE(pipe, id),
intel_de_write_fw(display, SKL_PS_HPHASE(pipe, id),
intel_de_write_fw(display, SKL_PS_WIN_POS(pipe, id),
intel_de_write_fw(display, SKL_PS_WIN_SZ(pipe, id),
intel_de_write_fw(display,
intel_de_write_fw(display, PLANE_STRIDE(plane->pipe, plane->id),
intel_de_write_fw(display, PLANE_CTL(plane->pipe, plane->id), plane_ctl);
intel_de_write_fw(display, PLANE_SURF(plane->pipe, plane->id),