intel_de_wait_custom
ret = intel_de_wait_custom(display, DSI_LP_MSG(dsi_trans),
ret = intel_de_wait_custom(display, DDI_BUF_CTL(port),
ret = intel_de_wait_custom(display, DSI_LP_MSG(dsi_trans),
ret = intel_de_wait_custom(display, DDI_BUF_CTL(port),
ret = intel_de_wait_custom(display, DSI_TRANS_FUNC_CONF(dsi_trans),
ret = intel_de_wait_custom(display, LCPLL_CTL,
ret = intel_de_wait_custom(display, LCPLL_CTL,
if (intel_de_wait_custom(display,
if (intel_de_wait_custom(display, buf_ctl2_reg,
if (intel_de_wait_custom(display, XELPDP_PORT_BUF_CTL1(display, port),
if (intel_de_wait_custom(display, XELPDP_PORT_BUF_CTL2(display, port),
if (intel_de_wait_custom(display, XELPDP_PORT_CLOCK_CTL(display, port),
if (intel_de_wait_custom(display, XELPDP_PORT_CLOCK_CTL(display, encoder->port),
if (intel_de_wait_custom(display, XELPDP_PORT_CLOCK_CTL(display, encoder->port),
if (intel_de_wait_custom(display, XELPDP_PORT_CLOCK_CTL(display, encoder->port),
if (intel_de_wait_custom(display, XELPDP_PORT_CLOCK_CTL(display, encoder->port),
ret = intel_de_wait_custom(display, reg,
ret = intel_de_wait_custom(display, reg,
ret = intel_de_wait_custom(display, LCPLL_CTL,
ret = intel_de_wait_custom(display, LCPLL_CTL,
ret = intel_de_wait_custom(display, ch_ctl, DP_AUX_CH_CTL_SEND_BUSY,
ret = intel_de_wait_custom(display, BXT_PORT_PLL_ENABLE(port),
ret = intel_de_wait_custom(display, BXT_PORT_PLL_ENABLE(port),
ret = intel_de_wait_custom(display, BXT_PORT_PLL_ENABLE(port),
ret = intel_de_wait_custom(display, HDCP_KEY_STATUS,
ret = intel_de_wait_custom(display, SOUTH_CHICKEN2,
ret = intel_de_wait_custom(display, SOUTH_CHICKEN2,
ret = intel_de_wait_custom(display, XELPDP_INITIATE_PMDEMAND_REQUEST(1),