Symbol: imsic_csr_write
sys/arch/riscv64/dev/imsic.c
173
imsic_csr_write(reg, 0);
sys/arch/riscv64/dev/imsic.c
176
imsic_csr_write(IMSIC_EITHRESHOLD, 1);
sys/arch/riscv64/dev/imsic.c
179
imsic_csr_write(IMSIC_EIDELIVERY, IMSIC_EIDELIVERY_ENABLE);
sys/arch/riscv64/dev/imsic.c
248
imsic_csr_write(IMSIC_EITHRESHOLD, sc->sc_threshold[new]);
sys/arch/riscv64/dev/imsic.c
346
imsic_csr_write(reg, eie | (1ULL << (msi % 64)));
sys/arch/riscv64/dev/imsic.c
363
imsic_csr_write(reg, eie & ~(1ULL << (ih->ih_msi % 64)));
sys/arch/riscv64/dev/imsic.c
87
void imsic_csr_write(uint64_t, uint64_t);