sys/arch/armv7/omap/intc.c

183

intc_intr_establish, intc_intr_disestablish, intc_intr_string,

sys/arch/armv7/omap/intc.c

385

return intc_intr_establish(cell[0], level, ci, func, arg, name);

sys/arch/armv7/omap/intc.c

426

ih = intc_intr_establish(1, IPL_BIO, intc_tst, NULL, "intctst");

sys/arch/armv7/omap/intc.h

33

void *intc_intr_establish(int irqno, int level, struct cpu_info *ci,

sys/arch/landisk/landisk/intr.c

166

eih->eih_func = intc_intr_establish(evtcode, IST_LEVEL, level,

sys/arch/sh/dev/scif.c

431

intc_intr_establish(SH4_INTEVT_SCIF_ERI, IST_LEVEL, IPL_TTY,

sys/arch/sh/dev/scif.c

433

intc_intr_establish(SH4_INTEVT_SCIF_RXI, IST_LEVEL, IPL_TTY,

sys/arch/sh/dev/scif.c

435

intc_intr_establish(SH4_INTEVT_SCIF_BRI, IST_LEVEL, IPL_TTY,

sys/arch/sh/dev/scif.c

437

intc_intr_establish(SH4_INTEVT_SCIF_TXI, IST_LEVEL, IPL_TTY,

sys/arch/sh/dev/scif.c

440

intc_intr_establish(SH7709_INTEVT2_SCIF_ERI, IST_LEVEL, IPL_TTY,

sys/arch/sh/dev/scif.c

442

intc_intr_establish(SH7709_INTEVT2_SCIF_RXI, IST_LEVEL, IPL_TTY,

sys/arch/sh/dev/scif.c

444

intc_intr_establish(SH7709_INTEVT2_SCIF_BRI, IST_LEVEL, IPL_TTY,

sys/arch/sh/dev/scif.c

446

intc_intr_establish(SH7709_INTEVT2_SCIF_TXI, IST_LEVEL, IPL_TTY,

sys/arch/sh/include/intr.h

80

void *intc_intr_establish(int, int, int, int (*)(void *), void *, const char *);

sys/arch/sh/sh/clock.c

287

intc_intr_establish(SH_INTEVT_TMU0_TUNI0, IST_LEVEL, IPL_CLOCK,

sys/arch/sh/sh/interrupt.c

112

intc_intr_establish(SH_INTEVT_TMU1_TUNI1, IST_LEVEL, IPL_SOFTNET,