ilog2
static int ilog2(int);
sblock.fs_bshift = ilog2(sblock.fs_bsize);
sblock.fs_fshift = ilog2(sblock.fs_fsize);
sblock.fs_fragshift = ilog2(sblock.fs_frag);
sblock.fs_fsbtodb = ilog2(sblock.fs_fsize / DEV_BSIZE);
static int ilog2(uint);
sblock.e2fs.e2fs_log_bsize = ilog2(bsize) - LOG_MINBSIZE;
sblock.e2fs.e2fs_log_fsize = ilog2(fsize) - LOG_MINFSIZE;
sblock.e2fs_fsbtodb = ilog2(sblock.e2fs_bsize) - ilog2(sectorsize);
adev->mm_stats.log2_max_MBps = ilog2(max(1u, max_MBps));
int pipes = ilog2(num_pipes);
packers = ilog2(adev->gfx.config.gb_addr_config_fields.num_pkrs);
ilog2(adev->gfx.config.gb_addr_config_fields.num_pkrs));
rb = ilog2(adev->gfx.config.gb_addr_config_fields.num_se) +
ilog2(adev->gfx.config.gb_addr_config_fields.num_rb_per_se);
ilog2(adev->gfx.config.gb_addr_config_fields.num_se));
ilog2(adev->gfx.config.gb_addr_config_fields.num_banks));
dcc_block_bits -= ilog2(afb->base.format->cpp[0]);
unsigned int cpp_log2 = ilog2(cpp);
unsigned bits = ilog2(vm_size) + 18;
int pipe_xor_bits = ilog2(adev->gfx.config.gb_addr_config_fields.num_pipes);
int pipes = ilog2(adev->gfx.config.gb_addr_config_fields.num_pipes);
ilog2(adev->gfx.config.gb_addr_config_fields.num_se));
ilog2(adev->gfx.config.gb_addr_config_fields.num_banks));
int rb = ilog2(adev->gfx.config.gb_addr_config_fields.num_se) +
ilog2(adev->gfx.config.gb_addr_config_fields.num_rb_per_se);
int pipe_xor_bits = ilog2(adev->gfx.config.gb_addr_config_fields.num_pipes);
int pkrs = ilog2(adev->gfx.config.gb_addr_config_fields.num_pkrs);
pkrs = ilog2(num_pkrs);
pipe_xor_bits = ilog2(num_pipes);
return ilog2(num);
return 8 - ilog2(count);
pages = size >> ilog2(mm->chunk_size);
min_order = ilog2(min_block_size) - ilog2(mm->chunk_size);
mm->max_order = ilog2(size) - ilog2(chunk_size);
order = ilog2(size) - ilog2(chunk_size);
order = ilog2(size) - ilog2(mm->chunk_size);
order = ilog2(size) - ilog2(mm->chunk_size);
pages = modify_size >> ilog2(mm->chunk_size);
panel_rot = ilog2(*rotation & DRM_MODE_ROTATE_MASK);
cmdline_rot = ilog2(cmdline->rotation_reflection & DRM_MODE_ROTATE_MASK);
return ilog2(size);
pipe = ilog2(new_cdclk_state->active_pipes);
h = ilog2(delta >> 9);
mpll_tx_clk_div = ilog2(div64_u64((u64)CLOCK_9999MHZ, (u64)datarate));
vco_freq_shift = ilog2(div64_u64((u64)CLOCK_4999MHZ * (u64)256, (u64)datarate));
return ilog2(lane_mask);
x = ilog2(crtc->debug.vbl.times[row]);
#define INTEL_DP_MAX_SUPPORTED_LANE_CONFIGS (ilog2(INTEL_DP_MAX_LANE_COUNT) + 1)
num_common_lane_configs = ilog2(intel_dp_max_common_lane_count(intel_dp)) + 1;
int lane_count_exp = ilog2(lane_count);
return ilog2((int)md->ccs.cc_planes);
tx_clk_div = ilog2(div64_u64(INTEL_SNPS_PHY_HDMI_9999MHZ, datarate));
tx_clk_div = ilog2(div64_u64(INTEL_SNPS_PHY_HDMI_16GHZ, datarate));
decimate = ilog2(hscale >> 16);
unsigned int size = 1 + ilog2(eb->buffer_count);
for_each_set_bit(i, &supported, ilog2(I915_GTT_MAX_PAGE_SIZE) + 1) {
unsigned int bit = ilog2(page_mask);
for_each_set_bit(bit, &supported, ilog2(I915_GTT_MAX_PAGE_SIZE) + 1) {
bit = ilog2(I915_GTT_PAGE_SIZE_64K);
ilog2(I915_GTT_MAX_PAGE_SIZE) + 1) {
ppgtt->base.vm.pd_shift = ilog2(SZ_4K * SZ_4K / sizeof(gen6_pte_t));
ppgtt->vm.pd_shift = ilog2(SZ_4K * SZ_4K / sizeof(gen8_pte_t));
#define GEN8_PTE_SHIFT (ilog2(GEN8_PAGE_SIZE))
#define gen8_pd_shift(lvl) ((lvl) * ilog2(GEN8_PDES))
BITS_PER_TYPE(frame->ring.size) - ilog2(frame->ring.size);
#define MAP(x, y) { ilog2(I915_ENGINE_##x), ilog2(I915_SCHEDULER_CAP_##y) }
val |= ilog2(stride) << I830_FENCE_PITCH_SHIFT;
val |= ilog2(stride / 128) << I830_FENCE_PITCH_SHIFT;
#define XEHP_CCS_MODE_CSLICE_WIDTH ilog2(XEHP_CCS_MODE_CSLICE_MASK + 1)
shift += ilog2(I915_PDES); /* Each PD holds 512 entries */
ring->wrap = BITS_PER_TYPE(ring->size) - ilog2(size);
[ilog2(I915_VIDEO_CLASS_CAPABILITY_HEVC)] = "hevc",
[ilog2(I915_VIDEO_AND_ENHANCE_CLASS_CAPABILITY_SFC)] = "sfc",
[ilog2(I915_VIDEO_AND_ENHANCE_CLASS_CAPABILITY_SFC)] = "sfc",
engine_usage.engines[guc_class][ilog2(engine->logical_mask)]);
info_map_write(info_map, mapping_table[guc_class][ilog2(engine->logical_mask)],
BUILD_BUG_ON(ilog2(VIRTUAL_ENGINES) < I915_NUM_ENGINES);
y = ilog2(val);
info.logical_instance = ilog2(engine->logical_mask);
#define SHIFT ilog2(KSYNCMAP)
n_pages = size >> ilog2(mm->chunk_size);
aligned_size = max_t(u32, ilog2(min_alignment), size);
min_t(u64, ULONG_MAX - 1, (hole_size / 2) >> ilog2(min_alignment));
pot > ilog2(2 * min_alignment);
aligned_size = max_t(u32, ilog2(min_alignment), size);
err = check_seqno((*sync), ilog2((*sync)->bitmap), seqno);
err = check_seqno((*sync), ilog2((*sync)->bitmap), seqno);
idx, ilog2(leaf->bitmap), idx);
unsigned bits = ilog2(radeon_vm_size) + 18;
cmd->params.req.cpu_tbl_sz_log2 = htole16(ilog2(i));
cmd.params.req.frag_size = ilog2(rq->fragsize);
cmd.params.req.wq_size = ilog2(wq->nitems) + 1;
ctx->v0.ring_size = ilog2(mq->nitems) + 1;
cmd.params.req.ctx.count = ilog2(eq->nitems / 256);
ctx->v2.count = ilog2(cq->nitems / 256);
ctx->v0.count = ilog2(cq->nitems / 256);
sblock.fs_fsbtodb = ilog2(sblock.fs_fsize / sectorsize);
static int ilog2(int);