i915_vma_offset
return i915_vma_offset(dpt_vma);
if (entry->offset != i915_vma_offset(vma)) {
entry->offset = i915_vma_offset(vma) | UPDATE;
return gen8_canonical_addr((int)reloc->delta + i915_vma_offset(target));
gen8_canonical_addr(i915_vma_offset(target->vma)) == reloc->presumed_offset)
i915_vma_offset(batch) +
i915_vma_offset(eb->trampoline) +
const u64 start = i915_vma_offset(vma);
if (entry->offset != i915_vma_offset(vma)) {
entry->offset = i915_vma_offset(vma) | UPDATE;
IS_ALIGNED(i915_vma_offset(vma), SZ_2M) &&
*cs++ = lower_32_bits(i915_vma_offset(dst->vma));
*cs++ = upper_32_bits(i915_vma_offset(dst->vma));
*cs++ = lower_32_bits(i915_vma_offset(src->vma));
*cs++ = upper_32_bits(i915_vma_offset(src->vma));
*cs++ = lower_32_bits(i915_vma_offset(dst->vma));
*cs++ = upper_32_bits(i915_vma_offset(dst->vma));
*cs++ = lower_32_bits(i915_vma_offset(src->vma));
*cs++ = upper_32_bits(i915_vma_offset(src->vma));
if (drm_mm_node_allocated(&vma->node) && i915_vma_offset(vma) != addr) {
GEM_BUG_ON(i915_vma_offset(vma) != addr);
i915_vma_offset(t->batch),
i915_vma_offset(batch),
err = engine->emit_bb_start(rq, i915_vma_offset(vma),
*cmd++ = i915_vma_offset(vma) + result;
err = engine->emit_bb_start(rq, i915_vma_offset(vma),
*cmd++ = lower_32_bits(i915_vma_offset(vma));
*cmd++ = upper_32_bits(i915_vma_offset(vma));
err = engine->emit_bb_start(rq, i915_vma_offset(vma), 0, 0);
i915_vma_offset(batch),
offset += i915_vma_offset(vma);
return i915_vma_offset(bc->vma);
*cs++ = lower_32_bits(i915_vma_offset(ce->vm->rsvd.vma));
*cs++ = upper_32_bits(i915_vma_offset(ce->vm->rsvd.vma));
u64 r = s + i915_vma_offset(so->vma);
i915_vma_offset(engine->wa_ctx.vma), 0,
*cs++ = lower_32_bits(i915_vma_offset(vma));
*cs++ = upper_32_bits(i915_vma_offset(vma));
u64 offset = i915_vma_offset((*prev)->batch);
i915_vma_offset(vma),
addr = i915_vma_offset(result) + offset + i * sizeof(*cs);
*cs++ = lower_32_bits(i915_vma_offset(result));
*cs++ = upper_32_bits(i915_vma_offset(result));
i915_vma_offset(batch),
i915_vma_offset(vma),
*batch++ = lower_32_bits(i915_vma_offset(vma));
*batch++ = upper_32_bits(i915_vma_offset(vma));
*batch++ = lower_32_bits(i915_vma_offset(vma));
*batch++ = lower_32_bits(i915_vma_offset(vma));
*batch++ = lower_32_bits(i915_vma_offset(vma));
err = rq->engine->emit_bb_start(rq, i915_vma_offset(vma), PAGE_SIZE, flags);
return i915_vma_offset(hws) +
*cs++ = lower_32_bits(i915_vma_offset(scratch) + x);
*cs++ = upper_32_bits(i915_vma_offset(scratch) + x);
*cs++ = lower_32_bits(i915_vma_offset(b_before));
*cs++ = upper_32_bits(i915_vma_offset(b_before));
*cs++ = lower_32_bits(i915_vma_offset(b_after));
*cs++ = upper_32_bits(i915_vma_offset(b_after));
*cs++ = lower_32_bits(i915_vma_offset(batch));
*cs++ = upper_32_bits(i915_vma_offset(batch));
*cs++ = i915_vma_offset(vma) + 4000;
*cs++ = lower_32_bits(i915_vma_offset(vma) + end * sizeof(*cs));
*cs++ = upper_32_bits(i915_vma_offset(vma) + end * sizeof(*cs));
*cs++ = lower_32_bits(i915_vma_offset(vma) + loop * sizeof(*cs));
*cs++ = upper_32_bits(i915_vma_offset(vma) + loop * sizeof(*cs));
i915_vma_offset(vma),
i915_vma_offset(vma),
*cs++ = lower_32_bits(i915_vma_offset(vma));
*cs++ = upper_32_bits(i915_vma_offset(vma));
err = rq->engine->emit_bb_start(rq, i915_vma_offset(vma), 0, 0);
.start = i915_vma_offset(vb),
GEM_BUG_ON(addr < i915_vma_offset(vma));
GEM_BUG_ON(addr >= i915_vma_offset(vma) + i915_vma_size(vma) + sizeof(val));
(addr - i915_vma_offset(vma)), val, 1);
GEM_BUG_ON(i915_vma_offset(va) != addr);
u64 addr = i915_vma_offset(scratch);
i915_vma_offset(batch), PAGE_SIZE,
u64 offset = i915_vma_offset(results) + sizeof(u32) * i;
err = engine->emit_bb_start(rq, i915_vma_offset(batch), 0, 0);
err = engine->emit_bb_start(rq, i915_vma_offset(pkt->bb_vma), PAGE_SIZE, 0);
shadow_addr = gen8_canonical_addr(i915_vma_offset(shadow));
batch_addr = gen8_canonical_addr(i915_vma_offset(batch) + batch_offset);
i915_vma_offset(vma), i915_vma_size(vma),
i915_vma_offset(vma), 0,
i915_vma_offset(vma),
if (alignment && !IS_ALIGNED(i915_vma_offset(vma), alignment))
i915_vma_offset(vma) < (flags & PIN_OFFSET_MASK))
i915_vma_offset(vma) != (flags & PIN_OFFSET_MASK))
IS_ALIGNED(i915_vma_offset(vma), vma->fence_alignment));
GEM_BUG_ON(upper_32_bits(i915_vma_offset(vma)));
GEM_BUG_ON(upper_32_bits(i915_vma_offset(vma) +
return lower_32_bits(i915_vma_offset(vma));
pkt.addr_in = i915_vma_offset(exec_res->pkt_vma);
i915_vma_offset(batch),
*cmd++ = lower_32_bits(i915_vma_offset(vma));
*cmd++ = upper_32_bits(i915_vma_offset(vma));
*cmd++ = lower_32_bits(i915_vma_offset(vma));
*cmd++ = lower_32_bits(i915_vma_offset(vma));
return i915_vma_offset(hws) + seqno_offset(rq->fence.context);
*batch++ = lower_32_bits(i915_vma_offset(vma));
*batch++ = upper_32_bits(i915_vma_offset(vma));
err = engine->emit_bb_start(rq, i915_vma_offset(vma), PAGE_SIZE, flags);