sys/dev/pci/drm/amd/display/dc/inc/reg_helper.h

157

generic_reg_get(CTX, REG(reg_name), \

sys/dev/pci/drm/amd/display/dc/inc/reg_helper.h

391

uint32_t generic_reg_get(const struct dc_context *ctx, uint32_t addr,

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

805

generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

985

generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

842

generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

1083

generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

965

generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

936

generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

933

generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

878

generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1153

generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX),

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1211

generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX),

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1151

generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX),

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1145

generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX),

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1099

generic_reg_get(ctx, ctx->dcn_reg_offsets[regDC_PINSTRAPS_BASE_IDX] + regDC_PINSTRAPS,

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

1080

generic_reg_get(ctx, ctx->dcn_reg_offsets[regDC_PINSTRAPS_BASE_IDX] + regDC_PINSTRAPS,

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1158

generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX),

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1138

generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX),

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1139

generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX),

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1073

generic_reg_get(ctx, ctx->dcn_reg_offsets[regDC_PINSTRAPS_BASE_IDX] + regDC_PINSTRAPS,