sys/dev/pci/drm/i915/display/i9xx_wm.c

1015

wm += g4x_tlb_miss_wa(g4x_plane_fifo_size(plane->id, level),

sys/dev/pci/drm/i915/display/i9xx_wm.c

1083

max_wm = g4x_plane_fifo_size(plane_id, level);

sys/dev/pci/drm/i915/display/i9xx_wm.c

1140

return raw->plane[plane_id] <= g4x_plane_fifo_size(plane_id, level);

sys/dev/pci/drm/i915/display/i9xx_wm.c

1321

g4x_plane_fifo_size(plane_id, G4X_WM_LEVEL_NORMAL));

sys/dev/pci/drm/i915/display/i9xx_wm.c

1340

g4x_plane_fifo_size(PLANE_PRIMARY, G4X_WM_LEVEL_SR) ||

sys/dev/pci/drm/i915/display/i9xx_wm.c

1342

g4x_plane_fifo_size(PLANE_CURSOR, G4X_WM_LEVEL_SR)) &&

sys/dev/pci/drm/i915/display/i9xx_wm.c

1346

g4x_plane_fifo_size(PLANE_PRIMARY, G4X_WM_LEVEL_HPLL) ||

sys/dev/pci/drm/i915/display/i9xx_wm.c

1348

g4x_plane_fifo_size(PLANE_CURSOR, G4X_WM_LEVEL_HPLL)) &&