fetch_and_zero
wakeref = fetch_and_zero(&intel_dsi->io_wakeref[port]);
wf = fetch_and_zero(&dig_port->aux_wakeref);
wakeref = fetch_and_zero(&dig_port->ddi_io_wakeref);
wakeref = fetch_and_zero(&dig_port->ddi_io_wakeref);
old_crtc_state->dsb_color = fetch_and_zero(&new_crtc_state->dsb_color);
old_crtc_state->dsb_commit = fetch_and_zero(&new_crtc_state->dsb_commit);
fetch_and_zero(&display->power.domains.init_wakeref);
fetch_and_zero(&display->power.domains.disable_wakeref));
fetch_and_zero(&display->power.domains.init_wakeref);
fetch_and_zero(&power_domains->init_wakeref);
fetch_and_zero(&display->power.domains.disable_wakeref));
fetch_and_zero(&power_domains->async_put_wakeref));
old_work_wakeref = fetch_and_zero(&power_domains->async_put_wakeref);
fetch_and_zero(&new_work_wakeref),
fetch_and_zero(&work_wakeref),
work_wakeref = fetch_and_zero(&power_domains->async_put_wakeref);
wf = fetch_and_zero(&power_domain_set->wakerefs[domain]);
state = fetch_and_zero(&display->restore.modeset_state);
fetch_and_zero(&display->dmc.wakeref);
vma = fetch_and_zero(&old_plane_state->ggtt_vma);
vma = fetch_and_zero(&old_plane_state->dpt_vma);
vma = fetch_and_zero(&old_plane_state->ggtt_vma);
overlay = fetch_and_zero(&display->overlay);
vma = fetch_and_zero(&overlay->old_vma);
fetch_and_zero(&intel_dp->pps.vdd_wakeref));
fetch_and_zero(&intel_dp->pps.vdd_wakeref));
tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
pages = fetch_and_zero(&obj->mm.pages);
unmap_object(obj, page_mask_bits(fetch_and_zero(&obj->mm.mapping)));
struct drm_mm_node *stolen = fetch_and_zero(&obj->stolen);
fput(fetch_and_zero(&i915_tt->filp));
i915_refct_sgt_put(fetch_and_zero(&obj->mm.rsgt));
kfree(fetch_and_zero(spin));
i915_request_put(fetch_and_zero(&q[i]));
vma = fetch_and_zero(&engine->status_page.vma);
i915_request_put(fetch_and_zero(&engine->heartbeat.systole));
i915_request_put(fetch_and_zero(&engine->heartbeat.systole));
rq = fetch_and_zero(&ve->request);
old = fetch_and_zero(&ve->request);
ppgtt = fetch_and_zero(&ggtt->alias);
write_domain_objs |= fetch_and_zero(&obj->write_domain);
struct drm_i915_gem_object *obj = fetch_and_zero(&intf->gem_obj);
i915_vm_put(fetch_and_zero(>->vm));
vm = fetch_and_zero(>->vm);
intel_wakeref_t wakeref = fetch_and_zero(>->awake);
struct intel_timeline *tl = fetch_and_zero(&ce->timeline);
intel_ring_put(fetch_and_zero(&ce->ring));
i915_vma_put(fetch_and_zero(&ce->state));
ce = fetch_and_zero(&m->context);
pctx = fetch_and_zero(&rc6->pctx);
pm_iir = fetch_and_zero(&rps->pm_iir) & rps->pm_events;
saved_wa = fetch_and_zero(&engine->wa_ctx.vma);
struct i915_request *rq = fetch_and_zero(&w->rq);
if (fetch_and_zero(&gsc->proxy.component_added))
struct i915_vma *vma = fetch_and_zero(&gsc->local);
intel_engine_destroy_pinned_context(fetch_and_zero(&gsc->ce));
struct drm_i915_gem_object *log = fetch_and_zero(&uc->load_err_log);
i915_gem_object_put(fetch_and_zero(&uc_fw->obj));
struct intel_gvt *gvt = fetch_and_zero(&i915->gvt);
i915_request_put(fetch_and_zero(&workload->req));
rq = fetch_and_zero(&workload->req);
struct i915_drm_client *client = fetch_and_zero(&obj->client);
ce = fetch_and_zero(&stream->pinned_ctx);
alloc = fetch_and_zero(&n_configs);
i915_request_free_capture_list(fetch_and_zero(&rq->capture_list));
wake_up_process(fetch_and_zero(&wait->tsk));
vma = fetch_and_zero(p_vma);
fetch_and_zero(&i915->mm.regions[i]);
d = fetch_and_zero(&uncore->fw_domain[domain_id]);
restore_forcewake = fetch_and_zero(&uncore->fw_domains_saved);
intel_engine_destroy_pinned_context(fetch_and_zero(&pxp->ce));
if (fetch_and_zero(&pxp->hw_state_invalidated)) {
events = fetch_and_zero(&pxp->session_events);
struct drm_i915_gem_object *obj = fetch_and_zero(&pxp->stream_cmd.obj);